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drm/amd/powerplay: force to update all clock tables on OD reset

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On OD reset, the clock tables in SMU need to be reset to default.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2019-05-08 13:55:21 +08:00
committed by Alex Deucher
parent fc99f2be06
commit 9995ac560b
1 changed files with 4 additions and 0 deletions
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4
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
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@@ -5176,6 +5176,10 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
memcpy(&(data->dpm_table), &(data->golden_dpm_table), sizeof(struct vega10_dpm_table));
vega10_odn_initial_default_setting(hwmgr);
vega10_odn_update_power_state(hwmgr);
/* force to update all clock tables */
data->need_update_dpm_table = DPMTABLE_UPDATE_SCLK |
DPMTABLE_UPDATE_MCLK |
DPMTABLE_UPDATE_SOCCLK;
return 0;
} else if (PP_OD_COMMIT_DPM_TABLE == type) {
vega10_check_dpm_table_updated(hwmgr);