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drm/i915: Document bdw+ pipe interrupt bits

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Sprinkle some notes indicating which platforms have which
pipe interrupt bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä
2024-06-05 14:18:27 +03:00
parent 6399c94f4b
commit 9994be5584
1 changed files with 21 additions and 21 deletions
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42
drivers/gpu/drm/i915/i915_reg.h
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@@ -2502,30 +2502,30 @@
#define GEN8_PIPE_FIFO_UNDERRUN REG_BIT(31)
#define GEN8_PIPE_CDCLK_CRC_ERROR REG_BIT(29)
#define GEN8_PIPE_CDCLK_CRC_DONE REG_BIT(28)
#define XELPD_PIPE_SOFT_UNDERRUN REG_BIT(22)
#define XELPD_PIPE_HARD_UNDERRUN REG_BIT(21)
#define GEN12_PIPE_VBLANK_UNMOD REG_BIT(19)
#define GEN8_PIPE_CURSOR_FAULT REG_BIT(10)
#define GEN8_PIPE_SPRITE_FAULT REG_BIT(9)
#define GEN8_PIPE_PRIMARY_FAULT REG_BIT(8)
#define GEN8_PIPE_SPRITE_FLIP_DONE REG_BIT(5)
#define GEN8_PIPE_PRIMARY_FLIP_DONE REG_BIT(4)
#define XELPD_PIPE_SOFT_UNDERRUN REG_BIT(22) /* adl/dg2+ */
#define XELPD_PIPE_HARD_UNDERRUN REG_BIT(21) /* adl/dg2+ */
#define GEN12_PIPE_VBLANK_UNMOD REG_BIT(19) /* tgl+ */
#define GEN8_PIPE_CURSOR_FAULT REG_BIT(10) /* bdw */
#define GEN8_PIPE_SPRITE_FAULT REG_BIT(9) /* bdw */
#define GEN8_PIPE_PRIMARY_FAULT REG_BIT(8) /* bdw */
#define GEN8_PIPE_SPRITE_FLIP_DONE REG_BIT(5) /* bdw */
#define GEN8_PIPE_PRIMARY_FLIP_DONE REG_BIT(4) /* bdw */
#define GEN8_PIPE_SCAN_LINE_EVENT REG_BIT(2)
#define GEN8_PIPE_VSYNC REG_BIT(1)
#define GEN8_PIPE_VBLANK REG_BIT(0)
#define GEN9_PIPE_CURSOR_FAULT REG_BIT(11)
#define GEN11_PIPE_PLANE7_FAULT REG_BIT(22)
#define GEN11_PIPE_PLANE6_FAULT REG_BIT(21)
#define GEN11_PIPE_PLANE5_FAULT REG_BIT(20)
#define GEN9_PIPE_PLANE4_FAULT REG_BIT(10)
#define GEN9_PIPE_PLANE3_FAULT REG_BIT(9)
#define GEN9_PIPE_PLANE2_FAULT REG_BIT(8)
#define GEN9_PIPE_PLANE1_FAULT REG_BIT(7)
#define GEN9_PIPE_PLANE4_FLIP_DONE REG_BIT(6)
#define GEN9_PIPE_PLANE3_FLIP_DONE REG_BIT(5)
#define GEN9_PIPE_PLANE2_FLIP_DONE REG_BIT(4)
#define GEN9_PIPE_PLANE1_FLIP_DONE REG_BIT(3)
#define GEN9_PIPE_PLANE_FLIP_DONE(p) REG_BIT(3 + (p))
#define GEN9_PIPE_CURSOR_FAULT REG_BIT(11) /* skl+ */
#define GEN11_PIPE_PLANE7_FAULT REG_BIT(22) /* icl/tgl */
#define GEN11_PIPE_PLANE6_FAULT REG_BIT(21) /* icl/tgl */
#define GEN11_PIPE_PLANE5_FAULT REG_BIT(20) /* icl+ */
#define GEN9_PIPE_PLANE4_FAULT REG_BIT(10) /* skl+ */
#define GEN9_PIPE_PLANE3_FAULT REG_BIT(9) /* skl+ */
#define GEN9_PIPE_PLANE2_FAULT REG_BIT(8) /* skl+ */
#define GEN9_PIPE_PLANE1_FAULT REG_BIT(7) /* skl+ */
#define GEN9_PIPE_PLANE4_FLIP_DONE REG_BIT(6) /* skl+ */
#define GEN9_PIPE_PLANE3_FLIP_DONE REG_BIT(5) /* skl+ */
#define GEN9_PIPE_PLANE2_FLIP_DONE REG_BIT(4) /* skl+ */
#define GEN9_PIPE_PLANE1_FLIP_DONE REG_BIT(3) /* skl+ */
#define GEN9_PIPE_PLANE_FLIP_DONE(p) REG_BIT(3 + (p)) /* skl+ */
#define GEN8_DE_PIPE_IRQ_FAULT_ERRORS \
(GEN8_PIPE_CURSOR_FAULT | \
GEN8_PIPE_SPRITE_FAULT | \