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drm/tidss: dispc: Switch VID_REG_GET to using a mask

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The VID_REG_GET function takes the start and end bits as parameter and
will generate a mask out of them.

This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.

Let's change VID_REG_GET to take the mask as an argument instead, and
let the caller create the mask. Eventually, this mask will be moved to a
define.

Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-9-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
This commit is contained in:
Maxime Ripard
2025-08-27 17:12:40 +02:00
committed by Tomi Valkeinen
parent e6b571e6ff
commit 990e6f28e7
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/tidss/tidss_dispc.c
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@@ -606,9 +606,8 @@ void tidss_disable_oldi(struct tidss_device *tidss, u32 hw_videoport)
dispc_write(_dispc, _idx, _reg); \
})
#define VID_REG_GET(dispc, hw_plane, idx, start, end) \
((u32)FIELD_GET(GENMASK((start), (end)), \
dispc_vid_read((dispc), (hw_plane), (idx))))
#define VID_REG_GET(dispc, hw_plane, idx, mask) \
((u32)FIELD_GET((mask), dispc_vid_read((dispc), (hw_plane), (idx))))
#define VID_REG_FLD_MOD(dispc, hw_plane, idx, val, start, end) \
({ \
@@ -2294,7 +2293,8 @@ void dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable)
static u32 dispc_vid_get_fifo_size(struct dispc_device *dispc, u32 hw_plane)
{
return VID_REG_GET(dispc, hw_plane, DISPC_VID_BUF_SIZE_STATUS, 15, 0);
return VID_REG_GET(dispc, hw_plane, DISPC_VID_BUF_SIZE_STATUS,
GENMASK(15, 0));
}
static void dispc_vid_set_mflag_threshold(struct dispc_device *dispc,