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arm64: dts: qcom: msm8916: Enable CoreSight STM component

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Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916,
which can benefit the CoreSight development on DB410c.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210321124212.4253-1-leo.yan@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Georgi Djakov
2021-03-21 20:42:12 +08:00
committed by Bjorn Andersson
parent c1b2189a19
commit 98b433864c
2 changed files with 28 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
View File

@@ -414,6 +414,7 @@ &wcd_codec {
&funnel0 { status = "okay"; };
&funnel1 { status = "okay"; };
&replicator { status = "okay"; };
&stm { status = "okay"; };
&tpiu { status = "okay"; };
&smd_rpm_regulators {

27
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@@ -489,6 +489,26 @@ snoc: interconnect@580000 {
<&rpmcc RPM_SMD_SNOC_A_CLK>;
};
stm: stm@802000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x00802000 0x1000>,
<0x09280000 0x180000>;
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
out-ports {
port {
stm_out: endpoint {
remote-endpoint = <&funnel0_in7>;
};
};
};
};
/* System CTIs */
/* CTI 0 - TMC connections */
cti0: cti@810000 {
@@ -562,6 +582,13 @@ funnel0_in4: endpoint {
remote-endpoint = <&funnel1_out>;
};
};
port@7 {
reg = <7>;
funnel0_in7: endpoint {
remote-endpoint = <&stm_out>;
};
};
};
out-ports {