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arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS

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With the change of the MMSYS binding file for MT8195, the compatible
name of VPPSYS in dts need to be fixed to match the definition.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230206091109.1324-3-moudy.ho@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Roy-CW.Yeh
2023-02-06 17:11:05 +08:00
committed by Matthias Brugger
parent 0e3661de6a
commit 981f808e64
1 changed files with 4 additions and 4 deletions
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8
arch/arm64/boot/dts/mediatek/mt8195.dtsi
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@@ -1795,8 +1795,8 @@ mfgcfg: clock-controller@13fbf000 {
#clock-cells = <1>;
};
vppsys0: clock-controller@14000000 {
compatible = "mediatek,mt8195-vppsys0";
vppsys0: syscon@14000000 {
compatible = "mediatek,mt8195-vppsys0", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
@@ -1900,8 +1900,8 @@ larb8: larb@14e05000 {
power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
};
vppsys1: clock-controller@14f00000 {
compatible = "mediatek,mt8195-vppsys1";
vppsys1: syscon@14f00000 {
compatible = "mediatek,mt8195-vppsys1", "syscon";
reg = <0 0x14f00000 0 0x1000>;
#clock-cells = <1>;
};