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drm/amd/display: Block Invalid TMDS operation

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[Why]
When sink type is TMDS, PHY programming does not block against pixel
clock greater than 600MHz.

[How]
Based on sink type, block greater than 600MHz phy programming.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Chris Park
2024-12-03 14:33:16 -05:00
committed by Alex Deucher
parent f9dfa31ff7
commit 95265e4b2b
2 changed files with 7 additions and 0 deletions
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3
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
View File

@@ -1105,6 +1105,9 @@ static bool dcn401_program_pix_clk(
&dto_params);
} else {
if (pll_settings->actual_pix_clk_100hz > 6000000UL)
return false;
/* disables DP DTO when provided with TMDS signal type */
clock_source->ctx->dc->res_pool->dccg->funcs->set_dp_dto(
clock_source->ctx->dc->res_pool->dccg,

4
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
View File

@@ -1953,6 +1953,10 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
stream->phy_pix_clk = stream->timing.pix_clk_100hz / 10;
if (stream->phy_pix_clk > 340000)
is_over_340mhz = true;
if (dc_is_tmds_signal(stream->signal) && stream->phy_pix_clk > 6000000UL) {
ASSERT(false);
return;
}
if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {
unsigned short masked_chip_caps = pipe_ctx->stream->link->chip_caps &