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drm/i915/display: Avoid use of VTOTAL.Vtotal bits

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For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
bits are not required. Since the support for these bits is going to
be deprecated in upcoming platforms, avoid writing these bits for the
platforms that do not use legacy Timing Generator.

Since for these platforms vrr.vmin is always filled with crtc_vtotal,
use TRAN_VRR_VMIN to get the vtotal for adjusted_mode.

v2: Avoid having a helper for manipulating VTOTAL register, and instead
just make the change where required. (Ville)
v3: Set crtc_vtotal instead of working with the bits directly (Ville).
Use intel_vrr_vmin_vtotal() to set the vtotal during readout. (Ville)
v4: Keep the reading part unchanged, and let it get overwritten for
cases where we use vrr.vmin. (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20250327144629.648306-3-ankit.k.nautiyal@intel.com
This commit is contained in:
Ankit Nautiyal
2025-03-27 20:16:29 +05:30
parent 7a6bf54c5f
commit 94f608992f
2 changed files with 28 additions and 0 deletions
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18
drivers/gpu/drm/i915/display/intel_display.c
View File

@@ -2698,6 +2698,15 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
/*
* For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
* bits are not required. Since the support for these bits is going to
* be deprecated in upcoming platforms, avoid writing these bits for the
* platforms that do not use legacy Timing Generator.
*/
if (intel_vrr_always_use_vrr_tg(display))
crtc_vtotal = 1;
intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder),
VACTIVE(crtc_vdisplay - 1) |
VTOTAL(crtc_vtotal - 1));
@@ -2758,6 +2767,15 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder),
VBLANK_START(crtc_vblank_start - 1) |
VBLANK_END(crtc_vblank_end - 1));
/*
* For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
* bits are not required. Since the support for these bits is going to
* be deprecated in upcoming platforms, avoid writing these bits for the
* platforms that do not use legacy Timing Generator.
*/
if (intel_vrr_always_use_vrr_tg(display))
crtc_vtotal = 1;
/*
* The double buffer latch point for TRANS_VTOTAL
* is the transcoder's undelayed vblank.

10
drivers/gpu/drm/i915/display/intel_vrr.c
View File

@@ -708,6 +708,16 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
crtc_state->vrr.vmin = intel_de_read(display,
TRANS_VRR_VMIN(display, cpu_transcoder)) + 1;
/*
* For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
* bits are not filled. Since for these platforms TRAN_VMIN is always
* filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
* adjusted_mode.
*/
if (intel_vrr_always_use_vrr_tg(display))
crtc_state->hw.adjusted_mode.crtc_vtotal =
intel_vrr_vmin_vtotal(crtc_state);
if (HAS_AS_SDP(display)) {
trans_vrr_vsync =
intel_de_read(display,