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dmaengine: altera-msgdma: Use memcpy_toio for descriptor FIFO writes

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The descriptor FIFO requires that all words of a descriptor are written
in order, with the control word written last to flush it into the DMA
engine. Using memcpy() with __force to __iomem is not the correct API
and does not guarantee appropriate MMIO access on all architectures.

Replace the descriptor body copy with memcpy_toio(), using
offsetof(struct msgdma_extended_desc, control) to exclude the control
word. This matches the previous sizeof(desc->hw_desc) - sizeof(u32)
length only when control is the last struct member; add a static_assert
to enforce that layout so a future field after control cannot silently
break FIFO ordering.

Keep writing the control word separately with write barriers, so it
remains the final word pushed into the FIFO.

Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Signed-off-by: Tze Yee Ng <tze.yee.ng@altera.com>
Link: https://patch.msgid.link/f6f3b4a2e2eb0eb1a51976de3f5d1ef5bab9bd76.1779697226.git.tze.yee.ng@altera.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Adrian Ng Ho Yin
2026-05-25 01:37:30 -07:00
committed by Vinod Koul
parent 75b28d74f9
commit 94963138cc
1 changed files with 15 additions and 9 deletions
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24
drivers/dma/altera-msgdma.c
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@@ -496,6 +496,11 @@ static void msgdma_copy_one(struct msgdma_device *mdev,
{
void __iomem *hw_desc = mdev->desc;
/* Ensure control is the last field — required for correct FIFO flush ordering */
static_assert(offsetof(struct msgdma_extended_desc, control) ==
sizeof(struct msgdma_extended_desc) - sizeof(u32),
"control must be the last field in msgdma_extended_desc");
/*
* Check if the DESC FIFO it not full. If its full, we need to wait
* for at least one entry to become free again
@@ -504,17 +509,18 @@ static void msgdma_copy_one(struct msgdma_device *mdev,
MSGDMA_CSR_STAT_DESC_BUF_FULL)
mdelay(1);
/* Ensure control is the last field — required for correct FIFO flush ordering */
static_assert(offsetof(struct msgdma_extended_desc, control) ==
sizeof(struct msgdma_extended_desc) - sizeof(u32),
"control must be the last field in msgdma_extended_desc");
/*
* The descriptor needs to get copied into the descriptor FIFO
* of the DMA controller. The descriptor will get flushed to the
* FIFO, once the last word (control word) is written. Since we
* are not 100% sure that memcpy() writes all word in the "correct"
* order (address from low to high) on all architectures, we make
* sure this control word is written last by single coding it and
* adding some write-barriers here.
* Copy the descriptor into the descriptor FIFO of the DMA controller,
* excluding the control word. The FIFO is flushed and the descriptor
* becomes valid once the control word is written last.
*/
memcpy((void __force *)hw_desc, &desc->hw_desc,
sizeof(desc->hw_desc) - sizeof(u32));
memcpy_toio(hw_desc, &desc->hw_desc,
offsetof(struct msgdma_extended_desc, control));
/* Write control word last to flush this descriptor into the FIFO */
mdev->idle = false;