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drm/i915/gt: Re-work reset_csb

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Use drm_clflush_virt_range instead of directly invoking clflush. This
will prevent compiler errors when building for non-x86 architectures.

v2(Michael Cheng): Remove extra clflush

v3(Michael Cheng): Remove memory barrier since drm_clflush_virt_range
		   takes care of it.

v4(Michael Cheng): Get the size of value and not the size of the pointer
		   when passing in execlists->csb_write. Thanks to Matt
		   Roper for pointing this out.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-4-michael.cheng@intel.com
This commit is contained in:
Michael Cheng
2022-03-21 15:38:17 -07:00
committed by Matt Roper
parent dc0406820e
commit 92b0cba49e
1 changed files with 2 additions and 3 deletions
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5
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
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@@ -2952,9 +2952,8 @@ reset_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
mb(); /* paranoia: read the CSB pointers from after the reset */
clflush(execlists->csb_write);
mb();
drm_clflush_virt_range(execlists->csb_write,
sizeof(execlists->csb_write[0]));
inactive = process_csb(engine, inactive); /* drain preemption events */