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arm64: dts: uniphier: add SD-ctrl node for LD11 SoC

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The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as
MIO-ctrl (0x5b3e0000).  The SD-ctrl block on this SoC has just
one register for controlling RST_n pin of the eMMC device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada
2016-11-27 03:10:53 +09:00
parent 7ce7d89f48
commit 8f32b8124a
1 changed files with 11 additions and 0 deletions
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11
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
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@@ -273,6 +273,17 @@ smpctrl@59800000 {
reg = <0x59801000 0x400>;
};
sdctrl@59810000 {
compatible = "socionext,uniphier-ld11-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
sd_rst: reset {
compatible = "socionext,uniphier-ld11-sd-reset";
#reset-cells = <1>;
};
};
perictrl@59820000 {
compatible = "socionext,uniphier-ld11-perictrl",
"simple-mfd", "syscon";