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drm/amdgpu: Set PG state to gating for vcn_v_5_0_1
For vcn_v_5_0_1, set power state to gating during hw fini. Also there may be scenario where VCN engine hangs during a job execution, then it's not safe to assume that set_pg_state works fine during hw_fini to put the state to gated. After a reset, we can assume that it's in the default state, therefore reset the driver maintained state. Put the default state as gated during reset as per this assumption. Signed-off-by: Asad Kamal <asad.kamal@amd.com> Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -227,8 +227,13 @@ static int vcn_v5_0_1_hw_fini(struct amdgpu_ip_block *ip_block)
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struct amdgpu_device *adev = ip_block->adev;
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int i;
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for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
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for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
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struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
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cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
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if (vinst->cur_state != AMD_PG_STATE_GATE)
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vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
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}
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return 0;
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}
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@@ -271,6 +276,11 @@ static int vcn_v5_0_1_resume(struct amdgpu_ip_block *ip_block)
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int r, i;
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for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
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struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
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if (amdgpu_in_reset(adev))
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vinst->cur_state = AMD_PG_STATE_GATE;
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r = amdgpu_vcn_resume(ip_block->adev, i);
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if (r)
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return r;
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