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arm64: dts: qcom: sc7180: revert "arm64: dts: qcom: sc7180: Avoid glitching SPI CS at bootup on trogdor"

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This reverts commit e440e30e26 because it
is not a reliable way of fixing SPI CS glitch and it depends on specific
Linux kernel pin controller driver behavior.

This behavior of kernel driver was changed in commit b991f8c362
("pinctrl: core: Handling pinmux and pinconf separately") thus
effectively the DTS fix stopped being effective.

Proper solution for the glitching SPI chip select must be implemented in
the drivers, not via ordering of entries in DTS, and is already
introduced in commit d21f4b7ffc ("pinctrl: qcom: Avoid glitching lines
when we first mux to output").

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-3-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski
2022-10-20 18:51:34 -04:00
committed by Bjorn Andersson
parent 59e787935c
commit 8ddfa04de4
1 changed files with 3 additions and 24 deletions
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27
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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@@ -880,17 +880,17 @@ &sdhc_2 {
};
&spi0 {
pinctrl-0 = <&qup_spi0_cs_gpio_init_high>, <&qup_spi0_cs_gpio>;
pinctrl-0 = <&qup_spi0_cs_gpio>;
cs-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
};
&spi6 {
pinctrl-0 = <&qup_spi6_cs_gpio_init_high>, <&qup_spi6_cs_gpio>;
pinctrl-0 = <&qup_spi6_cs_gpio>;
cs-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
};
ap_spi_fp: &spi10 {
pinctrl-0 = <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
pinctrl-0 = <&qup_spi10_cs_gpio>;
cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
cros_ec_fp: ec@0 {
@@ -1422,27 +1422,6 @@ pinconf {
};
};
qup_spi0_cs_gpio_init_high: qup-spi0-cs-gpio-init-high {
pinconf {
pins = "gpio37";
output-high;
};
};
qup_spi6_cs_gpio_init_high: qup-spi6-cs-gpio-init-high {
pinconf {
pins = "gpio62";
output-high;
};
};
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
pinconf {
pins = "gpio89";
output-high;
};
};
qup_uart3_sleep: qup-uart3-sleep {
pinmux {
pins = "gpio38", "gpio39",