arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors

For every remote processor, set up dedicated memory regions and
associate the required mailbox channels. Allocate two memory areas
per remote core: one 1MB region for vring shared buffers, and
another for external memory used by the remote processor for its
resource table and trace buffer.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250507070008.1231611-3-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Daniel Schultz
2025-05-07 00:00:06 -07:00
committed by Nishanth Menon
parent c0fa0aaa69
commit 8dd0ac27fc

View File

@@ -59,6 +59,42 @@ linux,cma {
linux,cma-default;
};
c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x99800000 0x00 0x100000>;
no-map;
};
c7x_0_memory_region: c7x-memory@99900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x99900000 0x00 0xf00000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b800000 0x00 0x100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b900000 0x00 0xf00000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c900000 0x00 0xf00000>;
no-map;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
@@ -70,12 +106,6 @@ secure_ddr: optee@9e800000 {
alignment = <0x1000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c900000 0x00 0x01e00000>;
no-map;
};
};
vcc_5v0_som: regulator-vcc-5v0-som {
@@ -170,6 +200,13 @@ AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */
};
};
&c7x_0 {
mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
memory-region = <&c7x_0_dma_memory_region>,
<&c7x_0_memory_region>;
status = "okay";
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
@@ -200,6 +237,33 @@ &fss {
status = "okay";
};
&mailbox0_cluster0 {
status = "okay";
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
status = "okay";
mbox_c7x_0: mbox-c7x-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster2 {
status = "okay";
mbox_mcu_r5_0: mbox-mcu-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -315,6 +379,16 @@ &main_pktdma {
bootph-all;
};
&mcu_r5fss0 {
status = "okay";
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
@@ -342,3 +416,13 @@ &sdhci0 {
bootph-all;
status = "okay";
};
&wkup_r5fss0 {
status = "okay";
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};