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staging: rtl8723bs: add spaces arround operators

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Adhere to Linux kernel coding style.
Reported by checkpath :
CHECK: spaces preferred around that '&' (ctx:VxV)

Signed-off-by: Guillaume Lefèvre-Crimé <guillaume.lefevre.crime@netc.fr>
Tested-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/20240816183756.59250-1-guillaume.lefevre.crime@netc.fr
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Guillaume Lefèvre-Crimé
2024-08-16 20:37:32 +02:00
committed by Greg Kroah-Hartman
parent 5f1a6826ea
commit 8da9f6afc4
1 changed files with 27 additions and 27 deletions
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54
drivers/staging/rtl8723bs/core/rtw_efuse.c
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@@ -38,7 +38,7 @@ Efuse_Read1ByteFromFakeContent(u16 Offset, u8 *Value)
if (fakeEfuseBank == 0)
*Value = fakeEfuseContent[Offset];
else
*Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset];
*Value = fakeBTEfuseContent[fakeEfuseBank - 1][Offset];
return true;
}
@@ -50,7 +50,7 @@ Efuse_Write1ByteToFakeContent(u16 Offset, u8 Value)
if (fakeEfuseBank == 0)
fakeEfuseContent[Offset] = Value;
else
fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value;
fakeBTEfuseContent[fakeEfuseBank - 1][Offset] = Value;
return true;
}
@@ -206,21 +206,21 @@ u16 Address)
if (Address < contentLen) {/* E-fuse 512Byte */
/* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL+1, temp);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
rtw_write8(Adapter, EFUSE_CTRL + 1, temp);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 2);
/* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL+2, temp);
rtw_write8(Adapter, EFUSE_CTRL + 2, temp);
/* Write 0x30[31]= 0 */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 3);
temp = Bytetemp & 0x7F;
rtw_write8(Adapter, EFUSE_CTRL+3, temp);
rtw_write8(Adapter, EFUSE_CTRL + 3, temp);
/* Wait Write-ready (0x30[31]= 1) */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 3);
while (!(Bytetemp & 0x80)) {
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 3);
k++;
if (k == 1000)
break;
@@ -253,16 +253,16 @@ bool bPseudoTest)
/* -----------------e-fuse reg ctrl --------------------------------- */
/* address */
rtw_write8(padapter, EFUSE_CTRL+1, (u8)(addr&0xff));
rtw_write8(padapter, EFUSE_CTRL+2, ((u8)((addr>>8) & 0x03)) |
(rtw_read8(padapter, EFUSE_CTRL+2)&0xFC));
rtw_write8(padapter, EFUSE_CTRL + 1, (u8)(addr & 0xff));
rtw_write8(padapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) |
(rtw_read8(padapter, EFUSE_CTRL + 2) & 0xFC));
/* rtw_write8(padapter, EFUSE_CTRL+3, 0x72); read cmd */
/* Write bit 32 0 */
readbyte = rtw_read8(padapter, EFUSE_CTRL+3);
rtw_write8(padapter, EFUSE_CTRL+3, (readbyte & 0x7f));
readbyte = rtw_read8(padapter, EFUSE_CTRL + 3);
rtw_write8(padapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
while (!(0x80 & rtw_read8(padapter, EFUSE_CTRL+3)) && (tmpidx < 1000)) {
while (!(0x80 & rtw_read8(padapter, EFUSE_CTRL + 3)) && (tmpidx < 1000)) {
mdelay(1);
tmpidx++;
}
@@ -293,9 +293,9 @@ u8 efuse_OneByteWrite(struct adapter *padapter, u16 addr, u8 data, bool bPseudoT
efuseValue = rtw_read32(padapter, EFUSE_CTRL);
efuseValue |= (BIT21|BIT31);
efuseValue |= (BIT21 | BIT31);
efuseValue &= ~(0x3FFFF);
efuseValue |= ((addr<<8 | data) & 0x3FFFF);
efuseValue |= ((addr << 8 | data) & 0x3FFFF);
/* <20130227, Kordan> 8192E MP chip A-cut had better not set 0x34[11] until B-Cut. */
@@ -304,9 +304,9 @@ u8 efuse_OneByteWrite(struct adapter *padapter, u16 addr, u8 data, bool bPseudoT
/* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */
/* PHY_SetMacReg(padapter, 0x34, BIT11, 1); */
rtw_write16(padapter, 0x34, rtw_read16(padapter, 0x34) | (BIT11));
rtw_write32(padapter, EFUSE_CTRL, 0x90600000|((addr<<8 | data)));
rtw_write32(padapter, EFUSE_CTRL, 0x90600000 | ((addr << 8 | data)));
while ((0x80 & rtw_read8(padapter, EFUSE_CTRL+3)) && (tmpidx < 100)) {
while ((0x80 & rtw_read8(padapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) {
mdelay(1);
tmpidx++;
}
@@ -365,19 +365,19 @@ efuse_WordEnableDataRead(u8 word_en,
u8 *sourdata,
u8 *targetdata)
{
if (!(word_en&BIT(0))) {
if (!(word_en & BIT(0))) {
targetdata[0] = sourdata[0];
targetdata[1] = sourdata[1];
}
if (!(word_en&BIT(1))) {
if (!(word_en & BIT(1))) {
targetdata[2] = sourdata[2];
targetdata[3] = sourdata[3];
}
if (!(word_en&BIT(2))) {
if (!(word_en & BIT(2))) {
targetdata[4] = sourdata[4];
targetdata[5] = sourdata[5];
}
if (!(word_en&BIT(3))) {
if (!(word_en & BIT(3))) {
targetdata[6] = sourdata[6];
targetdata[7] = sourdata[7];
}
@@ -463,7 +463,7 @@ static void efuse_ShadowRead2Byte(struct adapter *padapter, u16 Offset, u16 *Val
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
*Value |= pEEPROM->efuse_eeprom_data[Offset + 1] << 8;
} /* EFUSE_ShadowRead2Byte */
@@ -473,9 +473,9 @@ static void efuse_ShadowRead4Byte(struct adapter *padapter, u16 Offset, u32 *Val
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
*Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16;
*Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24;
*Value |= pEEPROM->efuse_eeprom_data[Offset + 1] << 8;
*Value |= pEEPROM->efuse_eeprom_data[Offset + 2] << 16;
*Value |= pEEPROM->efuse_eeprom_data[Offset + 3] << 24;
} /* efuse_ShadowRead4Byte */