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drm/amd/display: Enable HUBP/DPP power gate for DCN42

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[Why & How]
Enable Driver PG for HUBP and DPP in DCN42.

Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Chen
2026-06-10 17:20:01 -04:00
committed by Alex Deucher
parent 7874b9d6c5
commit 8b6ab8bdf8
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
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@@ -729,8 +729,8 @@ static const struct dc_debug_options debug_defaults_drv = {
.clock_trace = true,
.disable_pplib_clock_request = false,
.ignore_pg = false,
.disable_dpp_power_gate = true,
.disable_hubp_power_gate = true,
.disable_dpp_power_gate = false,
.disable_hubp_power_gate = false,
.disable_optc_power_gate = true,
.disable_dsc_power_gate = false,
.disable_dio_power_gate = true,