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clk: spacemit: k3: Add UFS refclk clock

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Add the UFS reference clock for SpacemiT K3 SoC.

Link: https://patch.msgid.link/20260630-06-clk-ufs-support-v1-3-cf7521d1d0fe@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
This commit is contained in:
Yixun Lan
2026-06-30 12:52:47 +00:00
parent 4fc567e1ba
commit 8abba78dc0
1 changed files with 3 additions and 0 deletions
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3
drivers/clk/spacemit/ccu-k3.c
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@@ -934,6 +934,8 @@ static const struct clk_parent_data ufs_aclk_parents[] = {
CCU_MUX_DIV_GATE_FC_DEFINE(ufs_aclk, ufs_aclk_parents, APMU_UFS_CLK_RES_CTRL, 5, 3, BIT(8),
2, 3, BIT(1), 0);
CCU_FACTOR_DEFINE(ufs_refclk, CCU_PARENT_HW(pll1_d64_38p4), 2, 1);
static const struct clk_parent_data edp0_pclk_parents[] = {
CCU_PARENT_HW(lcd_pxclk),
CCU_PARENT_NAME(external_clk),
@@ -1391,6 +1393,7 @@ static struct clk_hw *k3_ccu_apmu_hws[] = {
[CLK_APMU_DSI4LN2_DPU_ACLK] = &dsi4ln2_dpu_aclk.common.hw,
[CLK_APMU_DPU_ACLK] = &dpu_aclk.common.hw,
[CLK_APMU_UFS_ACLK] = &ufs_aclk.common.hw,
[CLK_APMU_UFS_REFCLK] = &ufs_refclk.common.hw,
[CLK_APMU_EDP0_PXCLK] = &edp0_pxclk.common.hw,
[CLK_APMU_EDP1_PXCLK] = &edp1_pxclk.common.hw,
[CLK_APMU_PCIE_PORTA_MSTE] = &pciea_mstr_clk.common.hw,