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Merge tag 'tty-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Browse Source 
Pull tty / serial driver updates from Greg KH:
 "Here is the big set of TTY and Serial driver updates for 7.2-rc1.

  Overall we end up removing more code than added, due to an obsolete
  synclink_gt driver being removed from the tree, always a nice thing to
  see happen.

  Other than that driver removal, major things included in here are:

   - max310x serial driver updates and fixes

   - 8250 driver updates and rework in places to make it more "modern"

   - dts file updates

   - serial driver core tweaks and updates

   - vt code cleanups

   - vc_screen crash fixes

   - other minor driver updates and cleanups

  All of these have been in linux-next for well over a week with no
  reported issues"

* tag 'tty-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (49 commits)
  serial: 8250_pci: Don't specify conflicting values to pci_device_id members
  vc_screen: fix null-ptr-deref in vcs_notifier() during concurrent vcs_write
  serial: qcom_geni: Fix RX DMA stall when SE_DMA_RX_LEN_IN is zero
  vt: merge ucs_is_zero_width()/ucs_is_double_width() into ucs_get_width()
  serial: 8250: fix possible ISR soft lockup
  dt-bindings: serial: rs485: remove deprecated .txt binding stub
  serial: qcom-geni: trace: Add tracepoint support for Qualcomm GENI serial
  tty: serial: Use named initializers for arrays of i2c_device_data
  serial: 8250_dw: remove clock-notifier infrastructure
  serial: 8250_dw: unregister 8250 port if clk_notifier_register() fails
  amba/serial: amba-pl011: Bring back zx29 UART support
  serial: 8250: Add support for console flow control
  serial: 8250: Check LSR timeout on console flow control
  serial: 8250: Set cons_flow on port registration
  tty: serial: 8250: protect against NULL uart->port.dev in register
  arm64: dts: add support for A9 based Amlogic BY401
  dt-bindings: arm: amlogic: add A311Y3 support
  serial: max310x: fix compile errors if CONFIG_SPI_MASTER is disabled
  serial: qcom-geni: Avoid probing debug console UART without console support
  serial: max310x: add comments for PLL limits
  ...
This commit is contained in:
Linus Torvalds
2026-06-22 11:51:49 -07:00
parent 1dc18801be 426e83cab1
commit 8a500fd093
51 changed files with 3027 additions and 7852 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/arm/amlogic.yaml
View File

@@ -234,6 +234,12 @@ properties:
- amlogic,av400
- const: amlogic,a5
- description: Boards with the Amlogic A9 A311Y3 SoC
items:
- enum:
- amlogic,by401
- const: amlogic,a9
- description: Boards with the Amlogic C3 C302X/C308L SoC
items:
- enum:

13
Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
View File

@@ -14,9 +14,16 @@ allOf:
properties:
compatible:
enum:
- qcom,sa8255p-geni-uart
- qcom,sa8255p-geni-debug-uart
oneOf:
- enum:
- qcom,sa8255p-geni-uart
- qcom,sa8255p-geni-debug-uart
- items:
- const: qcom,sa8797p-geni-uart
- const: qcom,sa8255p-geni-uart
- items:
- const: qcom,sa8797p-geni-debug-uart
- const: qcom,sa8255p-geni-debug-uart
reg:
maxItems: 1

1
Documentation/devicetree/bindings/serial/rs485.txt
View File

@@ -1 +0,0 @@
See rs485.yaml

1
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
View File

@@ -78,6 +78,7 @@ properties:
- starfive,jh7100-hsuart
- starfive,jh7100-uart
- starfive,jh7110-uart
- ultrarisc,dp1000-uart
- const: snps,dw-apb-uart
- const: snps,dw-apb-uart

2
Documentation/driver-api/serial/serial-rs485.rst
View File

@@ -132,4 +132,4 @@ RS485 Serial Communications
6. References
=============
.. [#DT-bindings] Documentation/devicetree/bindings/serial/rs485.txt
.. [#DT-bindings] Documentation/devicetree/bindings/serial/rs485.yaml

1
Documentation/userspace-api/ioctl/ioctl-number.rst
View File

@@ -270,7 +270,6 @@ Code Seq# Include File Comments
'm' 00-09 linux/mmtimer.h conflict!
'm' all linux/mtio.h conflict!
'm' all linux/soundcard.h conflict!
'm' all linux/synclink.h conflict!
'm' 00-19 drivers/message/fusion/mptctl.h conflict!
'm' 00 drivers/scsi/megaraid/megaraid_ioctl.h conflict!
'n' 00-7F linux/ncp_fs.h and fs/ncpfs/ioctl.c

1
arch/arm64/boot/dts/amlogic/Makefile
View File

@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-a9-a311y3-by401.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-s6-s905x5-bl209.dtb

40
arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts Normal file
View File

@@ -0,0 +1,40 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2026 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "amlogic-a9.dtsi"
/ {
model = "Amlogic A311DY3 BY401 Development Board";
compatible = "amlogic,by401", "amlogic,a9";
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart_b;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 35 MiB reserved for ARM Trusted Firmware */
secmon_reserved: secmon@5000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x05000000 0x0 0x2300000>;
no-map;
};
};
};
&uart_b {
status = "okay";
};

128
arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi Normal file
View File

@@ -0,0 +1,128 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2026 Amlogic, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
/ {
interrupt-parent = <&gic>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x100>;
enable-method = "psci";
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x200>;
enable-method = "psci";
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x300>;
enable-method = "psci";
};
cpu4: cpu@400 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x400>;
enable-method = "psci";
};
cpu5: cpu@500 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x500>;
enable-method = "psci";
};
cpu6: cpu@600 {
device_type = "cpu";
compatible = "arm,cortex-a78";
reg = <0x0 0x600>;
enable-method = "psci";
};
cpu7: cpu@700 {
device_type = "cpu";
compatible = "arm,cortex-a78";
reg = <0x0 0x700>;
enable-method = "psci";
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@ff800000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x0 0xff800000 0 0x10000>,
<0x0 0xff840000 0 0x100000>;
interrupts = <GIC_PPI 9 0xf04>;
};
aobus: bus@ffa00000 {
compatible = "simple-bus";
reg = <0x0 0xffa00000 0x0 0x100000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffa00000 0x0 0x100000>;
uart_b: serial@1e000 {
compatible = "amlogic,a9-uart",
"amlogic,meson-s4-uart";
reg = <0x0 0x1e000 0x0 0x18>;
interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
};
};
};

1
arch/powerpc/configs/ppc6xx_defconfig
View File

@@ -548,7 +548,6 @@ CONFIG_GAMEPORT_EMU10K1=m
CONFIG_GAMEPORT_FM801=m
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_SYNCLINK_GT=m
CONFIG_NOZOMI=m
CONFIG_N_HDLC=m
CONFIG_SERIAL_8250=y

4
drivers/net/ppp/Kconfig
View File

@@ -197,8 +197,8 @@ config PPP_SYNC_TTY
tristate "PPP support for sync tty ports"
help
Say Y (or M) here if you want to be able to use PPP over synchronous
(HDLC) tty devices, such as the SyncLink adapter. These devices
are often used for high-speed leased lines like T1/E1.
(HDLC) tty devices. These devices are often used for high-speed leased
lines like T1/E1.
To compile this driver as a module, choose M here.

11
drivers/tty/Kconfig
View File

@@ -231,21 +231,12 @@ config MOXA_SMARTIO
This driver can also be built as a module. The module will be called
mxser. If you want to do that, say M here.
config SYNCLINK_GT
tristate "SyncLink GT/AC support"
depends on SERIAL_NONSTANDARD && PCI
depends on BROKEN
help
Support for SyncLink GT and SyncLink AC families of
synchronous and asynchronous serial adapters
manufactured by Microgate Systems, Ltd. (www.microgate.com)
config N_HDLC
tristate "HDLC line discipline support"
depends on SERIAL_NONSTANDARD
help
Allows synchronous HDLC communications with tty device drivers that
support synchronous HDLC such as the Microgate SyncLink adapter.
support synchronous HDLC.
This driver can be built as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).

1
drivers/tty/Makefile
View File

@@ -21,7 +21,6 @@ obj-$(CONFIG_MOXA_INTELLIO) += moxa.o
obj-$(CONFIG_MOXA_SMARTIO) += mxser.o
obj-$(CONFIG_NOZOMI) += nozomi.o
obj-$(CONFIG_NULL_TTY) += ttynull.o
obj-$(CONFIG_SYNCLINK_GT) += synclink_gt.o
obj-$(CONFIG_PPC_EPAPR_HV_BYTECHAN) += ehv_bytechan.o
obj-$(CONFIG_GOLDFISH_TTY) += goldfish.o
obj-$(CONFIG_MIPS_EJTAG_FDC_TTY) += mips_ejtag_fdc.o

7
drivers/tty/n_hdlc.c
View File

@@ -4,8 +4,6 @@
* Written by Paul Fulghum paulkf@microgate.com
* for Microgate Corporation
*
* Microgate and SyncLink are registered trademarks of Microgate Corporation
*
* Adapted from ppp.c, written by Michael Callahan <callahan@maths.ox.ac.uk>,
* Al Longyear <longyear@netcom.com>,
* Paul Mackerras <Paul.Mackerras@cs.anu.edu.au>
@@ -54,11 +52,6 @@
* this line discipline (or another line discipline that is frame
* oriented such as N_PPP).
*
* The SyncLink driver (synclink.c) implements both asynchronous
* (using standard line discipline N_TTY) and synchronous HDLC
* (using N_HDLC) communications, with the latter using the above
* conventions.
*
* This implementation is very basic and does not maintain
* any statistics. The main point is to enforce the raw data
* and frame orientation of HDLC communications.

8
drivers/tty/serial/8250/8250_core.c
View File

@@ -693,6 +693,7 @@ static void serial_8250_overrun_backoff_work(struct work_struct *work)
int serial8250_register_8250_port(const struct uart_8250_port *up)
{
struct uart_8250_port *uart;
bool cons_flow;
int ret;
if (up->port.uartclk == 0)
@@ -716,6 +717,9 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
if (uart->port.type == PORT_8250_CIR)
return -ENODEV;
/* Preserve specified console flow control. */
cons_flow = uart_cons_flow_enabled(&uart->port);
if (uart->port.dev)
uart_remove_one_port(&serial8250_reg, &uart->port);
@@ -746,6 +750,8 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
uart->lsr_save_mask = up->lsr_save_mask;
uart->dma = up->dma;
uart_set_cons_flow_enabled(&uart->port, uart_cons_flow_enabled(&up->port) | cons_flow);
/* Take tx_loadsz from fifosize if it wasn't set separately */
if (uart->port.fifosize && !uart->tx_loadsz)
uart->tx_loadsz = uart->port.fifosize;
@@ -764,7 +770,7 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
* Only call mctrl_gpio_init(), if the device has no ACPI
* companion device
*/
if (!has_acpi_companion(uart->port.dev)) {
if (uart->port.dev && !has_acpi_companion(uart->port.dev)) {
struct mctrl_gpios *gpios = mctrl_gpio_init(&uart->port, 0);
if (IS_ERR(gpios)) {
ret = PTR_ERR(gpios);

110
drivers/tty/serial/8250/8250_dw.c
View File

@@ -19,13 +19,11 @@
#include <linux/lockdep.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/notifier.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <asm/byteorder.h>
@@ -34,22 +32,11 @@
#include "8250_dwlib.h"
/* Offsets for the DesignWare specific registers */
#define DW_UART_USR 0x1f /* UART Status Register */
#define DW_UART_DMASA 0xa8 /* DMA Software Ack */
#define OCTEON_UART_USR 0x27 /* UART Status Register */
#define RZN1_UART_TDMACR 0x10c /* DMA Control Register Transmit Mode */
#define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */
/* DesignWare specific register fields */
#define DW_UART_IIR_IID GENMASK(3, 0)
#define DW_UART_MCR_SIRE BIT(6)
#define DW_UART_USR_BUSY BIT(0)
/* Renesas specific register fields */
#define RZN1_UART_xDMACR_DMA_EN BIT(0)
#define RZN1_UART_xDMACR_1_WORD_BURST (0 << 1)
@@ -86,8 +73,6 @@ struct dw8250_data {
u32 msr_mask_off;
struct clk *clk;
struct clk *pclk;
struct notifier_block clk_notifier;
struct work_struct clk_work;
struct reset_control *rst;
unsigned int skip_autocfg:1;
@@ -102,16 +87,6 @@ static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data)
return container_of(data, struct dw8250_data, data);
}
static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb)
{
return container_of(nb, struct dw8250_data, clk_notifier);
}
static inline struct dw8250_data *work_to_dw8250_data(struct work_struct *work)
{
return container_of(work, struct dw8250_data, clk_work);
}
static inline u32 dw8250_modify_msr(struct uart_port *p, unsigned int offset, u32 value)
{
struct dw8250_data *d = to_dw8250_data(p->private_data);
@@ -484,46 +459,6 @@ static int dw8250_handle_irq(struct uart_port *p)
return 1;
}
static void dw8250_clk_work_cb(struct work_struct *work)
{
struct dw8250_data *d = work_to_dw8250_data(work);
struct uart_8250_port *up;
unsigned long rate;
rate = clk_get_rate(d->clk);
if (rate <= 0)
return;
up = serial8250_get_port(d->data.line);
serial8250_update_uartclk(&up->port, rate);
}
static int dw8250_clk_notifier_cb(struct notifier_block *nb,
unsigned long event, void *data)
{
struct dw8250_data *d = clk_to_dw8250_data(nb);
/*
* We have no choice but to defer the uartclk update due to two
* deadlocks. First one is caused by a recursive mutex lock which
* happens when clk_set_rate() is called from dw8250_set_termios().
* Second deadlock is more tricky and is caused by an inverted order of
* the clk and tty-port mutexes lock. It happens if clock rate change
* is requested asynchronously while set_termios() is executed between
* tty-port mutex lock and clk_set_rate() function invocation and
* vise-versa. Anyway if we didn't have the reference clock alteration
* in the dw8250_set_termios() method we wouldn't have needed this
* deferred event handling complication.
*/
if (event == POST_RATE_CHANGE) {
queue_work(system_dfl_wq, &d->clk_work);
return NOTIFY_OK;
}
return NOTIFY_DONE;
}
static void
dw8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
{
@@ -547,10 +482,6 @@ static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
clk_disable_unprepare(d->clk);
rate = clk_round_rate(d->clk, newrate);
if (rate > 0) {
/*
* Note that any clock-notifier worker will block in
* serial8250_update_uartclk() until we are done.
*/
ret = clk_set_rate(d->clk, newrate);
if (!ret)
p->uartclk = rate;
@@ -783,9 +714,6 @@ static int dw8250_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(data->clk),
"failed to get baudclk\n");
INIT_WORK(&data->clk_work, dw8250_clk_work_cb);
data->clk_notifier.notifier_call = dw8250_clk_notifier_cb;
if (data->clk)
p->uartclk = clk_get_rate(data->clk);
@@ -843,18 +771,6 @@ static int dw8250_probe(struct platform_device *pdev)
if (data->data.line < 0)
return data->data.line;
/*
* Some platforms may provide a reference clock shared between several
* devices. In this case any clock state change must be known to the
* UART port at least post factum.
*/
if (data->clk) {
err = clk_notifier_register(data->clk, &data->clk_notifier);
if (err)
return dev_err_probe(dev, err, "Failed to set the clock notifier\n");
queue_work(system_dfl_wq, &data->clk_work);
}
platform_set_drvdata(pdev, data);
pm_runtime_enable(dev);
@@ -869,12 +785,6 @@ static void dw8250_remove(struct platform_device *pdev)
pm_runtime_get_sync(dev);
if (data->clk) {
clk_notifier_unregister(data->clk, &data->clk_notifier);
flush_work(&data->clk_work);
}
serial8250_unregister_port(data->data.line);
pm_runtime_disable(dev);
@@ -948,7 +858,15 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = {
static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
.usr_reg = DW_UART_USR,
.cpr_value = 0x00012f32,
.cpr_value = FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) |
DW_UART_CPR_AFCE_MODE |
DW_UART_CPR_THRE_MODE |
DW_UART_CPR_ADDITIONAL_FEATURES |
DW_UART_CPR_FIFO_ACCESS |
DW_UART_CPR_FIFO_STAT |
DW_UART_CPR_SHADOW |
DW_UART_CPR_DMA_EXTRA |
DW_UART_CPR_FIFO_MODE_FROM_SIZE(16),
.quirks = DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC,
};
@@ -962,6 +880,15 @@ static const struct dw8250_platform_data dw8250_intc10ee = {
.quirks = DW_UART_QUIRK_IER_KICK,
};
static const struct dw8250_platform_data dw8250_ultrarisc_dp1000_data = {
.usr_reg = DW_UART_USR,
.cpr_value = FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) |
DW_UART_CPR_THRE_MODE |
DW_UART_CPR_DMA_EXTRA |
DW_UART_CPR_FIFO_MODE_FROM_SIZE(32),
.quirks = DW_UART_QUIRK_CPR_VALUE,
};
static const struct of_device_id dw8250_of_match[] = {
{ .compatible = "snps,dw-apb-uart", .data = &dw8250_dw_apb },
{ .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data },
@@ -969,6 +896,7 @@ static const struct of_device_id dw8250_of_match[] = {
{ .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data },
{ .compatible = "sophgo,sg2044-uart", .data = &dw8250_skip_set_rate_data },
{ .compatible = "starfive,jh7100-uart", .data = &dw8250_skip_set_rate_data },
{ .compatible = "ultrarisc,dp1000-uart", .data = &dw8250_ultrarisc_dp1000_data },
{ /* Sentinel */ }
};
MODULE_DEVICE_TABLE(of, dw8250_of_match);

49
drivers/tty/serial/8250/8250_dwlib.c
View File

@@ -13,55 +13,6 @@
#include "8250_dwlib.h"
/* Offsets for the DesignWare specific registers */
#define DW_UART_TCR 0xac /* Transceiver Control Register (RS485) */
#define DW_UART_DE_EN 0xb0 /* Driver Output Enable Register */
#define DW_UART_RE_EN 0xb4 /* Receiver Output Enable Register */
#define DW_UART_DLF 0xc0 /* Divisor Latch Fraction Register */
#define DW_UART_RAR 0xc4 /* Receive Address Register */
#define DW_UART_TAR 0xc8 /* Transmit Address Register */
#define DW_UART_LCR_EXT 0xcc /* Line Extended Control Register */
#define DW_UART_CPR 0xf4 /* Component Parameter Register */
#define DW_UART_UCV 0xf8 /* UART Component Version */
/* Receive / Transmit Address Register bits */
#define DW_UART_ADDR_MASK GENMASK(7, 0)
/* Line Status Register bits */
#define DW_UART_LSR_ADDR_RCVD BIT(8)
/* Transceiver Control Register bits */
#define DW_UART_TCR_RS485_EN BIT(0)
#define DW_UART_TCR_RE_POL BIT(1)
#define DW_UART_TCR_DE_POL BIT(2)
#define DW_UART_TCR_XFER_MODE GENMASK(4, 3)
#define DW_UART_TCR_XFER_MODE_DE_DURING_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 0)
#define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 1)
#define DW_UART_TCR_XFER_MODE_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 2)
/* Line Extended Control Register bits */
#define DW_UART_LCR_EXT_DLS_E BIT(0)
#define DW_UART_LCR_EXT_ADDR_MATCH BIT(1)
#define DW_UART_LCR_EXT_SEND_ADDR BIT(2)
#define DW_UART_LCR_EXT_TRANSMIT_MODE BIT(3)
/* Component Parameter Register bits */
#define DW_UART_CPR_ABP_DATA_WIDTH GENMASK(1, 0)
#define DW_UART_CPR_AFCE_MODE BIT(4)
#define DW_UART_CPR_THRE_MODE BIT(5)
#define DW_UART_CPR_SIR_MODE BIT(6)
#define DW_UART_CPR_SIR_LP_MODE BIT(7)
#define DW_UART_CPR_ADDITIONAL_FEATURES BIT(8)
#define DW_UART_CPR_FIFO_ACCESS BIT(9)
#define DW_UART_CPR_FIFO_STAT BIT(10)
#define DW_UART_CPR_SHADOW BIT(11)
#define DW_UART_CPR_ENCODED_PARMS BIT(12)
#define DW_UART_CPR_DMA_EXTRA BIT(13)
#define DW_UART_CPR_FIFO_MODE GENMASK(23, 16)
/* Helper for FIFO size calculation */
#define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * 16)
/*
* divisor = div(I) + div(F)
* "I" means integer, "F" means fractional

73
drivers/tty/serial/8250/8250_dwlib.h
View File

@@ -1,11 +1,82 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* Synopsys DesignWare 8250 library header file. */
#ifndef _SERIAL_8250_DWLIB_H_
#define _SERIAL_8250_DWLIB_H_
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/build_bug.h>
#include <linux/io.h>
#include <linux/types.h>
#include "8250.h"
/* Offsets for the DesignWare specific registers */
#define DW_UART_USR 0x1f /* UART Status Register */
#define DW_UART_DMASA 0xa8 /* DMA Software Ack */
#define DW_UART_TCR 0xac /* Transceiver Control Register (RS485) */
#define DW_UART_DE_EN 0xb0 /* Driver Output Enable Register */
#define DW_UART_RE_EN 0xb4 /* Receiver Output Enable Register */
#define DW_UART_DLF 0xc0 /* Divisor Latch Fraction Register */
#define DW_UART_RAR 0xc4 /* Receive Address Register */
#define DW_UART_TAR 0xc8 /* Transmit Address Register */
#define DW_UART_LCR_EXT 0xcc /* Line Extended Control Register */
#define DW_UART_CPR 0xf4 /* Component Parameter Register */
#define DW_UART_UCV 0xf8 /* UART Component Version */
/* Interrupt ID Register bits */
#define DW_UART_IIR_IID GENMASK(3, 0)
/* Modem Control Register bits */
#define DW_UART_MCR_SIRE BIT(6)
/* Line Status Register bits */
#define DW_UART_LSR_ADDR_RCVD BIT(8)
/* UART Status Register bits */
#define DW_UART_USR_BUSY BIT(0)
/* Transceiver Control Register bits */
#define DW_UART_TCR_RS485_EN BIT(0)
#define DW_UART_TCR_RE_POL BIT(1)
#define DW_UART_TCR_DE_POL BIT(2)
#define DW_UART_TCR_XFER_MODE GENMASK(4, 3)
#define DW_UART_TCR_XFER_MODE_DE_DURING_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 0)
#define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 1)
#define DW_UART_TCR_XFER_MODE_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 2)
/* Receive / Transmit Address Register bits */
#define DW_UART_ADDR_MASK GENMASK(7, 0)
/* Line Extended Control Register bits */
#define DW_UART_LCR_EXT_DLS_E BIT(0)
#define DW_UART_LCR_EXT_ADDR_MATCH BIT(1)
#define DW_UART_LCR_EXT_SEND_ADDR BIT(2)
#define DW_UART_LCR_EXT_TRANSMIT_MODE BIT(3)
/* Component Parameter Register bits */
#define DW_UART_CPR_ABP_DATA_WIDTH GENMASK(1, 0)
#define DW_UART_CPR_AFCE_MODE BIT(4)
#define DW_UART_CPR_THRE_MODE BIT(5)
#define DW_UART_CPR_SIR_MODE BIT(6)
#define DW_UART_CPR_SIR_LP_MODE BIT(7)
#define DW_UART_CPR_ADDITIONAL_FEATURES BIT(8)
#define DW_UART_CPR_FIFO_ACCESS BIT(9)
#define DW_UART_CPR_FIFO_STAT BIT(10)
#define DW_UART_CPR_SHADOW BIT(11)
#define DW_UART_CPR_ENCODED_PARMS BIT(12)
#define DW_UART_CPR_DMA_EXTRA BIT(13)
#define DW_UART_CPR_FIFO_MODE GENMASK(23, 16)
/* Helpers for FIFO size calculation */
#define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * 16)
#define DW_UART_CPR_FIFO_MODE_FROM_SIZE(size) \
(FIELD_PREP_CONST(DW_UART_CPR_FIFO_MODE, \
BUILD_BUG_ON_ZERO((size) > 2048) + \
BUILD_BUG_ON_ZERO((size) % 16) + \
((size) / 16)))
struct dw8250_port_data {
/* Port properties */
int line;
@@ -38,3 +109,5 @@ static inline void dw8250_writel_ext(struct uart_port *p, int offset, u32 reg)
else
writel(reg, p->membase + offset);
}
#endif /* _SERIAL_8250_DWLIB_H_ */

23
drivers/tty/serial/8250/8250_mtk.c
View File

@@ -19,6 +19,7 @@
#include <linux/dma-mapping.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/units.h>
#include "8250.h"
@@ -521,6 +522,7 @@ static int mtk8250_probe(struct platform_device *pdev)
struct mtk8250_data *data;
struct resource *regs;
int irq, err;
struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev);
irq = platform_get_irq(pdev, 0);
if (irq < 0)
@@ -543,12 +545,13 @@ static int mtk8250_probe(struct platform_device *pdev)
data->clk_count = 0;
if (pdev->dev.of_node) {
if (is_of_node(fwnode)) {
err = mtk8250_probe_of(pdev, &uart.port, data);
if (err)
return err;
} else
} else if (!fwnode) {
return -ENODEV;
}
spin_lock_init(&uart.port.lock);
uart.port.mapbase = regs->start;
@@ -564,14 +567,18 @@ static int mtk8250_probe(struct platform_device *pdev)
uart.port.startup = mtk8250_startup;
uart.port.set_termios = mtk8250_set_termios;
uart.port.uartclk = clk_get_rate(data->uart_clk);
if (!uart.port.uartclk)
uart.port.uartclk = 26 * HZ_PER_MHZ;
#ifdef CONFIG_SERIAL_8250_DMA
if (data->dma)
uart.dma = data->dma;
#endif
/* Disable Rate Fix function */
writel(0x0, uart.port.membase +
if (is_of_node(fwnode)) {
/* Disable Rate Fix function */
writel(0x0, uart.port.membase +
(MTK_UART_RATE_FIX << uart.port.regshift));
}
platform_set_drvdata(pdev, data);
@@ -649,11 +656,19 @@ static const struct of_device_id mtk8250_of_match[] = {
};
MODULE_DEVICE_TABLE(of, mtk8250_of_match);
static const struct acpi_device_id mtk8250_acpi_match[] = {
{ "MTKI0511" },
{ "NVDA0240" },
{}
};
MODULE_DEVICE_TABLE(acpi, mtk8250_acpi_match);
static struct platform_driver mtk8250_platform_driver = {
.driver = {
.name = "mt6577-uart",
.pm = &mtk8250_pm_ops,
.of_match_table = mtk8250_of_match,
.acpi_match_table = mtk8250_acpi_match,
},
.probe = mtk8250_probe,
.remove = mtk8250_remove,

3120
drivers/tty/serial/8250/8250_pci.c
View File

File diff suppressed because it is too large Load Diff

30
drivers/tty/serial/8250/8250_port.c
View File

@@ -458,6 +458,8 @@ static void set_io_from_upio(struct uart_port *p)
p->serial_out = io_serial_out;
break;
#endif
case UPIO_AU:
break;
default:
WARN(p->iotype != UPIO_PORT || p->iobase,
"Unsupported UART type %x\n", p->iotype);
@@ -1800,6 +1802,13 @@ void serial8250_handle_irq_locked(struct uart_port *port, unsigned int iir)
status = serial_lsr_in(up);
/*
* Recover from no-data-ready and FIFO error condition to avoid getting
* stuck in the ISR.
*/
if (!(status & UART_LSR_DR) && (status & UART_LSR_FIFOE))
serial8250_clear_and_reinit_fifos(up);
/*
* If port is stopped and there are no error conditions in the
* FIFO, then don't drain the FIFO, as this may lead to TTY buffer
@@ -1987,16 +1996,20 @@ static bool wait_for_lsr(struct uart_8250_port *up, int bits)
static void wait_for_xmitr(struct uart_8250_port *up, int bits)
{
unsigned int tmout;
bool tx_ready;
wait_for_lsr(up, bits);
tx_ready = wait_for_lsr(up, bits);
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
if (uart_console_hwflow_active(&up->port)) {
for (tmout = 1000000; tmout; tmout--) {
unsigned int msr = serial_in(up, UART_MSR);
up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
if (msr & UART_MSR_CTS)
if (msr & UART_MSR_CTS) {
if (!tx_ready)
wait_for_lsr(up, bits);
break;
}
udelay(1);
touch_nmi_watchdog();
}
@@ -2785,6 +2798,12 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
serial8250_set_efr(port, termios);
serial8250_set_divisor(port, baud, quot, frac);
serial8250_set_fcr(port, termios);
/* Consoles manually poll CTS for hardware flow control. */
if (uart_console(port) &&
!(port->rs485.flags & SER_RS485_ENABLED)
&& termios->c_cflag & CRTSCTS) {
port->mctrl |= TIOCM_RTS;
}
serial8250_set_mctrl(port, port->mctrl);
}
@@ -3354,7 +3373,7 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s,
* it regardless of the CTS state. Therefore, only use fifo
* if we don't use control flow.
*/
!(up->port.flags & UPF_CONS_FLOW);
!uart_console_hwflow_active(&up->port);
if (likely(use_fifo))
serial8250_console_fifo_write(up, s, count);
@@ -3424,6 +3443,9 @@ int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
if (ret)
return ret;
/* Track user-specified console flow control. */
uart_set_cons_flow_enabled(port, flow == 'r');
if (port->dev)
pm_runtime_get_sync(port->dev);

6
drivers/tty/serial/Kconfig
View File

@@ -321,7 +321,7 @@ config SERIAL_MAX3100
config SERIAL_MAX310X
tristate "MAX310X support"
depends on SPI_MASTER
depends on (SPI_MASTER && !I2C) || I2C
select SERIAL_CORE
select REGMAP_SPI if SPI_MASTER
select REGMAP_I2C if I2C
@@ -913,13 +913,13 @@ config SERIAL_MSM_CONSOLE
select SERIAL_EARLYCON
config SERIAL_QCOM_GENI
tristate "QCOM on-chip GENI based serial port support"
tristate "Qualcomm on-chip GENI based serial port support"
depends on ARCH_QCOM || COMPILE_TEST
depends on QCOM_GENI_SE
select SERIAL_CORE
config SERIAL_QCOM_GENI_CONSOLE
bool "QCOM GENI Serial Console support"
bool "Qualcomm GENI Serial Console support"
depends on SERIAL_QCOM_GENI
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON

42
drivers/tty/serial/amba-pl011.c
View File

@@ -240,6 +240,38 @@ static struct vendor_data vendor_nvidia = {
.get_fifosize = get_fifosize_nvidia,
};
static const u16 pl011_zte_offsets[REG_ARRAY_SIZE] = {
[REG_DR] = ZX_UART011_DR,
[REG_FR] = ZX_UART011_FR,
[REG_LCRH_RX] = ZX_UART011_LCRH,
[REG_LCRH_TX] = ZX_UART011_LCRH,
[REG_IBRD] = ZX_UART011_IBRD,
[REG_FBRD] = ZX_UART011_FBRD,
[REG_CR] = ZX_UART011_CR,
[REG_IFLS] = ZX_UART011_IFLS,
[REG_IMSC] = ZX_UART011_IMSC,
[REG_RIS] = ZX_UART011_RIS,
[REG_MIS] = ZX_UART011_MIS,
[REG_ICR] = ZX_UART011_ICR,
[REG_DMACR] = ZX_UART011_DMACR,
};
static unsigned int get_fifosize_zte(struct amba_device *dev)
{
return 16;
}
static struct vendor_data vendor_zte = {
.reg_offset = pl011_zte_offsets,
.access_32b = true,
.ifls = UART011_IFLS_RX4_8 | UART011_IFLS_TX4_8,
.fr_busy = ZX_UART01x_FR_BUSY,
.fr_dsr = ZX_UART01x_FR_DSR,
.fr_cts = ZX_UART01x_FR_CTS,
.fr_ri = ZX_UART011_FR_RI,
.get_fifosize = get_fifosize_zte,
};
/* Deals with DMA transactions */
struct pl011_dmabuf {
@@ -3180,6 +3212,16 @@ static const struct amba_id pl011_ids[] = {
.mask = 0x000fffff,
.data = &vendor_nvidia,
},
{
/* This is an invented ID. The actual hardware that contains
* these ZTE UARTs (zx29 boards) has no AMBA PIDs stored. ZTE
* JEDEC ID (ignoring banks) and the "011" part number as used
* by ARM.
*/
.id = 0x0008c011,
.mask = 0x000fffff,
.data = &vendor_zte,
},
{ 0, 0 },
};

2
drivers/tty/serial/apbuart.c
View File

@@ -210,8 +210,6 @@ static void apbuart_set_termios(struct uart_port *port,
/* Ask the core to calculate the divisor for us. */
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
if (baud == 0)
panic("invalid baudrate %i\n", port->uartclk / 16);
/* uart_get_divisor calc a *16 uart freq, apbuart is *8 */
quot = (uart_get_divisor(port, baud)) * 2;

2
drivers/tty/serial/bcm63xx_uart.c
View File

@@ -675,7 +675,7 @@ static void wait_for_xmitr(struct uart_port *port)
}
/* Wait up to 1s for flow control if necessary */
if (port->flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(port)) {
tmout = 1000000;
while (--tmout) {
unsigned int val;

2
drivers/tty/serial/icom.c
View File

@@ -1396,8 +1396,6 @@ static void icom_set_termios(struct uart_port *port, struct ktermios *termios,
baud = uart_get_baud_rate(port, termios, old_termios,
icom_acfg_baud[0],
icom_acfg_baud[BAUD_TABLE_LIMIT]);
if (!baud)
baud = 9600; /* B0 transition handled in rs_set_termios */
for (index = 0; index < BAUD_TABLE_LIMIT; index++) {
if (icom_acfg_baud[index] == baud) {

38
drivers/tty/serial/jsm/jsm_driver.c
View File

@@ -296,25 +296,25 @@ static void jsm_remove_one(struct pci_dev *pdev)
}
static const struct pci_device_id jsm_pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_2DB9), 0, 0, 0 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_2DB9PRI), 0, 0, 1 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_2RJ45), 0, 0, 2 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_2RJ45PRI), 0, 0, 3 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4_IBM), 0, 0, 4 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_NEO_8), 0, 0, 5 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_4), 0, 0, 6 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_1_422), 0, 0, 7 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_1_422_485), 0, 0, 8 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_NEO_2_422_485), 0, 0, 9 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_8), 0, 0, 10 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4), 0, 0, 11 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4RJ45), 0, 0, 12 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_8RJ45), 0, 0, 13 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_4), 0, 0, 14 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_4_422), 0, 0, 15 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_8), 0, 0, 16 },
{ PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_8_422), 0, 0, 17 },
{ 0, }
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_2DB9) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_2DB9PRI) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_2RJ45) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_2RJ45PRI) },
{ PCI_VDEVICE(DIGI, PCIE_DEVICE_ID_NEO_4_IBM) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_NEO_8) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_4) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_1_422) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_1_422_485) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_NEO_2_422_485) },
{ PCI_VDEVICE(DIGI, PCIE_DEVICE_ID_NEO_8) },
{ PCI_VDEVICE(DIGI, PCIE_DEVICE_ID_NEO_4) },
{ PCI_VDEVICE(DIGI, PCIE_DEVICE_ID_NEO_4RJ45) },
{ PCI_VDEVICE(DIGI, PCIE_DEVICE_ID_NEO_8RJ45) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_CLASSIC_4) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_CLASSIC_4_422) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_CLASSIC_8) },
{ PCI_VDEVICE(DIGI, PCI_DEVICE_ID_CLASSIC_8_422) },
{ }
};
MODULE_DEVICE_TABLE(pci, jsm_pci_tbl);

235
drivers/tty/serial/max310x.c
View File

@@ -9,12 +9,14 @@
* Based on max3107.c, by Aavamobile
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/gpio/driver.h>
#include <linux/i2c.h>
#include <linux/kconfig.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/property.h>
@@ -241,12 +243,12 @@
#define MAX310X_WRITE_BIT 0x80
/* Port startup definitions */
#define MAX310X_PORT_STARTUP_WAIT_RETRIES 20 /* Number of retries */
#define MAX310X_PORT_STARTUP_WAIT_DELAY_MS 10 /* Delay between retries */
#define MAX310X_PORT_STARTUP_SLEEP_US 10000 /* Delay between retries */
#define MAX310X_PORT_STARTUP_TIMEOUT_US (20 * MAX310X_PORT_STARTUP_SLEEP_US) /* Total timeout */
/* Crystal-related definitions */
#define MAX310X_XTAL_WAIT_RETRIES 20 /* Number of retries */
#define MAX310X_XTAL_WAIT_DELAY_MS 10 /* Delay between retries */
#define MAX310X_XTAL_SLEEP_US 10000 /* Delay between retries */
#define MAX310X_XTAL_TIMEOUT_US (20 * MAX310X_XTAL_SLEEP_US) /* Total timeout */
/* MAX3107 specific */
#define MAX3107_REV_ID (0xa0)
@@ -258,6 +260,17 @@
#define MAX14830_BRGCFG_CLKDIS_BIT (1 << 6) /* Clock Disable */
#define MAX14830_REV_ID (0xb0)
struct max310x_clk_config_t {
u8 prediv; /* Predivider */
u8 pll_mult; /* PLL multiplier */
unsigned int fref; /*
* Reference clock for fractional baud rate generator:
* PLL enabled: (freq / prediv) x pll_mult
* PLL disabled: freq
*/
unsigned int err; /* Computed error for selected parameters */
};
struct max310x_if_cfg {
int (*extended_reg_enable)(struct device *dev, bool enable);
u8 rev_id_offset;
@@ -545,70 +558,91 @@ static int max310x_set_baud(struct uart_port *port, int baud)
return (16*port->uartclk) / (c*(16*div + frac));
}
static int max310x_update_best_err(unsigned long f, long *besterr)
static void max310x_try_cfg(unsigned int fdiv, u8 div, u8 pll_mult,
struct max310x_clk_config_t *cfg)
{
/* Use baudrate 115200 for calculate error */
long err = f % (460800 * 16);
unsigned int fmul = fdiv * pll_mult;
unsigned int err;
if ((*besterr < 0) || (*besterr > err)) {
*besterr = err;
return 0;
/* Use high-enough baudrate to calculate error */
err = fmul % (460800 * 16);
if (cfg->err > err) {
cfg->err = err;
cfg->pll_mult = pll_mult;
cfg->prediv = div;
cfg->fref = fmul;
}
return 1;
}
static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
unsigned long freq, bool xtal)
static u8 max310x_pll_mult_to_id(u8 pll_mult)
{
unsigned int div, clksrc, pllcfg = 0;
long besterr = -1;
unsigned long fdiv, fmul, bestfreq = freq;
switch (pll_mult) {
case 144: return 3;
case 96: return 2;
case 48: return 1;
case 6:
default: return 0;
}
}
/*
* From table 7 in datasheet: PLLFactor Selector Guide
*
* +-----------+----------------+-------------------+-------------------+
* | PLLFactor | MULTIPLICATION | fPLLIN | fREF |
* | (1 & 0) | FACTOR +---------+---------+---------+---------+
* | | | MIN | MAX | MIN | MAX |
* +-----------+----------------+---------+---------+---------+---------+
* | 0 | 6 | 500kHz | 800kHz | 3MHz | 4.8MHz |
* +-----------+----------------+---------+---------+---------+---------+
* | 1 | 48 | 850kHz | 1.2MHz | 40.8MHz | 56MHz |
* +-----------+----------------+---------+---------+---------+---------+
* | 2 | 96 | 425kHz | 1MHz | 40.8MHz | 96MHz |
* +-----------+----------------+---------+---------+---------+---------+
* | 3 | 144 | 390kHz | 667kHz | 56MHz | 96MHz |
* +-----------+----------------+---------+---------+---------+---------+
*/
static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
unsigned int freq, unsigned int *fref, bool xtal)
{
unsigned int div, fdiv, clksrc, val;
struct max310x_clk_config_t cfg;
cfg.err = UINT_MAX;
cfg.prediv = 0;
cfg.fref = freq;
/* First, update error without PLL */
max310x_update_best_err(freq, &besterr);
max310x_try_cfg(freq, 1, 1, &cfg);
/* Try all possible PLL dividers */
for (div = 1; (div <= 63) && besterr; div++) {
for (div = 1; (div <= 63) && cfg.err; div++) {
fdiv = DIV_ROUND_CLOSEST(freq, div);
/* Try multiplier 6 */
fmul = fdiv * 6;
if ((fdiv >= 500000) && (fdiv <= 800000))
if (!max310x_update_best_err(fmul, &besterr)) {
pllcfg = (0 << 6) | div;
bestfreq = fmul;
}
/* Try multiplier 48 */
fmul = fdiv * 48;
if ((fdiv >= 850000) && (fdiv <= 1200000))
if (!max310x_update_best_err(fmul, &besterr)) {
pllcfg = (1 << 6) | div;
bestfreq = fmul;
}
/* Try multiplier 96 */
fmul = fdiv * 96;
max310x_try_cfg(fdiv, div, 6, &cfg); /* PLL x6 */
else if ((fdiv >= 850000) && (fdiv <= 1200000))
max310x_try_cfg(fdiv, div, 48, &cfg); /* PLL x48 */
if ((fdiv >= 425000) && (fdiv <= 1000000))
if (!max310x_update_best_err(fmul, &besterr)) {
pllcfg = (2 << 6) | div;
bestfreq = fmul;
}
/* Try multiplier 144 */
fmul = fdiv * 144;
max310x_try_cfg(fdiv, div, 96, &cfg); /* PLL x96 */
if ((fdiv >= 390000) && (fdiv <= 667000))
if (!max310x_update_best_err(fmul, &besterr)) {
pllcfg = (3 << 6) | div;
bestfreq = fmul;
}
max310x_try_cfg(fdiv, div, 144, &cfg); /* PLL x144 */
}
/* Configure clock source */
clksrc = MAX310X_CLKSRC_EXTCLK_BIT | (xtal ? MAX310X_CLKSRC_CRYST_BIT : 0);
/* Configure PLL */
if (pllcfg) {
if (cfg.prediv) {
u8 pll_id = max310x_pll_mult_to_id(cfg.pll_mult);
clksrc |= MAX310X_CLKSRC_PLL_BIT;
regmap_write(s->regmap, MAX310X_PLLCFG_REG, pllcfg);
val = FIELD_PREP(MAX310X_PLLCFG_PLLFACTOR_MASK, pll_id) |
FIELD_PREP(MAX310X_PLLCFG_PREDIV_MASK, cfg.prediv);
regmap_write(s->regmap, MAX310X_PLLCFG_REG, val);
} else
clksrc |= MAX310X_CLKSRC_PLLBYP_BIT;
@@ -616,23 +650,20 @@ static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
/* Wait for crystal */
if (xtal) {
bool stable = false;
unsigned int try = 0, val = 0;
int ret;
do {
msleep(MAX310X_XTAL_WAIT_DELAY_MS);
regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);
if (val & MAX310X_STS_CLKREADY_BIT)
stable = true;
} while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES));
if (!stable)
ret = regmap_read_poll_timeout(s->regmap, MAX310X_STS_IRQSTS_REG,
val, val & MAX310X_STS_CLKREADY_BIT,
MAX310X_XTAL_SLEEP_US,
MAX310X_XTAL_TIMEOUT_US);
if (ret)
return dev_err_probe(dev, -EAGAIN,
"clock is not stable\n");
}
return bestfreq;
*fref = cfg.fref;
return 0;
}
static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
@@ -748,8 +779,6 @@ static void max310x_handle_rx(struct uart_port *port, unsigned int rxlen)
static void max310x_handle_tx(struct uart_port *port)
{
struct tty_port *tport = &port->state->port;
unsigned int txlen, to_send;
unsigned char *tail;
if (unlikely(port->x_char)) {
max310x_port_write(port, MAX310X_THR_REG, port->x_char);
@@ -766,6 +795,9 @@ static void max310x_handle_tx(struct uart_port *port)
* We could do that in one SPI transaction, but meh.
*/
while (!kfifo_is_empty(&tport->xmit_fifo)) {
unsigned int txlen, to_send;
unsigned char *tail;
/* Limit to space available in TX FIFO */
txlen = max310x_port_read(port, MAX310X_TXFIFOLVL_REG);
txlen = port->fifosize - txlen;
@@ -1268,9 +1300,10 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
const struct max310x_if_cfg *if_cfg,
struct regmap *regmaps[], int irq)
{
int i, ret, fmin, fmax, freq;
unsigned int fmin, fmax, freq;
int i, ret;
struct max310x_port *s;
s32 uartclk = 0;
unsigned int uartclk = 0;
bool xtal;
for (i = 0; i < devtype->nr; i++)
@@ -1330,8 +1363,7 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
goto out_clk;
for (i = 0; i < devtype->nr; i++) {
bool started = false;
unsigned int try = 0, val = 0;
unsigned int val;
/* Reset port */
regmap_write(regmaps[i], MAX310X_MODE2_REG,
@@ -1340,15 +1372,11 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
regmap_write(regmaps[i], MAX310X_MODE2_REG, 0);
/* Wait for port startup */
do {
msleep(MAX310X_PORT_STARTUP_WAIT_DELAY_MS);
regmap_read(regmaps[i], MAX310X_BRGDIVLSB_REG, &val);
if (val == 0x01)
started = true;
} while (!started && (++try < MAX310X_PORT_STARTUP_WAIT_RETRIES));
if (!started) {
ret = regmap_read_poll_timeout(regmaps[i], MAX310X_BRGDIVLSB_REG,
val, val == 0x01,
MAX310X_PORT_STARTUP_SLEEP_US,
MAX310X_PORT_STARTUP_TIMEOUT_US);
if (ret) {
ret = dev_err_probe(dev, -EAGAIN, "port reset failed\n");
goto out_uart;
}
@@ -1356,11 +1384,9 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);
}
uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
if (uartclk < 0) {
ret = uartclk;
ret = max310x_set_ref_clk(dev, s, freq, &uartclk, xtal);
if (ret < 0)
goto out_uart;
}
dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
@@ -1482,6 +1508,21 @@ static const struct of_device_id __maybe_unused max310x_dt_ids[] = {
};
MODULE_DEVICE_TABLE(of, max310x_dt_ids);
static const char *max310x_regmap_name(u8 port_id)
{
switch (port_id) {
case 0: return "port0";
case 1: return "port1";
case 2: return "port2";
case 3: return "port3";
default:
WARN_ON(true);
return NULL;
}
}
#if IS_ENABLED(CONFIG_SPI_MASTER)
static struct regmap_config regcfg = {
.reg_bits = 8,
.val_bits = 8,
@@ -1497,20 +1538,6 @@ static struct regmap_config regcfg = {
.max_raw_write = MAX310X_FIFO_SIZE,
};
static const char *max310x_regmap_name(u8 port_id)
{
switch (port_id) {
case 0: return "port0";
case 1: return "port1";
case 2: return "port2";
case 3: return "port3";
default:
WARN_ON(true);
return NULL;
}
}
#ifdef CONFIG_SPI_MASTER
static int max310x_spi_extended_reg_enable(struct device *dev, bool enable)
{
struct max310x_port *s = dev_get_drvdata(dev);
@@ -1581,7 +1608,8 @@ static struct spi_driver max310x_spi_driver = {
};
#endif
#ifdef CONFIG_I2C
#if IS_ENABLED(CONFIG_I2C)
static int max310x_i2c_extended_reg_enable(struct device *dev, bool enable)
{
return 0;
@@ -1671,10 +1699,10 @@ static void max310x_i2c_remove(struct i2c_client *client)
}
static const struct i2c_device_id max310x_i2c_id_table[] = {
{ "max3107", (kernel_ulong_t)&max3107_devtype, },
{ "max3108", (kernel_ulong_t)&max3108_devtype, },
{ "max3109", (kernel_ulong_t)&max3109_devtype, },
{ "max14830", (kernel_ulong_t)&max14830_devtype, },
{ .name = "max3107", .driver_data = (kernel_ulong_t)&max3107_devtype },
{ .name = "max3108", .driver_data = (kernel_ulong_t)&max3108_devtype },
{ .name = "max3109", .driver_data = (kernel_ulong_t)&max3109_devtype },
{ .name = "max14830", .driver_data = (kernel_ulong_t)&max14830_devtype },
{ }
};
MODULE_DEVICE_TABLE(i2c, max310x_i2c_id_table);
@@ -1701,13 +1729,13 @@ static int __init max310x_uart_init(void)
if (ret)
return ret;
#ifdef CONFIG_SPI_MASTER
#if IS_ENABLED(CONFIG_SPI_MASTER)
ret = spi_register_driver(&max310x_spi_driver);
if (ret)
goto err_spi_register;
#endif
#ifdef CONFIG_I2C
#if IS_ENABLED(CONFIG_I2C)
ret = i2c_add_driver(&max310x_i2c_driver);
if (ret)
goto err_i2c_register;
@@ -1715,12 +1743,13 @@ static int __init max310x_uart_init(void)
return 0;
#ifdef CONFIG_I2C
#if IS_ENABLED(CONFIG_I2C)
err_i2c_register:
spi_unregister_driver(&max310x_spi_driver);
#endif
#if IS_ENABLED(CONFIG_SPI_MASTER)
spi_unregister_driver(&max310x_spi_driver);
err_spi_register:
#endif
uart_unregister_driver(&max310x_uart);
return ret;
@@ -1729,11 +1758,11 @@ module_init(max310x_uart_init);
static void __exit max310x_uart_exit(void)
{
#ifdef CONFIG_I2C
#if IS_ENABLED(CONFIG_I2C)
i2c_del_driver(&max310x_i2c_driver);
#endif
#ifdef CONFIG_SPI_MASTER
#if IS_ENABLED(CONFIG_SPI_MASTER)
spi_unregister_driver(&max310x_spi_driver);
#endif

2
drivers/tty/serial/mxs-auart.c
View File

@@ -1520,7 +1520,7 @@ static int mxs_auart_init_gpios(struct mxs_auart_port *s, struct device *dev)
for (i = 0; i < UART_GPIO_MAX; i++) {
gpiod = mctrl_gpio_to_gpiod(s->gpios, i);
if (gpiod && (gpiod_get_direction(gpiod) == 1))
if (gpiod && (gpiod_get_direction(gpiod) == GPIO_LINE_DIRECTION_IN))
s->gpio_irq[i] = gpiod_to_irq(gpiod);
else
s->gpio_irq[i] = -EINVAL;

2
drivers/tty/serial/omap-serial.c
View File

@@ -1092,7 +1092,7 @@ static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up)
} while (!uart_lsr_tx_empty(status));
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(&up->port)) {
for (tmout = 1000000; tmout; tmout--) {
unsigned int msr = serial_in(up, UART_MSR);

2
drivers/tty/serial/pch_uart.c
View File

@@ -1451,7 +1451,7 @@ static void wait_for_xmitr(struct eg20t_port *up, int bits)
}
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(&up->port)) {
unsigned int tmout;
for (tmout = 1000000; tmout; tmout--) {
unsigned int msr = ioread8(up->membase + UART_MSR);

2
drivers/tty/serial/pxa.c
View File

@@ -573,7 +573,7 @@ static void wait_for_xmitr(struct uart_pxa_port *up)
} while (!uart_lsr_tx_empty(status));
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(&up->port)) {
tmout = 1000000;
while (--tmout &&
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))

29
drivers/tty/serial/qcom_geni_serial.c
View File

@@ -905,12 +905,9 @@ static void qcom_geni_serial_handle_rx_dma(struct uart_port *uport, bool drop)
port->rx_dma_addr = 0;
rx_in = readl(uport->membase + SE_DMA_RX_LEN_IN);
if (!rx_in) {
dev_warn(uport->dev, "serial engine reports 0 RX bytes in!\n");
return;
}
if (!drop)
if (!rx_in)
dev_warn_ratelimited(uport->dev, "serial engine reports 0 RX bytes in!\n");
else if (!drop)
handle_rx_uart(uport, rx_in);
ret = geni_se_rx_dma_prep(&port->se, port->rx_buf,
@@ -2004,6 +2001,7 @@ static int qcom_geni_serial_resume(struct device *dev)
return ret;
}
#if IS_ENABLED(CONFIG_SERIAL_QCOM_GENI_CONSOLE)
static const struct qcom_geni_device_data qcom_geni_console_data = {
.console = true,
.mode = GENI_SE_FIFO,
@@ -2012,14 +2010,6 @@ static const struct qcom_geni_device_data qcom_geni_console_data = {
.power_state = geni_serial_resource_state,
};
static const struct qcom_geni_device_data qcom_geni_uart_data = {
.console = false,
.mode = GENI_SE_DMA,
.resources_init = geni_serial_resource_init,
.set_rate = geni_serial_set_rate,
.power_state = geni_serial_resource_state,
};
static const struct qcom_geni_device_data sa8255p_qcom_geni_console_data = {
.console = true,
.mode = GENI_SE_FIFO,
@@ -2031,6 +2021,15 @@ static const struct qcom_geni_device_data sa8255p_qcom_geni_console_data = {
.resources_init = geni_serial_pwr_init,
.set_rate = geni_serial_set_level,
};
#endif
static const struct qcom_geni_device_data qcom_geni_uart_data = {
.console = false,
.mode = GENI_SE_DMA,
.resources_init = geni_serial_resource_init,
.set_rate = geni_serial_set_rate,
.power_state = geni_serial_resource_state,
};
static const struct qcom_geni_device_data sa8255p_qcom_geni_uart_data = {
.console = false,
@@ -2051,6 +2050,7 @@ static const struct dev_pm_ops qcom_geni_serial_pm_ops = {
};
static const struct of_device_id qcom_geni_serial_match_table[] = {
#if IS_ENABLED(CONFIG_SERIAL_QCOM_GENI_CONSOLE)
{
.compatible = "qcom,geni-debug-uart",
.data = &qcom_geni_console_data,
@@ -2059,6 +2059,7 @@ static const struct of_device_id qcom_geni_serial_match_table[] = {
.compatible = "qcom,sa8255p-geni-debug-uart",
.data = &sa8255p_qcom_geni_console_data,
},
#endif
{
.compatible = "qcom,geni-uart",
.data = &qcom_geni_uart_data,

8
drivers/tty/serial/samsung_tty.c
View File

@@ -311,7 +311,7 @@ static void s3c24xx_serial_stop_tx(struct uart_port *port)
ourport->tx_enabled = 0;
ourport->tx_in_progress = 0;
if (port->flags & UPF_CONS_FLOW)
if (uart_cons_flow_enabled(port))
s3c24xx_serial_rx_enable(port);
ourport->tx_mode = 0;
@@ -485,7 +485,7 @@ static void s3c24xx_serial_start_tx(struct uart_port *port)
struct tty_port *tport = &port->state->port;
if (!ourport->tx_enabled) {
if (port->flags & UPF_CONS_FLOW)
if (uart_cons_flow_enabled(port))
s3c24xx_serial_rx_disable(port);
ourport->tx_enabled = 1;
@@ -773,7 +773,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport)
uerstat = rd_regl(port, S3C2410_UERSTAT);
ch = rd_reg(port, S3C2410_URXH);
if (port->flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(port)) {
bool txe = s3c24xx_serial_txempty_nofifo(port);
if (ourport->rx_enabled) {
@@ -1822,7 +1822,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
if (cfg->uart_flags & UPF_CONS_FLOW) {
dev_dbg(port->dev, "enabling flow control\n");
port->flags |= UPF_CONS_FLOW;
uart_set_cons_flow_enabled(port, true);
}
/* sort our the physical and virtual addresses for each UART */

14
drivers/tty/serial/sc16is7xx_i2c.c
View File

@@ -39,13 +39,13 @@ static void sc16is7xx_i2c_remove(struct i2c_client *client)
}
static const struct i2c_device_id sc16is7xx_i2c_id_table[] = {
{ "sc16is74x", (kernel_ulong_t)&sc16is74x_devtype, },
{ "sc16is740", (kernel_ulong_t)&sc16is74x_devtype, },
{ "sc16is741", (kernel_ulong_t)&sc16is74x_devtype, },
{ "sc16is750", (kernel_ulong_t)&sc16is750_devtype, },
{ "sc16is752", (kernel_ulong_t)&sc16is752_devtype, },
{ "sc16is760", (kernel_ulong_t)&sc16is760_devtype, },
{ "sc16is762", (kernel_ulong_t)&sc16is762_devtype, },
{ .name = "sc16is74x", .driver_data = (kernel_ulong_t)&sc16is74x_devtype },
{ .name = "sc16is740", .driver_data = (kernel_ulong_t)&sc16is74x_devtype },
{ .name = "sc16is741", .driver_data = (kernel_ulong_t)&sc16is74x_devtype },
{ .name = "sc16is750", .driver_data = (kernel_ulong_t)&sc16is750_devtype },
{ .name = "sc16is752", .driver_data = (kernel_ulong_t)&sc16is752_devtype },
{ .name = "sc16is760", .driver_data = (kernel_ulong_t)&sc16is760_devtype },
{ .name = "sc16is762", .driver_data = (kernel_ulong_t)&sc16is762_devtype },
{ }
};
MODULE_DEVICE_TABLE(i2c, sc16is7xx_i2c_id_table);

57
drivers/tty/serial/serial_core.c
View File

@@ -462,10 +462,10 @@ EXPORT_SYMBOL(uart_update_timeout);
*
* Decode the termios structure into a numeric baud rate, taking account of the
* magic 38400 baud rate (with spd_* flags), and mapping the %B0 rate to 9600
* baud.
* baud or min argument, whichever is greater.
*
* If the new baud rate is invalid, try the @old termios setting. If it's still
* invalid, we try 9600 baud. If that is also invalid 0 is returned.
* invalid, clip to the nearest chip supported rate.
*
* The @termios structure is updated to reflect the baud rate we're actually
* going to be using. Don't do this for the case where B0 is requested ("hang
@@ -480,7 +480,6 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
unsigned int try;
unsigned int baud;
unsigned int altbaud;
int hung_up = 0;
upf_t flags = port->flags & UPF_SPD_MASK;
switch (flags) {
@@ -514,24 +513,20 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
/*
* Special case: B0 rate.
*/
if (baud == 0) {
hung_up = 1;
baud = 9600;
}
if (baud == 0)
return max(min, 9600);
if (baud >= min && baud <= max)
return baud;
/*
* Oops, the quotient was zero. Try again with
* If the range cannot be met then try again with
* the old baud rate if possible.
*/
termios->c_cflag &= ~CBAUD;
if (old) {
baud = tty_termios_baud_rate(old);
if (!hung_up)
tty_termios_encode_baud_rate(termios,
baud, baud);
tty_termios_encode_baud_rate(termios, baud, baud);
old = NULL;
continue;
}
@@ -540,15 +535,16 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
* As a last resort, if the range cannot be met then clip to
* the nearest chip supported rate.
*/
if (!hung_up) {
if (baud <= min)
tty_termios_encode_baud_rate(termios,
min + 1, min + 1);
else
tty_termios_encode_baud_rate(termios,
max - 1, max - 1);
}
if (baud <= min)
baud = min + 1;
else
baud = max - 1;
tty_termios_encode_baud_rate(termios, baud, baud);
}
/* Should never happen */
WARN_ON(1);
return 0;
}
EXPORT_SYMBOL(uart_get_baud_rate);
@@ -2235,6 +2231,18 @@ uart_set_options(struct uart_port *port, struct console *co,
port->mctrl |= TIOCM_DTR;
port->ops->set_termios(port, &termios, &dummy);
/*
* If console hardware flow control was specified and is supported,
* the related policy UPSTAT_CTS_ENABLE must be set to allow console
* drivers to identify if CTS should be used for polling.
*/
if (flow == 'r' && (termios.c_cflag & CRTSCTS)) {
/* Synchronize @status RMW update against the console. */
guard(uart_port_lock_irqsave)(port);
port->status |= UPSTAT_CTS_ENABLE;
}
/*
* Allow the setting of the UART parameters with a NULL console
* too:
@@ -2541,7 +2549,14 @@ uart_configure_port(struct uart_driver *drv, struct uart_state *state,
* We probably don't need a spinlock around this, but
*/
scoped_guard(uart_port_lock_irqsave, port) {
port->mctrl &= TIOCM_DTR;
unsigned int mask = TIOCM_DTR;
/* Console hardware flow control polls CTS. */
if (uart_console_hwflow_active(port))
mask |= TIOCM_RTS;
port->mctrl &= mask;
if (!(port->rs485.flags & SER_RS485_ENABLED))
port->ops->set_mctrl(port, port->mctrl);
}
@@ -3496,7 +3511,7 @@ EXPORT_SYMBOL_GPL(uart_try_toggle_sysrq);
* @port: uart device's target port
*
* This function implements the device tree binding described in
* Documentation/devicetree/bindings/serial/rs485.txt.
* Documentation/devicetree/bindings/serial/rs485.yaml.
*/
int uart_get_rs485_mode(struct uart_port *port)
{

4
drivers/tty/serial/serial_txx9.c
View File

@@ -422,7 +422,7 @@ static void wait_for_xmitr(struct uart_port *up)
udelay(1);
/* Wait up to 1s for flow control if necessary */
if (up->flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(up)) {
tmout = 1000000;
while (--tmout &&
(sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
@@ -857,7 +857,7 @@ serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
* Disable flow-control if enabled (and unnecessary)
*/
flcr = sio_in(up, TXX9_SIFLCR);
if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
if (!uart_cons_flow_enabled(up) && (flcr & TXX9_SIFLCR_TES))
sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
uart_console_write(up, s, count, serial_txx9_console_putchar);

2
drivers/tty/serial/sh-sci.c
View File

@@ -3369,7 +3369,7 @@ static int sci_init_single(struct platform_device *dev,
}
port->type = SCI_PUBLIC_PORT_ID(p->type);
port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF;
port->fifosize = sci_port->params->fifosize;
if (p->type == PORT_SCI && !dev->dev.of_node) {

2
drivers/tty/serial/sunsu.c
View File

@@ -1245,7 +1245,7 @@ static void wait_for_xmitr(struct uart_sunsu_port *up)
} while (!uart_lsr_tx_empty(status));
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
if (uart_cons_flow_enabled(&up->port)) {
tmout = 1000000;
while (--tmout &&
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))

5038
drivers/tty/synclink_gt.c
View File

File diff suppressed because it is too large Load Diff

119
drivers/tty/vt/gen_ucs_width_table.py
View File

@@ -190,12 +190,23 @@ def write_tables(zero_width_ranges, double_width_ranges, out_file=DEFAULT_OUT_FI
"""
Write the generated tables to C header file.
The output uses a single sorted-by-`first` table per region (BMP and
non-BMP), with zero-width and double-width ranges merged together. The
non-BMP table also hosts the BMP double-width bitmap in spare bits of
`last`. See the encoding comment at the top of ucs.c for the layout.
Args:
zero_width_ranges: List of (start, end) ranges for zero-width characters
double_width_ranges: List of (start, end) ranges for double-width characters
out_file: Output file name (default: DEFAULT_OUT_FILE)
"""
# Bits per BMP-bitmap chunk hosted in one non-BMP entry's `last` field.
# 8 bits makes `idx / BITS_PER_CHUNK` / `idx % BITS_PER_CHUNK` compile to
# a cheap shift+mask in the lookup. The chunk size is also emitted as
# UCS_NONBMP_BMP_BITS in the generated header so ucs.c stays in sync.
BITS_PER_CHUNK = 8
# Function to split ranges into BMP (16-bit) and non-BMP (above 16-bit)
def split_ranges_by_size(ranges):
bmp_ranges = []
@@ -217,6 +228,40 @@ def write_tables(zero_width_ranges, double_width_ranges, out_file=DEFAULT_OUT_FI
zero_width_bmp, zero_width_non_bmp = split_ranges_by_size(zero_width_ranges)
double_width_bmp, double_width_non_bmp = split_ranges_by_size(double_width_ranges)
# Merge zero- and double-width ranges per region, tagging each with its
# width, then sort by `first` so binary search works on the union.
bmp_entries = sorted(
[(s, e, 0) for s, e in zero_width_bmp] +
[(s, e, 2) for s, e in double_width_bmp],
key=lambda t: t[0])
nonbmp_entries = sorted(
[(s, e, 0) for s, e in zero_width_non_bmp] +
[(s, e, 2) for s, e in double_width_non_bmp],
key=lambda t: t[0])
# Build the BMP double-width bitmap: one bit per BMP entry (in sort
# order), set iff that entry is double-width. Pack into BITS_PER_CHUNK-
# wide chunks, with bit j of the chunk corresponding to entry
# (chunk_index * BITS_PER_CHUNK + j).
bmp_w2_bits = [1 if w == 2 else 0 for _, _, w in bmp_entries]
n_chunks = (len(bmp_w2_bits) + BITS_PER_CHUNK - 1) // BITS_PER_CHUNK
if n_chunks > len(nonbmp_entries):
raise RuntimeError(
f"BMP bitmap needs {n_chunks} host entries, "
f"but only {len(nonbmp_entries)} non-BMP entries are available")
chunks = [] # list of (base_index, end_index, packed_value)
for c in range(n_chunks):
base = c * BITS_PER_CHUNK
end_idx = min(base + BITS_PER_CHUNK - 1, len(bmp_w2_bits) - 1)
value = 0
for j in range(BITS_PER_CHUNK):
k = base + j
if k < len(bmp_w2_bits) and bmp_w2_bits[k]:
value |= 1 << j
chunks.append((base, end_idx, value))
# Function to generate code point description comments
def get_code_point_comment(start, end):
try:
@@ -242,48 +287,47 @@ def write_tables(zero_width_ranges, double_width_ranges, out_file=DEFAULT_OUT_FI
* Auto-generated by {this_file}
*
* Unicode Version: {unicodedata.unidata_version}
*
* Zero-width and double-width ranges are merged into one sorted-by-`first`
* table per region. The non-BMP table additionally hosts the BMP
* double-width bitmap in the low {BITS_PER_CHUNK} bits of `last` of its
* first {n_chunks} entries (covering {len(bmp_w2_bits)} BMP entries).
* See ucs.c for the encoding details and the lookup code.
*/
/* Zero-width character ranges (BMP - Basic Multilingual Plane, U+0000 to U+FFFF) */
static const struct ucs_interval16 ucs_zero_width_bmp_ranges[] = {{
/* Bits per BMP-bitmap chunk hosted in one non-BMP entry's `last` field. */
#define UCS_NONBMP_BMP_BITS {BITS_PER_CHUNK}
/* Combined zero- and double-width ranges
* (BMP - Basic Multilingual Plane, U+0000 to U+FFFF). */
static const struct ucs_width16 ucs_bmp_ranges[] = {{
""")
for start, end in zero_width_bmp:
comment = get_code_point_comment(start, end)
f.write(f"\t{{ 0x{start:04X}, 0x{end:04X} }}, {comment}\n")
for s, e, w in bmp_entries:
macro = "BMP_0WIDTH" if w == 0 else "BMP_2WIDTH"
comment = get_code_point_comment(s, e)
f.write(f"\t{{ {macro}(0x{s:04X}, 0x{e:04X}) }}, {comment}\n")
f.write("""\
};
f.write(f"""\
}};
/* Zero-width character ranges (non-BMP, U+10000 and above) */
static const struct ucs_interval32 ucs_zero_width_non_bmp_ranges[] = {
/* Combined zero- and double-width ranges (non-BMP, U+10000 and above).
* The first {n_chunks} entries host the BMP double-width bitmap in the low
* {BITS_PER_CHUNK} bits of `last`. */
static const struct ucs_width32 ucs_nonbmp_ranges[] = {{
""")
for start, end in zero_width_non_bmp:
comment = get_code_point_comment(start, end)
f.write(f"\t{{ 0x{start:05X}, 0x{end:05X} }}, {comment}\n")
f.write("""\
};
/* Double-width character ranges (BMP - Basic Multilingual Plane, U+0000 to U+FFFF) */
static const struct ucs_interval16 ucs_double_width_bmp_ranges[] = {
""")
for start, end in double_width_bmp:
comment = get_code_point_comment(start, end)
f.write(f"\t{{ 0x{start:04X}, 0x{end:04X} }}, {comment}\n")
f.write("""\
};
/* Double-width character ranges (non-BMP, U+10000 and above) */
static const struct ucs_interval32 ucs_double_width_non_bmp_ranges[] = {
""")
for start, end in double_width_non_bmp:
comment = get_code_point_comment(start, end)
f.write(f"\t{{ 0x{start:05X}, 0x{end:05X} }}, {comment}\n")
for i, (s, e, w) in enumerate(nonbmp_entries):
macro = "RANGE_0WIDTH" if w == 0 else "RANGE_2WIDTH"
comment = get_code_point_comment(s, e)
if i < len(chunks):
base, end_idx, value = chunks[i]
f.write(
f"\t{{ {macro}(0x{s:05X}, 0x{e:05X}) {comment}\n"
f"\t | BMP_2W_BITS(0b{value:0{BITS_PER_CHUNK}b}) }},"
f" /* BMP entries [{base:>3}..{end_idx:>3}] */\n")
else:
f.write(f"\t{{ {macro}(0x{s:05X}, 0x{e:05X}) }}, {comment}\n")
f.write("};\n")
@@ -301,7 +345,10 @@ if __name__ == "__main__":
# Print summary
zero_width_count = sum(end - start + 1 for start, end in zero_width_ranges)
double_width_count = sum(end - start + 1 for start, end in double_width_ranges)
n_zero = len(zero_width_ranges)
n_double = len(double_width_ranges)
print(f"Generated {args.output_file} with:")
print(f"- {len(zero_width_ranges)} zero-width ranges covering ~{zero_width_count} code points")
print(f"- {len(double_width_ranges)} double-width ranges covering ~{double_width_count} code points")
print(f"- {n_zero} zero-width ranges covering ~{zero_width_count} code points")
print(f"- {n_double} double-width ranges covering ~{double_width_count} code points")
print(f"- {n_zero + n_double} merged ranges total")
print(f"- Unicode Version: {unicodedata.unidata_version}")

174
drivers/tty/vt/ucs.c
View File

@@ -4,96 +4,138 @@
*/
#include <linux/array_size.h>
#include <linux/build_bug.h>
#include <linux/bsearch.h>
#include <linux/consolemap.h>
#include <linux/minmax.h>
#include <linux/math.h>
struct ucs_interval16 {
struct ucs_width16 {
u16 first;
u16 last;
};
struct ucs_interval32 {
struct ucs_width32 {
u32 first;
u32 last;
};
/*
* Width table encoding (consumed by ucs_width_table.h):
*
* Zero- and double-width ranges are merged into one sorted-by-`first` table
* per region (BMP / non-BMP). The BMP table stores plain (first, last)
* pairs; per-entry width lives in a packed bitmap *hosted by the non-BMP
* table*.
*
* That hosting is the whole point of the encoding. Non-BMP code points use
* only 20 bits, so each u32 has 12 spare high bits sitting around doing
* nothing — we'd rather use them than spend a separate parallel array for
* width and BMP-bitmap bits. So we move the cp value up by UCS_CP_SHIFT
* and stash metadata in the now-free low bits of `last`:
* - bit UCS_NONBMP_W2_FLAG_BIT: this entry's own width (0=zero, 1=double),
* - bits 0..UCS_NONBMP_BMP_BITS-1: a chunk of the BMP double-width
* bitmap. Bit `j` of the chunk in non-BMP entry `c` is set iff BMP
* entry (c * UCS_NONBMP_BMP_BITS + j) is double-width. The first
* ceil(N_BMP / UCS_NONBMP_BMP_BITS) non-BMP entries carry the bitmap;
* the rest leave these bits zero.
*
* Because the metadata bits sit strictly below the lowest cp-scale bit,
* the bsearch comparator does plain u32 comparison on the shifted key and
* stored values without masking — ordering between distinct code points is
* undisturbed.
*/
#define UCS_CP_SHIFT 12
#define UCS_NONBMP_W2_FLAG_BIT 11
#define UCS_NONBMP_W2_FLAG (1u << UCS_NONBMP_W2_FLAG_BIT)
#define BMP_0WIDTH(first, last) first, last
#define BMP_2WIDTH(first, last) first, last
#define RANGE_0WIDTH(first, last) \
(u32)(first) << UCS_CP_SHIFT, (u32)(last) << UCS_CP_SHIFT
#define RANGE_2WIDTH(first, last) \
(u32)(first) << UCS_CP_SHIFT, ((u32)(last) << UCS_CP_SHIFT) | UCS_NONBMP_W2_FLAG
#define BMP_2W_BITS(b) (b)
#include "ucs_width_table.h"
static int interval16_cmp(const void *key, const void *element)
{
u16 cp = *(u16 *)key;
const struct ucs_interval16 *entry = element;
if (cp < entry->first)
return -1;
if (cp > entry->last)
return 1;
return 0;
}
static int interval32_cmp(const void *key, const void *element)
{
u32 cp = *(u32 *)key;
const struct ucs_interval32 *entry = element;
if (cp < entry->first)
return -1;
if (cp > entry->last)
return 1;
return 0;
}
static bool cp_in_range16(u16 cp, const struct ucs_interval16 *ranges, size_t size)
{
if (cp < ranges[0].first || cp > ranges[size - 1].last)
return false;
return __inline_bsearch(&cp, ranges, size, sizeof(*ranges),
interval16_cmp) != NULL;
}
static bool cp_in_range32(u32 cp, const struct ucs_interval32 *ranges, size_t size)
{
if (cp < ranges[0].first || cp > ranges[size - 1].last)
return false;
return __inline_bsearch(&cp, ranges, size, sizeof(*ranges),
interval32_cmp) != NULL;
}
static_assert(UCS_NONBMP_BMP_BITS <= UCS_NONBMP_W2_FLAG_BIT,
"BMP bitmap chunk would overlap the per-entry width flag");
static_assert(UCS_NONBMP_W2_FLAG_BIT < UCS_CP_SHIFT,
"Metadata bits collide with the shifted cp value");
static_assert(DIV_ROUND_UP(ARRAY_SIZE(ucs_bmp_ranges), UCS_NONBMP_BMP_BITS)
<= ARRAY_SIZE(ucs_nonbmp_ranges),
"Not enough non-BMP entries to host the BMP width bitmap");
#define UCS_IS_BMP(cp) ((cp) <= 0xffff)
/**
* ucs_is_zero_width() - Determine if a Unicode code point is zero-width.
* @cp: Unicode code point (UCS-4)
*
* Return: true if the character is zero-width, false otherwise
*/
bool ucs_is_zero_width(u32 cp)
static int width16_cmp(const void *key, const void *element)
{
if (UCS_IS_BMP(cp))
return cp_in_range16(cp, ucs_zero_width_bmp_ranges,
ARRAY_SIZE(ucs_zero_width_bmp_ranges));
else
return cp_in_range32(cp, ucs_zero_width_non_bmp_ranges,
ARRAY_SIZE(ucs_zero_width_non_bmp_ranges));
u16 cp = *(u16 *)key;
const struct ucs_width16 *entry = element;
if (cp < entry->first)
return -1;
if (cp > entry->last)
return 1;
return 0;
}
static int width32_cmp(const void *key, const void *element)
{
u32 k = *(u32 *)key;
const struct ucs_width32 *entry = element;
if (k < entry->first)
return -1;
if (k > entry->last)
return 1;
return 0;
}
/**
* ucs_is_double_width() - Determine if a Unicode code point is double-width.
* ucs_get_width() - Get the display width of a Unicode code point.
* @cp: Unicode code point (UCS-4)
*
* Return: true if the character is double-width, false otherwise
* Return: 2 for double-width (East Asian Wide/Fullwidth, emoji, ...),
* 0 for zero-width (combining marks, format characters, ...),
* 1 for everything else (the common case).
*/
bool ucs_is_double_width(u32 cp)
unsigned int ucs_get_width(u32 cp)
{
if (UCS_IS_BMP(cp))
return cp_in_range16(cp, ucs_double_width_bmp_ranges,
ARRAY_SIZE(ucs_double_width_bmp_ranges));
else
return cp_in_range32(cp, ucs_double_width_non_bmp_ranges,
ARRAY_SIZE(ucs_double_width_non_bmp_ranges));
const struct ucs_width16 *e16;
const struct ucs_width32 *e32;
unsigned int idx;
u32 k;
if (UCS_IS_BMP(cp)) {
u16 bmp = cp;
if (bmp < ucs_bmp_ranges[0].first ||
bmp > ucs_bmp_ranges[ARRAY_SIZE(ucs_bmp_ranges) - 1].last)
return 1;
e16 = __inline_bsearch(&bmp, ucs_bmp_ranges,
ARRAY_SIZE(ucs_bmp_ranges),
sizeof(*ucs_bmp_ranges), width16_cmp);
if (!e16)
return 1;
idx = e16 - ucs_bmp_ranges;
return (ucs_nonbmp_ranges[idx / UCS_NONBMP_BMP_BITS].last
>> (idx % UCS_NONBMP_BMP_BITS)) & 1 ? 2 : 0;
}
k = cp << UCS_CP_SHIFT;
if (k < ucs_nonbmp_ranges[0].first ||
k > ucs_nonbmp_ranges[ARRAY_SIZE(ucs_nonbmp_ranges) - 1].last)
return 1;
e32 = __inline_bsearch(&k, ucs_nonbmp_ranges,
ARRAY_SIZE(ucs_nonbmp_ranges),
sizeof(*ucs_nonbmp_ranges), width32_cmp);
if (!e32)
return 1;
return (e32->last & UCS_NONBMP_W2_FLAG) ? 2 : 0;
}
/*

919
drivers/tty/vt/ucs_width_table.h_shipped
View File

@@ -5,449 +5,486 @@
* Auto-generated by gen_ucs_width_table.py
*
* Unicode Version: 16.0.0
*
* Zero-width and double-width ranges are merged into one sorted-by-`first`
* table per region. The non-BMP table additionally hosts the BMP
* double-width bitmap in the low 8 bits of `last` of its
* first 33 entries (covering 262 BMP entries).
* See ucs.c for the encoding details and the lookup code.
*/
/* Zero-width character ranges (BMP - Basic Multilingual Plane, U+0000 to U+FFFF) */
static const struct ucs_interval16 ucs_zero_width_bmp_ranges[] = {
{ 0x00AD, 0x00AD }, /* SOFT HYPHEN */
{ 0x0300, 0x036F }, /* COMBINING GRAVE ACCENT - COMBINING LATIN SMALL LETTER X */
{ 0x0483, 0x0489 }, /* COMBINING CYRILLIC TITLO - COMBINING CYRILLIC MILLIONS SIGN */
{ 0x0591, 0x05BD }, /* HEBREW ACCENT ETNAHTA - HEBREW POINT METEG */
{ 0x05BF, 0x05BF }, /* HEBREW POINT RAFE */
{ 0x05C1, 0x05C2 }, /* HEBREW POINT SHIN DOT - HEBREW POINT SIN DOT */
{ 0x05C4, 0x05C5 }, /* HEBREW MARK UPPER DOT - HEBREW MARK LOWER DOT */
{ 0x05C7, 0x05C7 }, /* HEBREW POINT QAMATS QATAN */
{ 0x0600, 0x0605 }, /* ARABIC NUMBER SIGN - ARABIC NUMBER MARK ABOVE */
{ 0x0610, 0x061A }, /* ARABIC SIGN SALLALLAHOU ALAYHE WASSALLAM - ARABIC SMALL KASRA */
{ 0x061C, 0x061C }, /* ARABIC LETTER MARK */
{ 0x064B, 0x065F }, /* ARABIC FATHATAN - ARABIC WAVY HAMZA BELOW */
{ 0x0670, 0x0670 }, /* ARABIC LETTER SUPERSCRIPT ALEF */
{ 0x06D6, 0x06DD }, /* ARABIC SMALL HIGH LIGATURE SAD WITH LAM WITH ALEF MAKSURA - ARABIC END OF AYAH */
{ 0x06DF, 0x06E4 }, /* ARABIC SMALL HIGH ROUNDED ZERO - ARABIC SMALL HIGH MADDA */
{ 0x06E7, 0x06E8 }, /* ARABIC SMALL HIGH YEH - ARABIC SMALL HIGH NOON */
{ 0x06EA, 0x06ED }, /* ARABIC EMPTY CENTRE LOW STOP - ARABIC SMALL LOW MEEM */
{ 0x070F, 0x070F }, /* SYRIAC ABBREVIATION MARK */
{ 0x0711, 0x0711 }, /* SYRIAC LETTER SUPERSCRIPT ALAPH */
{ 0x0730, 0x074A }, /* SYRIAC PTHAHA ABOVE - SYRIAC BARREKH */
{ 0x07A6, 0x07B0 }, /* THAANA ABAFILI - THAANA SUKUN */
{ 0x07EB, 0x07F3 }, /* NKO COMBINING SHORT HIGH TONE - NKO COMBINING DOUBLE DOT ABOVE */
{ 0x07FD, 0x07FD }, /* NKO DANTAYALAN */
{ 0x0816, 0x0819 }, /* SAMARITAN MARK IN - SAMARITAN MARK DAGESH */
{ 0x081B, 0x0823 }, /* SAMARITAN MARK EPENTHETIC YUT - SAMARITAN VOWEL SIGN A */
{ 0x0825, 0x0827 }, /* SAMARITAN VOWEL SIGN SHORT A - SAMARITAN VOWEL SIGN U */
{ 0x0829, 0x082D }, /* SAMARITAN VOWEL SIGN LONG I - SAMARITAN MARK NEQUDAA */
{ 0x0859, 0x085B }, /* MANDAIC AFFRICATION MARK - MANDAIC GEMINATION MARK */
{ 0x0890, 0x0891 }, /* ARABIC POUND MARK ABOVE - ARABIC PIASTRE MARK ABOVE */
{ 0x0897, 0x089F }, /* ARABIC PEPET - ARABIC HALF MADDA OVER MADDA */
{ 0x08CA, 0x0903 }, /* ARABIC SMALL HIGH FARSI YEH - DEVANAGARI SIGN VISARGA */
{ 0x093A, 0x093C }, /* DEVANAGARI VOWEL SIGN OE - DEVANAGARI SIGN NUKTA */
{ 0x093E, 0x094F }, /* DEVANAGARI VOWEL SIGN AA - DEVANAGARI VOWEL SIGN AW */
{ 0x0951, 0x0957 }, /* DEVANAGARI STRESS SIGN UDATTA - DEVANAGARI VOWEL SIGN UUE */
{ 0x0962, 0x0963 }, /* DEVANAGARI VOWEL SIGN VOCALIC L - DEVANAGARI VOWEL SIGN VOCALIC LL */
{ 0x0981, 0x0983 }, /* BENGALI SIGN CANDRABINDU - BENGALI SIGN VISARGA */
{ 0x09BC, 0x09BC }, /* BENGALI SIGN NUKTA */
{ 0x09BE, 0x09C4 }, /* BENGALI VOWEL SIGN AA - BENGALI VOWEL SIGN VOCALIC RR */
{ 0x09C7, 0x09C8 }, /* BENGALI VOWEL SIGN E - BENGALI VOWEL SIGN AI */
{ 0x09CB, 0x09CD }, /* BENGALI VOWEL SIGN O - BENGALI SIGN VIRAMA */
{ 0x09D7, 0x09D7 }, /* BENGALI AU LENGTH MARK */
{ 0x09E2, 0x09E3 }, /* BENGALI VOWEL SIGN VOCALIC L - BENGALI VOWEL SIGN VOCALIC LL */
{ 0x09FE, 0x09FE }, /* BENGALI SANDHI MARK */
{ 0x0A01, 0x0A03 }, /* GURMUKHI SIGN ADAK BINDI - GURMUKHI SIGN VISARGA */
{ 0x0A3C, 0x0A3C }, /* GURMUKHI SIGN NUKTA */
{ 0x0A3E, 0x0A42 }, /* GURMUKHI VOWEL SIGN AA - GURMUKHI VOWEL SIGN UU */
{ 0x0A47, 0x0A48 }, /* GURMUKHI VOWEL SIGN EE - GURMUKHI VOWEL SIGN AI */
{ 0x0A4B, 0x0A4D }, /* GURMUKHI VOWEL SIGN OO - GURMUKHI SIGN VIRAMA */
{ 0x0A51, 0x0A51 }, /* GURMUKHI SIGN UDAAT */
{ 0x0A70, 0x0A71 }, /* GURMUKHI TIPPI - GURMUKHI ADDAK */
{ 0x0A75, 0x0A75 }, /* GURMUKHI SIGN YAKASH */
{ 0x0A81, 0x0A83 }, /* GUJARATI SIGN CANDRABINDU - GUJARATI SIGN VISARGA */
{ 0x0ABC, 0x0ABC }, /* GUJARATI SIGN NUKTA */
{ 0x0ABE, 0x0AC5 }, /* GUJARATI VOWEL SIGN AA - GUJARATI VOWEL SIGN CANDRA E */
{ 0x0AC7, 0x0AC9 }, /* GUJARATI VOWEL SIGN E - GUJARATI VOWEL SIGN CANDRA O */
{ 0x0ACB, 0x0ACD }, /* GUJARATI VOWEL SIGN O - GUJARATI SIGN VIRAMA */
{ 0x0AE2, 0x0AE3 }, /* GUJARATI VOWEL SIGN VOCALIC L - GUJARATI VOWEL SIGN VOCALIC LL */
{ 0x0AFA, 0x0AFF }, /* GUJARATI SIGN SUKUN - GUJARATI SIGN TWO-CIRCLE NUKTA ABOVE */
{ 0x0B01, 0x0B03 }, /* ORIYA SIGN CANDRABINDU - ORIYA SIGN VISARGA */
{ 0x0B3C, 0x0B3C }, /* ORIYA SIGN NUKTA */
{ 0x0B3E, 0x0B44 }, /* ORIYA VOWEL SIGN AA - ORIYA VOWEL SIGN VOCALIC RR */
{ 0x0B47, 0x0B48 }, /* ORIYA VOWEL SIGN E - ORIYA VOWEL SIGN AI */
{ 0x0B4B, 0x0B4D }, /* ORIYA VOWEL SIGN O - ORIYA SIGN VIRAMA */
{ 0x0B55, 0x0B57 }, /* ORIYA SIGN OVERLINE - ORIYA AU LENGTH MARK */
{ 0x0B62, 0x0B63 }, /* ORIYA VOWEL SIGN VOCALIC L - ORIYA VOWEL SIGN VOCALIC LL */
{ 0x0B82, 0x0B82 }, /* TAMIL SIGN ANUSVARA */
{ 0x0BBE, 0x0BC2 }, /* TAMIL VOWEL SIGN AA - TAMIL VOWEL SIGN UU */
{ 0x0BC6, 0x0BC8 }, /* TAMIL VOWEL SIGN E - TAMIL VOWEL SIGN AI */
{ 0x0BCA, 0x0BCD }, /* TAMIL VOWEL SIGN O - TAMIL SIGN VIRAMA */
{ 0x0BD7, 0x0BD7 }, /* TAMIL AU LENGTH MARK */
{ 0x0C00, 0x0C04 }, /* TELUGU SIGN COMBINING CANDRABINDU ABOVE - TELUGU SIGN COMBINING ANUSVARA ABOVE */
{ 0x0C3C, 0x0C3C }, /* TELUGU SIGN NUKTA */
{ 0x0C3E, 0x0C44 }, /* TELUGU VOWEL SIGN AA - TELUGU VOWEL SIGN VOCALIC RR */
{ 0x0C46, 0x0C48 }, /* TELUGU VOWEL SIGN E - TELUGU VOWEL SIGN AI */
{ 0x0C4A, 0x0C4D }, /* TELUGU VOWEL SIGN O - TELUGU SIGN VIRAMA */
{ 0x0C55, 0x0C56 }, /* TELUGU LENGTH MARK - TELUGU AI LENGTH MARK */
{ 0x0C62, 0x0C63 }, /* TELUGU VOWEL SIGN VOCALIC L - TELUGU VOWEL SIGN VOCALIC LL */
{ 0x0C81, 0x0C83 }, /* KANNADA SIGN CANDRABINDU - KANNADA SIGN VISARGA */
{ 0x0CBC, 0x0CBC }, /* KANNADA SIGN NUKTA */
{ 0x0CBE, 0x0CC4 }, /* KANNADA VOWEL SIGN AA - KANNADA VOWEL SIGN VOCALIC RR */
{ 0x0CC6, 0x0CC8 }, /* KANNADA VOWEL SIGN E - KANNADA VOWEL SIGN AI */
{ 0x0CCA, 0x0CCD }, /* KANNADA VOWEL SIGN O - KANNADA SIGN VIRAMA */
{ 0x0CD5, 0x0CD6 }, /* KANNADA LENGTH MARK - KANNADA AI LENGTH MARK */
{ 0x0CE2, 0x0CE3 }, /* KANNADA VOWEL SIGN VOCALIC L - KANNADA VOWEL SIGN VOCALIC LL */
{ 0x0CF3, 0x0CF3 }, /* KANNADA SIGN COMBINING ANUSVARA ABOVE RIGHT */
{ 0x0D00, 0x0D03 }, /* MALAYALAM SIGN COMBINING ANUSVARA ABOVE - MALAYALAM SIGN VISARGA */
{ 0x0D3B, 0x0D3C }, /* MALAYALAM SIGN VERTICAL BAR VIRAMA - MALAYALAM SIGN CIRCULAR VIRAMA */
{ 0x0D3E, 0x0D44 }, /* MALAYALAM VOWEL SIGN AA - MALAYALAM VOWEL SIGN VOCALIC RR */
{ 0x0D46, 0x0D48 }, /* MALAYALAM VOWEL SIGN E - MALAYALAM VOWEL SIGN AI */
{ 0x0D4A, 0x0D4D }, /* MALAYALAM VOWEL SIGN O - MALAYALAM SIGN VIRAMA */
{ 0x0D57, 0x0D57 }, /* MALAYALAM AU LENGTH MARK */
{ 0x0D62, 0x0D63 }, /* MALAYALAM VOWEL SIGN VOCALIC L - MALAYALAM VOWEL SIGN VOCALIC LL */
{ 0x0D81, 0x0D83 }, /* SINHALA SIGN CANDRABINDU - SINHALA SIGN VISARGAYA */
{ 0x0DCA, 0x0DCA }, /* SINHALA SIGN AL-LAKUNA */
{ 0x0DCF, 0x0DD4 }, /* SINHALA VOWEL SIGN AELA-PILLA - SINHALA VOWEL SIGN KETTI PAA-PILLA */
{ 0x0DD6, 0x0DD6 }, /* SINHALA VOWEL SIGN DIGA PAA-PILLA */
{ 0x0DD8, 0x0DDF }, /* SINHALA VOWEL SIGN GAETTA-PILLA - SINHALA VOWEL SIGN GAYANUKITTA */
{ 0x0DF2, 0x0DF3 }, /* SINHALA VOWEL SIGN DIGA GAETTA-PILLA - SINHALA VOWEL SIGN DIGA GAYANUKITTA */
{ 0x0E31, 0x0E31 }, /* THAI CHARACTER MAI HAN-AKAT */
{ 0x0E34, 0x0E3A }, /* THAI CHARACTER SARA I - THAI CHARACTER PHINTHU */
{ 0x0E47, 0x0E4E }, /* THAI CHARACTER MAITAIKHU - THAI CHARACTER YAMAKKAN */
{ 0x0EB1, 0x0EB1 }, /* LAO VOWEL SIGN MAI KAN */
{ 0x0EB4, 0x0EBC }, /* LAO VOWEL SIGN I - LAO SEMIVOWEL SIGN LO */
{ 0x0EC8, 0x0ECE }, /* LAO TONE MAI EK - LAO YAMAKKAN */
{ 0x0F18, 0x0F19 }, /* TIBETAN ASTROLOGICAL SIGN -KHYUD PA - TIBETAN ASTROLOGICAL SIGN SDONG TSHUGS */
{ 0x0F35, 0x0F35 }, /* TIBETAN MARK NGAS BZUNG NYI ZLA */
{ 0x0F37, 0x0F37 }, /* TIBETAN MARK NGAS BZUNG SGOR RTAGS */
{ 0x0F39, 0x0F39 }, /* TIBETAN MARK TSA -PHRU */
{ 0x0F3E, 0x0F3F }, /* TIBETAN SIGN YAR TSHES - TIBETAN SIGN MAR TSHES */
{ 0x0F71, 0x0F84 }, /* TIBETAN VOWEL SIGN AA - TIBETAN MARK HALANTA */
{ 0x0F86, 0x0F87 }, /* TIBETAN SIGN LCI RTAGS - TIBETAN SIGN YANG RTAGS */
{ 0x0F8D, 0x0F97 }, /* TIBETAN SUBJOINED SIGN LCE TSA CAN - TIBETAN SUBJOINED LETTER JA */
{ 0x0F99, 0x0FBC }, /* TIBETAN SUBJOINED LETTER NYA - TIBETAN SUBJOINED LETTER FIXED-FORM RA */
{ 0x0FC6, 0x0FC6 }, /* TIBETAN SYMBOL PADMA GDAN */
{ 0x102B, 0x103E }, /* MYANMAR VOWEL SIGN TALL AA - MYANMAR CONSONANT SIGN MEDIAL HA */
{ 0x1056, 0x1059 }, /* MYANMAR VOWEL SIGN VOCALIC R - MYANMAR VOWEL SIGN VOCALIC LL */
{ 0x105E, 0x1060 }, /* MYANMAR CONSONANT SIGN MON MEDIAL NA - MYANMAR CONSONANT SIGN MON MEDIAL LA */
{ 0x1062, 0x1064 }, /* MYANMAR VOWEL SIGN SGAW KAREN EU - MYANMAR TONE MARK SGAW KAREN KE PHO */
{ 0x1067, 0x106D }, /* MYANMAR VOWEL SIGN WESTERN PWO KAREN EU - MYANMAR SIGN WESTERN PWO KAREN TONE-5 */
{ 0x1071, 0x1074 }, /* MYANMAR VOWEL SIGN GEBA KAREN I - MYANMAR VOWEL SIGN KAYAH EE */
{ 0x1082, 0x108D }, /* MYANMAR CONSONANT SIGN SHAN MEDIAL WA - MYANMAR SIGN SHAN COUNCIL EMPHATIC TONE */
{ 0x108F, 0x108F }, /* MYANMAR SIGN RUMAI PALAUNG TONE-5 */
{ 0x109A, 0x109D }, /* MYANMAR SIGN KHAMTI TONE-1 - MYANMAR VOWEL SIGN AITON AI */
{ 0x135D, 0x135F }, /* ETHIOPIC COMBINING GEMINATION AND VOWEL LENGTH MARK - ETHIOPIC COMBINING GEMINATION MARK */
{ 0x1712, 0x1715 }, /* TAGALOG VOWEL SIGN I - TAGALOG SIGN PAMUDPOD */
{ 0x1732, 0x1734 }, /* HANUNOO VOWEL SIGN I - HANUNOO SIGN PAMUDPOD */
{ 0x1752, 0x1753 }, /* BUHID VOWEL SIGN I - BUHID VOWEL SIGN U */
{ 0x1772, 0x1773 }, /* TAGBANWA VOWEL SIGN I - TAGBANWA VOWEL SIGN U */
{ 0x17B4, 0x17D3 }, /* KHMER VOWEL INHERENT AQ - KHMER SIGN BATHAMASAT */
{ 0x17DD, 0x17DD }, /* KHMER SIGN ATTHACAN */
{ 0x180B, 0x180F }, /* MONGOLIAN FREE VARIATION SELECTOR ONE - MONGOLIAN FREE VARIATION SELECTOR FOUR */
{ 0x1885, 0x1886 }, /* MONGOLIAN LETTER ALI GALI BALUDA - MONGOLIAN LETTER ALI GALI THREE BALUDA */
{ 0x18A9, 0x18A9 }, /* MONGOLIAN LETTER ALI GALI DAGALGA */
{ 0x1920, 0x192B }, /* LIMBU VOWEL SIGN A - LIMBU SUBJOINED LETTER WA */
{ 0x1930, 0x193B }, /* LIMBU SMALL LETTER KA - LIMBU SIGN SA-I */
{ 0x1A17, 0x1A1B }, /* BUGINESE VOWEL SIGN I - BUGINESE VOWEL SIGN AE */
{ 0x1A55, 0x1A5E }, /* TAI THAM CONSONANT SIGN MEDIAL RA - TAI THAM CONSONANT SIGN SA */
{ 0x1A60, 0x1A7C }, /* TAI THAM SIGN SAKOT - TAI THAM SIGN KHUEN-LUE KARAN */
{ 0x1A7F, 0x1A7F }, /* TAI THAM COMBINING CRYPTOGRAMMIC DOT */
{ 0x1AB0, 0x1ACE }, /* COMBINING DOUBLED CIRCUMFLEX ACCENT - COMBINING LATIN SMALL LETTER INSULAR T */
{ 0x1B00, 0x1B04 }, /* BALINESE SIGN ULU RICEM - BALINESE SIGN BISAH */
{ 0x1B34, 0x1B44 }, /* BALINESE SIGN REREKAN - BALINESE ADEG ADEG */
{ 0x1B6B, 0x1B73 }, /* BALINESE MUSICAL SYMBOL COMBINING TEGEH - BALINESE MUSICAL SYMBOL COMBINING GONG */
{ 0x1B80, 0x1B82 }, /* SUNDANESE SIGN PANYECEK - SUNDANESE SIGN PANGWISAD */
{ 0x1BA1, 0x1BAD }, /* SUNDANESE CONSONANT SIGN PAMINGKAL - SUNDANESE CONSONANT SIGN PASANGAN WA */
{ 0x1BE6, 0x1BF3 }, /* BATAK SIGN TOMPI - BATAK PANONGONAN */
{ 0x1C24, 0x1C37 }, /* LEPCHA SUBJOINED LETTER YA - LEPCHA SIGN NUKTA */
{ 0x1CD0, 0x1CD2 }, /* VEDIC TONE KARSHANA - VEDIC TONE PRENKHA */
{ 0x1CD4, 0x1CE8 }, /* VEDIC SIGN YAJURVEDIC MIDLINE SVARITA - VEDIC SIGN VISARGA ANUDATTA WITH TAIL */
{ 0x1CED, 0x1CED }, /* VEDIC SIGN TIRYAK */
{ 0x1CF4, 0x1CF4 }, /* VEDIC TONE CANDRA ABOVE */
{ 0x1CF7, 0x1CF9 }, /* VEDIC SIGN ATIKRAMA - VEDIC TONE DOUBLE RING ABOVE */
{ 0x1DC0, 0x1DFF }, /* COMBINING DOTTED GRAVE ACCENT - COMBINING RIGHT ARROWHEAD AND DOWN ARROWHEAD BELOW */
{ 0x200B, 0x200F }, /* ZERO WIDTH SPACE - RIGHT-TO-LEFT MARK */
{ 0x202A, 0x202E }, /* LEFT-TO-RIGHT EMBEDDING - RIGHT-TO-LEFT OVERRIDE */
{ 0x2060, 0x2064 }, /* WORD JOINER - INVISIBLE PLUS */
{ 0x2066, 0x206F }, /* LEFT-TO-RIGHT ISOLATE - NOMINAL DIGIT SHAPES */
{ 0x20D0, 0x20F0 }, /* COMBINING LEFT HARPOON ABOVE - COMBINING ASTERISK ABOVE */
{ 0x2640, 0x2640 }, /* FEMALE SIGN */
{ 0x2642, 0x2642 }, /* MALE SIGN */
{ 0x26A7, 0x26A7 }, /* MALE WITH STROKE AND MALE AND FEMALE SIGN */
{ 0x2CEF, 0x2CF1 }, /* COPTIC COMBINING NI ABOVE - COPTIC COMBINING SPIRITUS LENIS */
{ 0x2D7F, 0x2D7F }, /* TIFINAGH CONSONANT JOINER */
{ 0x2DE0, 0x2DFF }, /* COMBINING CYRILLIC LETTER BE - COMBINING CYRILLIC LETTER IOTIFIED BIG YUS */
{ 0x302A, 0x302F }, /* IDEOGRAPHIC LEVEL TONE MARK - HANGUL DOUBLE DOT TONE MARK */
{ 0x3099, 0x309A }, /* COMBINING KATAKANA-HIRAGANA VOICED SOUND MARK - COMBINING KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK */
{ 0xA66F, 0xA672 }, /* COMBINING CYRILLIC VZMET - COMBINING CYRILLIC THOUSAND MILLIONS SIGN */
{ 0xA674, 0xA67D }, /* COMBINING CYRILLIC LETTER UKRAINIAN IE - COMBINING CYRILLIC PAYEROK */
{ 0xA69E, 0xA69F }, /* COMBINING CYRILLIC LETTER EF - COMBINING CYRILLIC LETTER IOTIFIED E */
{ 0xA6F0, 0xA6F1 }, /* BAMUM COMBINING MARK KOQNDON - BAMUM COMBINING MARK TUKWENTIS */
{ 0xA802, 0xA802 }, /* SYLOTI NAGRI SIGN DVISVARA */
{ 0xA806, 0xA806 }, /* SYLOTI NAGRI SIGN HASANTA */
{ 0xA80B, 0xA80B }, /* SYLOTI NAGRI SIGN ANUSVARA */
{ 0xA823, 0xA827 }, /* SYLOTI NAGRI VOWEL SIGN A - SYLOTI NAGRI VOWEL SIGN OO */
{ 0xA82C, 0xA82C }, /* SYLOTI NAGRI SIGN ALTERNATE HASANTA */
{ 0xA880, 0xA881 }, /* SAURASHTRA SIGN ANUSVARA - SAURASHTRA SIGN VISARGA */
{ 0xA8B4, 0xA8C5 }, /* SAURASHTRA CONSONANT SIGN HAARU - SAURASHTRA SIGN CANDRABINDU */
{ 0xA8E0, 0xA8F1 }, /* COMBINING DEVANAGARI DIGIT ZERO - COMBINING DEVANAGARI SIGN AVAGRAHA */
{ 0xA8FF, 0xA8FF }, /* DEVANAGARI VOWEL SIGN AY */
{ 0xA926, 0xA92D }, /* KAYAH LI VOWEL UE - KAYAH LI TONE CALYA PLOPHU */
{ 0xA947, 0xA953 }, /* REJANG VOWEL SIGN I - REJANG VIRAMA */
{ 0xA980, 0xA983 }, /* JAVANESE SIGN PANYANGGA - JAVANESE SIGN WIGNYAN */
{ 0xA9B3, 0xA9C0 }, /* JAVANESE SIGN CECAK TELU - JAVANESE PANGKON */
{ 0xA9E5, 0xA9E5 }, /* MYANMAR SIGN SHAN SAW */
{ 0xAA29, 0xAA36 }, /* CHAM VOWEL SIGN AA - CHAM CONSONANT SIGN WA */
{ 0xAA43, 0xAA43 }, /* CHAM CONSONANT SIGN FINAL NG */
{ 0xAA4C, 0xAA4D }, /* CHAM CONSONANT SIGN FINAL M - CHAM CONSONANT SIGN FINAL H */
{ 0xAA7B, 0xAA7D }, /* MYANMAR SIGN PAO KAREN TONE - MYANMAR SIGN TAI LAING TONE-5 */
{ 0xAAB0, 0xAAB0 }, /* TAI VIET MAI KANG */
{ 0xAAB2, 0xAAB4 }, /* TAI VIET VOWEL I - TAI VIET VOWEL U */
{ 0xAAB7, 0xAAB8 }, /* TAI VIET MAI KHIT - TAI VIET VOWEL IA */
{ 0xAABE, 0xAABF }, /* TAI VIET VOWEL AM - TAI VIET TONE MAI EK */
{ 0xAAC1, 0xAAC1 }, /* TAI VIET TONE MAI THO */
{ 0xAAEB, 0xAAEF }, /* MEETEI MAYEK VOWEL SIGN II - MEETEI MAYEK VOWEL SIGN AAU */
{ 0xAAF5, 0xAAF6 }, /* MEETEI MAYEK VOWEL SIGN VISARGA - MEETEI MAYEK VIRAMA */
{ 0xABE3, 0xABEA }, /* MEETEI MAYEK VOWEL SIGN ONAP - MEETEI MAYEK VOWEL SIGN NUNG */
{ 0xABEC, 0xABED }, /* MEETEI MAYEK LUM IYEK - MEETEI MAYEK APUN IYEK */
{ 0xFB1E, 0xFB1E }, /* HEBREW POINT JUDEO-SPANISH VARIKA */
{ 0xFE00, 0xFE0F }, /* VARIATION SELECTOR-1 - VARIATION SELECTOR-16 */
{ 0xFE20, 0xFE2F }, /* COMBINING LIGATURE LEFT HALF - COMBINING CYRILLIC TITLO RIGHT HALF */
{ 0xFEFF, 0xFEFF }, /* ZERO WIDTH NO-BREAK SPACE */
{ 0xFFF9, 0xFFFB }, /* INTERLINEAR ANNOTATION ANCHOR - INTERLINEAR ANNOTATION TERMINATOR */
/* Bits per BMP-bitmap chunk hosted in one non-BMP entry's `last` field. */
#define UCS_NONBMP_BMP_BITS 8
/* Combined zero- and double-width ranges
* (BMP - Basic Multilingual Plane, U+0000 to U+FFFF). */
static const struct ucs_width16 ucs_bmp_ranges[] = {
{ BMP_0WIDTH(0x00AD, 0x00AD) }, /* SOFT HYPHEN */
{ BMP_0WIDTH(0x0300, 0x036F) }, /* COMBINING GRAVE ACCENT - COMBINING LATIN SMALL LETTER X */
{ BMP_0WIDTH(0x0483, 0x0489) }, /* COMBINING CYRILLIC TITLO - COMBINING CYRILLIC MILLIONS SIGN */
{ BMP_0WIDTH(0x0591, 0x05BD) }, /* HEBREW ACCENT ETNAHTA - HEBREW POINT METEG */
{ BMP_0WIDTH(0x05BF, 0x05BF) }, /* HEBREW POINT RAFE */
{ BMP_0WIDTH(0x05C1, 0x05C2) }, /* HEBREW POINT SHIN DOT - HEBREW POINT SIN DOT */
{ BMP_0WIDTH(0x05C4, 0x05C5) }, /* HEBREW MARK UPPER DOT - HEBREW MARK LOWER DOT */
{ BMP_0WIDTH(0x05C7, 0x05C7) }, /* HEBREW POINT QAMATS QATAN */
{ BMP_0WIDTH(0x0600, 0x0605) }, /* ARABIC NUMBER SIGN - ARABIC NUMBER MARK ABOVE */
{ BMP_0WIDTH(0x0610, 0x061A) }, /* ARABIC SIGN SALLALLAHOU ALAYHE WASSALLAM - ARABIC SMALL KASRA */
{ BMP_0WIDTH(0x061C, 0x061C) }, /* ARABIC LETTER MARK */
{ BMP_0WIDTH(0x064B, 0x065F) }, /* ARABIC FATHATAN - ARABIC WAVY HAMZA BELOW */
{ BMP_0WIDTH(0x0670, 0x0670) }, /* ARABIC LETTER SUPERSCRIPT ALEF */
{ BMP_0WIDTH(0x06D6, 0x06DD) }, /* ARABIC SMALL HIGH LIGATURE SAD WITH LAM WITH ALEF MAKSURA - ARABIC END OF AYAH */
{ BMP_0WIDTH(0x06DF, 0x06E4) }, /* ARABIC SMALL HIGH ROUNDED ZERO - ARABIC SMALL HIGH MADDA */
{ BMP_0WIDTH(0x06E7, 0x06E8) }, /* ARABIC SMALL HIGH YEH - ARABIC SMALL HIGH NOON */
{ BMP_0WIDTH(0x06EA, 0x06ED) }, /* ARABIC EMPTY CENTRE LOW STOP - ARABIC SMALL LOW MEEM */
{ BMP_0WIDTH(0x070F, 0x070F) }, /* SYRIAC ABBREVIATION MARK */
{ BMP_0WIDTH(0x0711, 0x0711) }, /* SYRIAC LETTER SUPERSCRIPT ALAPH */
{ BMP_0WIDTH(0x0730, 0x074A) }, /* SYRIAC PTHAHA ABOVE - SYRIAC BARREKH */
{ BMP_0WIDTH(0x07A6, 0x07B0) }, /* THAANA ABAFILI - THAANA SUKUN */
{ BMP_0WIDTH(0x07EB, 0x07F3) }, /* NKO COMBINING SHORT HIGH TONE - NKO COMBINING DOUBLE DOT ABOVE */
{ BMP_0WIDTH(0x07FD, 0x07FD) }, /* NKO DANTAYALAN */
{ BMP_0WIDTH(0x0816, 0x0819) }, /* SAMARITAN MARK IN - SAMARITAN MARK DAGESH */
{ BMP_0WIDTH(0x081B, 0x0823) }, /* SAMARITAN MARK EPENTHETIC YUT - SAMARITAN VOWEL SIGN A */
{ BMP_0WIDTH(0x0825, 0x0827) }, /* SAMARITAN VOWEL SIGN SHORT A - SAMARITAN VOWEL SIGN U */
{ BMP_0WIDTH(0x0829, 0x082D) }, /* SAMARITAN VOWEL SIGN LONG I - SAMARITAN MARK NEQUDAA */
{ BMP_0WIDTH(0x0859, 0x085B) }, /* MANDAIC AFFRICATION MARK - MANDAIC GEMINATION MARK */
{ BMP_0WIDTH(0x0890, 0x0891) }, /* ARABIC POUND MARK ABOVE - ARABIC PIASTRE MARK ABOVE */
{ BMP_0WIDTH(0x0897, 0x089F) }, /* ARABIC PEPET - ARABIC HALF MADDA OVER MADDA */
{ BMP_0WIDTH(0x08CA, 0x0903) }, /* ARABIC SMALL HIGH FARSI YEH - DEVANAGARI SIGN VISARGA */
{ BMP_0WIDTH(0x093A, 0x093C) }, /* DEVANAGARI VOWEL SIGN OE - DEVANAGARI SIGN NUKTA */
{ BMP_0WIDTH(0x093E, 0x094F) }, /* DEVANAGARI VOWEL SIGN AA - DEVANAGARI VOWEL SIGN AW */
{ BMP_0WIDTH(0x0951, 0x0957) }, /* DEVANAGARI STRESS SIGN UDATTA - DEVANAGARI VOWEL SIGN UUE */
{ BMP_0WIDTH(0x0962, 0x0963) }, /* DEVANAGARI VOWEL SIGN VOCALIC L - DEVANAGARI VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x0981, 0x0983) }, /* BENGALI SIGN CANDRABINDU - BENGALI SIGN VISARGA */
{ BMP_0WIDTH(0x09BC, 0x09BC) }, /* BENGALI SIGN NUKTA */
{ BMP_0WIDTH(0x09BE, 0x09C4) }, /* BENGALI VOWEL SIGN AA - BENGALI VOWEL SIGN VOCALIC RR */
{ BMP_0WIDTH(0x09C7, 0x09C8) }, /* BENGALI VOWEL SIGN E - BENGALI VOWEL SIGN AI */
{ BMP_0WIDTH(0x09CB, 0x09CD) }, /* BENGALI VOWEL SIGN O - BENGALI SIGN VIRAMA */
{ BMP_0WIDTH(0x09D7, 0x09D7) }, /* BENGALI AU LENGTH MARK */
{ BMP_0WIDTH(0x09E2, 0x09E3) }, /* BENGALI VOWEL SIGN VOCALIC L - BENGALI VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x09FE, 0x09FE) }, /* BENGALI SANDHI MARK */
{ BMP_0WIDTH(0x0A01, 0x0A03) }, /* GURMUKHI SIGN ADAK BINDI - GURMUKHI SIGN VISARGA */
{ BMP_0WIDTH(0x0A3C, 0x0A3C) }, /* GURMUKHI SIGN NUKTA */
{ BMP_0WIDTH(0x0A3E, 0x0A42) }, /* GURMUKHI VOWEL SIGN AA - GURMUKHI VOWEL SIGN UU */
{ BMP_0WIDTH(0x0A47, 0x0A48) }, /* GURMUKHI VOWEL SIGN EE - GURMUKHI VOWEL SIGN AI */
{ BMP_0WIDTH(0x0A4B, 0x0A4D) }, /* GURMUKHI VOWEL SIGN OO - GURMUKHI SIGN VIRAMA */
{ BMP_0WIDTH(0x0A51, 0x0A51) }, /* GURMUKHI SIGN UDAAT */
{ BMP_0WIDTH(0x0A70, 0x0A71) }, /* GURMUKHI TIPPI - GURMUKHI ADDAK */
{ BMP_0WIDTH(0x0A75, 0x0A75) }, /* GURMUKHI SIGN YAKASH */
{ BMP_0WIDTH(0x0A81, 0x0A83) }, /* GUJARATI SIGN CANDRABINDU - GUJARATI SIGN VISARGA */
{ BMP_0WIDTH(0x0ABC, 0x0ABC) }, /* GUJARATI SIGN NUKTA */
{ BMP_0WIDTH(0x0ABE, 0x0AC5) }, /* GUJARATI VOWEL SIGN AA - GUJARATI VOWEL SIGN CANDRA E */
{ BMP_0WIDTH(0x0AC7, 0x0AC9) }, /* GUJARATI VOWEL SIGN E - GUJARATI VOWEL SIGN CANDRA O */
{ BMP_0WIDTH(0x0ACB, 0x0ACD) }, /* GUJARATI VOWEL SIGN O - GUJARATI SIGN VIRAMA */
{ BMP_0WIDTH(0x0AE2, 0x0AE3) }, /* GUJARATI VOWEL SIGN VOCALIC L - GUJARATI VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x0AFA, 0x0AFF) }, /* GUJARATI SIGN SUKUN - GUJARATI SIGN TWO-CIRCLE NUKTA ABOVE */
{ BMP_0WIDTH(0x0B01, 0x0B03) }, /* ORIYA SIGN CANDRABINDU - ORIYA SIGN VISARGA */
{ BMP_0WIDTH(0x0B3C, 0x0B3C) }, /* ORIYA SIGN NUKTA */
{ BMP_0WIDTH(0x0B3E, 0x0B44) }, /* ORIYA VOWEL SIGN AA - ORIYA VOWEL SIGN VOCALIC RR */
{ BMP_0WIDTH(0x0B47, 0x0B48) }, /* ORIYA VOWEL SIGN E - ORIYA VOWEL SIGN AI */
{ BMP_0WIDTH(0x0B4B, 0x0B4D) }, /* ORIYA VOWEL SIGN O - ORIYA SIGN VIRAMA */
{ BMP_0WIDTH(0x0B55, 0x0B57) }, /* ORIYA SIGN OVERLINE - ORIYA AU LENGTH MARK */
{ BMP_0WIDTH(0x0B62, 0x0B63) }, /* ORIYA VOWEL SIGN VOCALIC L - ORIYA VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x0B82, 0x0B82) }, /* TAMIL SIGN ANUSVARA */
{ BMP_0WIDTH(0x0BBE, 0x0BC2) }, /* TAMIL VOWEL SIGN AA - TAMIL VOWEL SIGN UU */
{ BMP_0WIDTH(0x0BC6, 0x0BC8) }, /* TAMIL VOWEL SIGN E - TAMIL VOWEL SIGN AI */
{ BMP_0WIDTH(0x0BCA, 0x0BCD) }, /* TAMIL VOWEL SIGN O - TAMIL SIGN VIRAMA */
{ BMP_0WIDTH(0x0BD7, 0x0BD7) }, /* TAMIL AU LENGTH MARK */
{ BMP_0WIDTH(0x0C00, 0x0C04) }, /* TELUGU SIGN COMBINING CANDRABINDU ABOVE - TELUGU SIGN COMBINING ANUSVARA ABOVE */
{ BMP_0WIDTH(0x0C3C, 0x0C3C) }, /* TELUGU SIGN NUKTA */
{ BMP_0WIDTH(0x0C3E, 0x0C44) }, /* TELUGU VOWEL SIGN AA - TELUGU VOWEL SIGN VOCALIC RR */
{ BMP_0WIDTH(0x0C46, 0x0C48) }, /* TELUGU VOWEL SIGN E - TELUGU VOWEL SIGN AI */
{ BMP_0WIDTH(0x0C4A, 0x0C4D) }, /* TELUGU VOWEL SIGN O - TELUGU SIGN VIRAMA */
{ BMP_0WIDTH(0x0C55, 0x0C56) }, /* TELUGU LENGTH MARK - TELUGU AI LENGTH MARK */
{ BMP_0WIDTH(0x0C62, 0x0C63) }, /* TELUGU VOWEL SIGN VOCALIC L - TELUGU VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x0C81, 0x0C83) }, /* KANNADA SIGN CANDRABINDU - KANNADA SIGN VISARGA */
{ BMP_0WIDTH(0x0CBC, 0x0CBC) }, /* KANNADA SIGN NUKTA */
{ BMP_0WIDTH(0x0CBE, 0x0CC4) }, /* KANNADA VOWEL SIGN AA - KANNADA VOWEL SIGN VOCALIC RR */
{ BMP_0WIDTH(0x0CC6, 0x0CC8) }, /* KANNADA VOWEL SIGN E - KANNADA VOWEL SIGN AI */
{ BMP_0WIDTH(0x0CCA, 0x0CCD) }, /* KANNADA VOWEL SIGN O - KANNADA SIGN VIRAMA */
{ BMP_0WIDTH(0x0CD5, 0x0CD6) }, /* KANNADA LENGTH MARK - KANNADA AI LENGTH MARK */
{ BMP_0WIDTH(0x0CE2, 0x0CE3) }, /* KANNADA VOWEL SIGN VOCALIC L - KANNADA VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x0CF3, 0x0CF3) }, /* KANNADA SIGN COMBINING ANUSVARA ABOVE RIGHT */
{ BMP_0WIDTH(0x0D00, 0x0D03) }, /* MALAYALAM SIGN COMBINING ANUSVARA ABOVE - MALAYALAM SIGN VISARGA */
{ BMP_0WIDTH(0x0D3B, 0x0D3C) }, /* MALAYALAM SIGN VERTICAL BAR VIRAMA - MALAYALAM SIGN CIRCULAR VIRAMA */
{ BMP_0WIDTH(0x0D3E, 0x0D44) }, /* MALAYALAM VOWEL SIGN AA - MALAYALAM VOWEL SIGN VOCALIC RR */
{ BMP_0WIDTH(0x0D46, 0x0D48) }, /* MALAYALAM VOWEL SIGN E - MALAYALAM VOWEL SIGN AI */
{ BMP_0WIDTH(0x0D4A, 0x0D4D) }, /* MALAYALAM VOWEL SIGN O - MALAYALAM SIGN VIRAMA */
{ BMP_0WIDTH(0x0D57, 0x0D57) }, /* MALAYALAM AU LENGTH MARK */
{ BMP_0WIDTH(0x0D62, 0x0D63) }, /* MALAYALAM VOWEL SIGN VOCALIC L - MALAYALAM VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x0D81, 0x0D83) }, /* SINHALA SIGN CANDRABINDU - SINHALA SIGN VISARGAYA */
{ BMP_0WIDTH(0x0DCA, 0x0DCA) }, /* SINHALA SIGN AL-LAKUNA */
{ BMP_0WIDTH(0x0DCF, 0x0DD4) }, /* SINHALA VOWEL SIGN AELA-PILLA - SINHALA VOWEL SIGN KETTI PAA-PILLA */
{ BMP_0WIDTH(0x0DD6, 0x0DD6) }, /* SINHALA VOWEL SIGN DIGA PAA-PILLA */
{ BMP_0WIDTH(0x0DD8, 0x0DDF) }, /* SINHALA VOWEL SIGN GAETTA-PILLA - SINHALA VOWEL SIGN GAYANUKITTA */
{ BMP_0WIDTH(0x0DF2, 0x0DF3) }, /* SINHALA VOWEL SIGN DIGA GAETTA-PILLA - SINHALA VOWEL SIGN DIGA GAYANUKITTA */
{ BMP_0WIDTH(0x0E31, 0x0E31) }, /* THAI CHARACTER MAI HAN-AKAT */
{ BMP_0WIDTH(0x0E34, 0x0E3A) }, /* THAI CHARACTER SARA I - THAI CHARACTER PHINTHU */
{ BMP_0WIDTH(0x0E47, 0x0E4E) }, /* THAI CHARACTER MAITAIKHU - THAI CHARACTER YAMAKKAN */
{ BMP_0WIDTH(0x0EB1, 0x0EB1) }, /* LAO VOWEL SIGN MAI KAN */
{ BMP_0WIDTH(0x0EB4, 0x0EBC) }, /* LAO VOWEL SIGN I - LAO SEMIVOWEL SIGN LO */
{ BMP_0WIDTH(0x0EC8, 0x0ECE) }, /* LAO TONE MAI EK - LAO YAMAKKAN */
{ BMP_0WIDTH(0x0F18, 0x0F19) }, /* TIBETAN ASTROLOGICAL SIGN -KHYUD PA - TIBETAN ASTROLOGICAL SIGN SDONG TSHUGS */
{ BMP_0WIDTH(0x0F35, 0x0F35) }, /* TIBETAN MARK NGAS BZUNG NYI ZLA */
{ BMP_0WIDTH(0x0F37, 0x0F37) }, /* TIBETAN MARK NGAS BZUNG SGOR RTAGS */
{ BMP_0WIDTH(0x0F39, 0x0F39) }, /* TIBETAN MARK TSA -PHRU */
{ BMP_0WIDTH(0x0F3E, 0x0F3F) }, /* TIBETAN SIGN YAR TSHES - TIBETAN SIGN MAR TSHES */
{ BMP_0WIDTH(0x0F71, 0x0F84) }, /* TIBETAN VOWEL SIGN AA - TIBETAN MARK HALANTA */
{ BMP_0WIDTH(0x0F86, 0x0F87) }, /* TIBETAN SIGN LCI RTAGS - TIBETAN SIGN YANG RTAGS */
{ BMP_0WIDTH(0x0F8D, 0x0F97) }, /* TIBETAN SUBJOINED SIGN LCE TSA CAN - TIBETAN SUBJOINED LETTER JA */
{ BMP_0WIDTH(0x0F99, 0x0FBC) }, /* TIBETAN SUBJOINED LETTER NYA - TIBETAN SUBJOINED LETTER FIXED-FORM RA */
{ BMP_0WIDTH(0x0FC6, 0x0FC6) }, /* TIBETAN SYMBOL PADMA GDAN */
{ BMP_0WIDTH(0x102B, 0x103E) }, /* MYANMAR VOWEL SIGN TALL AA - MYANMAR CONSONANT SIGN MEDIAL HA */
{ BMP_0WIDTH(0x1056, 0x1059) }, /* MYANMAR VOWEL SIGN VOCALIC R - MYANMAR VOWEL SIGN VOCALIC LL */
{ BMP_0WIDTH(0x105E, 0x1060) }, /* MYANMAR CONSONANT SIGN MON MEDIAL NA - MYANMAR CONSONANT SIGN MON MEDIAL LA */
{ BMP_0WIDTH(0x1062, 0x1064) }, /* MYANMAR VOWEL SIGN SGAW KAREN EU - MYANMAR TONE MARK SGAW KAREN KE PHO */
{ BMP_0WIDTH(0x1067, 0x106D) }, /* MYANMAR VOWEL SIGN WESTERN PWO KAREN EU - MYANMAR SIGN WESTERN PWO KAREN TONE-5 */
{ BMP_0WIDTH(0x1071, 0x1074) }, /* MYANMAR VOWEL SIGN GEBA KAREN I - MYANMAR VOWEL SIGN KAYAH EE */
{ BMP_0WIDTH(0x1082, 0x108D) }, /* MYANMAR CONSONANT SIGN SHAN MEDIAL WA - MYANMAR SIGN SHAN COUNCIL EMPHATIC TONE */
{ BMP_0WIDTH(0x108F, 0x108F) }, /* MYANMAR SIGN RUMAI PALAUNG TONE-5 */
{ BMP_0WIDTH(0x109A, 0x109D) }, /* MYANMAR SIGN KHAMTI TONE-1 - MYANMAR VOWEL SIGN AITON AI */
{ BMP_2WIDTH(0x1100, 0x115F) }, /* HANGUL CHOSEONG KIYEOK - HANGUL CHOSEONG FILLER */
{ BMP_0WIDTH(0x135D, 0x135F) }, /* ETHIOPIC COMBINING GEMINATION AND VOWEL LENGTH MARK - ETHIOPIC COMBINING GEMINATION MARK */
{ BMP_0WIDTH(0x1712, 0x1715) }, /* TAGALOG VOWEL SIGN I - TAGALOG SIGN PAMUDPOD */
{ BMP_0WIDTH(0x1732, 0x1734) }, /* HANUNOO VOWEL SIGN I - HANUNOO SIGN PAMUDPOD */
{ BMP_0WIDTH(0x1752, 0x1753) }, /* BUHID VOWEL SIGN I - BUHID VOWEL SIGN U */
{ BMP_0WIDTH(0x1772, 0x1773) }, /* TAGBANWA VOWEL SIGN I - TAGBANWA VOWEL SIGN U */
{ BMP_0WIDTH(0x17B4, 0x17D3) }, /* KHMER VOWEL INHERENT AQ - KHMER SIGN BATHAMASAT */
{ BMP_0WIDTH(0x17DD, 0x17DD) }, /* KHMER SIGN ATTHACAN */
{ BMP_0WIDTH(0x180B, 0x180F) }, /* MONGOLIAN FREE VARIATION SELECTOR ONE - MONGOLIAN FREE VARIATION SELECTOR FOUR */
{ BMP_0WIDTH(0x1885, 0x1886) }, /* MONGOLIAN LETTER ALI GALI BALUDA - MONGOLIAN LETTER ALI GALI THREE BALUDA */
{ BMP_0WIDTH(0x18A9, 0x18A9) }, /* MONGOLIAN LETTER ALI GALI DAGALGA */
{ BMP_0WIDTH(0x1920, 0x192B) }, /* LIMBU VOWEL SIGN A - LIMBU SUBJOINED LETTER WA */
{ BMP_0WIDTH(0x1930, 0x193B) }, /* LIMBU SMALL LETTER KA - LIMBU SIGN SA-I */
{ BMP_0WIDTH(0x1A17, 0x1A1B) }, /* BUGINESE VOWEL SIGN I - BUGINESE VOWEL SIGN AE */
{ BMP_0WIDTH(0x1A55, 0x1A5E) }, /* TAI THAM CONSONANT SIGN MEDIAL RA - TAI THAM CONSONANT SIGN SA */
{ BMP_0WIDTH(0x1A60, 0x1A7C) }, /* TAI THAM SIGN SAKOT - TAI THAM SIGN KHUEN-LUE KARAN */
{ BMP_0WIDTH(0x1A7F, 0x1A7F) }, /* TAI THAM COMBINING CRYPTOGRAMMIC DOT */
{ BMP_0WIDTH(0x1AB0, 0x1ACE) }, /* COMBINING DOUBLED CIRCUMFLEX ACCENT - COMBINING LATIN SMALL LETTER INSULAR T */
{ BMP_0WIDTH(0x1B00, 0x1B04) }, /* BALINESE SIGN ULU RICEM - BALINESE SIGN BISAH */
{ BMP_0WIDTH(0x1B34, 0x1B44) }, /* BALINESE SIGN REREKAN - BALINESE ADEG ADEG */
{ BMP_0WIDTH(0x1B6B, 0x1B73) }, /* BALINESE MUSICAL SYMBOL COMBINING TEGEH - BALINESE MUSICAL SYMBOL COMBINING GONG */
{ BMP_0WIDTH(0x1B80, 0x1B82) }, /* SUNDANESE SIGN PANYECEK - SUNDANESE SIGN PANGWISAD */
{ BMP_0WIDTH(0x1BA1, 0x1BAD) }, /* SUNDANESE CONSONANT SIGN PAMINGKAL - SUNDANESE CONSONANT SIGN PASANGAN WA */
{ BMP_0WIDTH(0x1BE6, 0x1BF3) }, /* BATAK SIGN TOMPI - BATAK PANONGONAN */
{ BMP_0WIDTH(0x1C24, 0x1C37) }, /* LEPCHA SUBJOINED LETTER YA - LEPCHA SIGN NUKTA */
{ BMP_0WIDTH(0x1CD0, 0x1CD2) }, /* VEDIC TONE KARSHANA - VEDIC TONE PRENKHA */
{ BMP_0WIDTH(0x1CD4, 0x1CE8) }, /* VEDIC SIGN YAJURVEDIC MIDLINE SVARITA - VEDIC SIGN VISARGA ANUDATTA WITH TAIL */
{ BMP_0WIDTH(0x1CED, 0x1CED) }, /* VEDIC SIGN TIRYAK */
{ BMP_0WIDTH(0x1CF4, 0x1CF4) }, /* VEDIC TONE CANDRA ABOVE */
{ BMP_0WIDTH(0x1CF7, 0x1CF9) }, /* VEDIC SIGN ATIKRAMA - VEDIC TONE DOUBLE RING ABOVE */
{ BMP_0WIDTH(0x1DC0, 0x1DFF) }, /* COMBINING DOTTED GRAVE ACCENT - COMBINING RIGHT ARROWHEAD AND DOWN ARROWHEAD BELOW */
{ BMP_0WIDTH(0x200B, 0x200F) }, /* ZERO WIDTH SPACE - RIGHT-TO-LEFT MARK */
{ BMP_0WIDTH(0x202A, 0x202E) }, /* LEFT-TO-RIGHT EMBEDDING - RIGHT-TO-LEFT OVERRIDE */
{ BMP_0WIDTH(0x2060, 0x2064) }, /* WORD JOINER - INVISIBLE PLUS */
{ BMP_0WIDTH(0x2066, 0x206F) }, /* LEFT-TO-RIGHT ISOLATE - NOMINAL DIGIT SHAPES */
{ BMP_0WIDTH(0x20D0, 0x20F0) }, /* COMBINING LEFT HARPOON ABOVE - COMBINING ASTERISK ABOVE */
{ BMP_2WIDTH(0x231A, 0x231B) }, /* WATCH - HOURGLASS */
{ BMP_2WIDTH(0x2329, 0x232A) }, /* LEFT-POINTING ANGLE BRACKET - RIGHT-POINTING ANGLE BRACKET */
{ BMP_2WIDTH(0x23E9, 0x23EC) }, /* BLACK RIGHT-POINTING DOUBLE TRIANGLE - BLACK DOWN-POINTING DOUBLE TRIANGLE */
{ BMP_2WIDTH(0x23F0, 0x23F0) }, /* ALARM CLOCK */
{ BMP_2WIDTH(0x23F3, 0x23F3) }, /* HOURGLASS WITH FLOWING SAND */
{ BMP_2WIDTH(0x25FD, 0x25FE) }, /* WHITE MEDIUM SMALL SQUARE - BLACK MEDIUM SMALL SQUARE */
{ BMP_2WIDTH(0x2614, 0x2615) }, /* UMBRELLA WITH RAIN DROPS - HOT BEVERAGE */
{ BMP_2WIDTH(0x2630, 0x2637) }, /* TRIGRAM FOR HEAVEN - TRIGRAM FOR EARTH */
{ BMP_0WIDTH(0x2640, 0x2640) }, /* FEMALE SIGN */
{ BMP_0WIDTH(0x2642, 0x2642) }, /* MALE SIGN */
{ BMP_2WIDTH(0x2648, 0x2653) }, /* ARIES - PISCES */
{ BMP_2WIDTH(0x267F, 0x267F) }, /* WHEELCHAIR SYMBOL */
{ BMP_2WIDTH(0x268A, 0x268F) }, /* MONOGRAM FOR YANG - DIGRAM FOR GREATER YIN */
{ BMP_2WIDTH(0x2693, 0x2693) }, /* ANCHOR */
{ BMP_2WIDTH(0x26A1, 0x26A1) }, /* HIGH VOLTAGE SIGN */
{ BMP_0WIDTH(0x26A7, 0x26A7) }, /* MALE WITH STROKE AND MALE AND FEMALE SIGN */
{ BMP_2WIDTH(0x26AA, 0x26AB) }, /* MEDIUM WHITE CIRCLE - MEDIUM BLACK CIRCLE */
{ BMP_2WIDTH(0x26BD, 0x26BE) }, /* SOCCER BALL - BASEBALL */
{ BMP_2WIDTH(0x26C4, 0x26C5) }, /* SNOWMAN WITHOUT SNOW - SUN BEHIND CLOUD */
{ BMP_2WIDTH(0x26CE, 0x26CE) }, /* OPHIUCHUS */
{ BMP_2WIDTH(0x26D4, 0x26D4) }, /* NO ENTRY */
{ BMP_2WIDTH(0x26EA, 0x26EA) }, /* CHURCH */
{ BMP_2WIDTH(0x26F2, 0x26F3) }, /* FOUNTAIN - FLAG IN HOLE */
{ BMP_2WIDTH(0x26F5, 0x26F5) }, /* SAILBOAT */
{ BMP_2WIDTH(0x26FA, 0x26FA) }, /* TENT */
{ BMP_2WIDTH(0x26FD, 0x26FD) }, /* FUEL PUMP */
{ BMP_2WIDTH(0x2705, 0x2705) }, /* WHITE HEAVY CHECK MARK */
{ BMP_2WIDTH(0x270A, 0x270B) }, /* RAISED FIST - RAISED HAND */
{ BMP_2WIDTH(0x2728, 0x2728) }, /* SPARKLES */
{ BMP_2WIDTH(0x274C, 0x274C) }, /* CROSS MARK */
{ BMP_2WIDTH(0x274E, 0x274E) }, /* NEGATIVE SQUARED CROSS MARK */
{ BMP_2WIDTH(0x2753, 0x2755) }, /* BLACK QUESTION MARK ORNAMENT - WHITE EXCLAMATION MARK ORNAMENT */
{ BMP_2WIDTH(0x2757, 0x2757) }, /* HEAVY EXCLAMATION MARK SYMBOL */
{ BMP_2WIDTH(0x2795, 0x2797) }, /* HEAVY PLUS SIGN - HEAVY DIVISION SIGN */
{ BMP_2WIDTH(0x27B0, 0x27B0) }, /* CURLY LOOP */
{ BMP_2WIDTH(0x27BF, 0x27BF) }, /* DOUBLE CURLY LOOP */
{ BMP_2WIDTH(0x2B1B, 0x2B1C) }, /* BLACK LARGE SQUARE - WHITE LARGE SQUARE */
{ BMP_2WIDTH(0x2B50, 0x2B50) }, /* WHITE MEDIUM STAR */
{ BMP_2WIDTH(0x2B55, 0x2B55) }, /* HEAVY LARGE CIRCLE */
{ BMP_0WIDTH(0x2CEF, 0x2CF1) }, /* COPTIC COMBINING NI ABOVE - COPTIC COMBINING SPIRITUS LENIS */
{ BMP_0WIDTH(0x2D7F, 0x2D7F) }, /* TIFINAGH CONSONANT JOINER */
{ BMP_0WIDTH(0x2DE0, 0x2DFF) }, /* COMBINING CYRILLIC LETTER BE - COMBINING CYRILLIC LETTER IOTIFIED BIG YUS */
{ BMP_2WIDTH(0x2E80, 0x2E99) }, /* CJK RADICAL REPEAT - CJK RADICAL RAP */
{ BMP_2WIDTH(0x2E9B, 0x2EF3) }, /* CJK RADICAL CHOKE - CJK RADICAL C-SIMPLIFIED TURTLE */
{ BMP_2WIDTH(0x2F00, 0x2FD5) }, /* KANGXI RADICAL ONE - KANGXI RADICAL FLUTE */
{ BMP_2WIDTH(0x2FF0, 0x3029) }, /* IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO RIGHT - HANGZHOU NUMERAL NINE */
{ BMP_0WIDTH(0x302A, 0x302F) }, /* IDEOGRAPHIC LEVEL TONE MARK - HANGUL DOUBLE DOT TONE MARK */
{ BMP_2WIDTH(0x3030, 0x303E) }, /* WAVY DASH - IDEOGRAPHIC VARIATION INDICATOR */
{ BMP_2WIDTH(0x3041, 0x3096) }, /* HIRAGANA LETTER SMALL A - HIRAGANA LETTER SMALL KE */
{ BMP_0WIDTH(0x3099, 0x309A) }, /* COMBINING KATAKANA-HIRAGANA VOICED SOUND MARK - COMBINING KATAKANA-HIRAGANA SEMI-VOICED SOUND MARK */
{ BMP_2WIDTH(0x309B, 0x30FF) }, /* KATAKANA-HIRAGANA VOICED SOUND MARK - KATAKANA DIGRAPH KOTO */
{ BMP_2WIDTH(0x3105, 0x312F) }, /* BOPOMOFO LETTER B - BOPOMOFO LETTER NN */
{ BMP_2WIDTH(0x3131, 0x318E) }, /* HANGUL LETTER KIYEOK - HANGUL LETTER ARAEAE */
{ BMP_2WIDTH(0x3190, 0x31E5) }, /* IDEOGRAPHIC ANNOTATION LINKING MARK - CJK STROKE SZP */
{ BMP_2WIDTH(0x31EF, 0x321E) }, /* IDEOGRAPHIC DESCRIPTION CHARACTER SUBTRACTION - PARENTHESIZED KOREAN CHARACTER O HU */
{ BMP_2WIDTH(0x3220, 0x3247) }, /* PARENTHESIZED IDEOGRAPH ONE - CIRCLED IDEOGRAPH KOTO */
{ BMP_2WIDTH(0x3250, 0xA48C) }, /* PARTNERSHIP SIGN - YI SYLLABLE YYR */
{ BMP_2WIDTH(0xA490, 0xA4C6) }, /* YI RADICAL QOT - YI RADICAL KE */
{ BMP_0WIDTH(0xA66F, 0xA672) }, /* COMBINING CYRILLIC VZMET - COMBINING CYRILLIC THOUSAND MILLIONS SIGN */
{ BMP_0WIDTH(0xA674, 0xA67D) }, /* COMBINING CYRILLIC LETTER UKRAINIAN IE - COMBINING CYRILLIC PAYEROK */
{ BMP_0WIDTH(0xA69E, 0xA69F) }, /* COMBINING CYRILLIC LETTER EF - COMBINING CYRILLIC LETTER IOTIFIED E */
{ BMP_0WIDTH(0xA6F0, 0xA6F1) }, /* BAMUM COMBINING MARK KOQNDON - BAMUM COMBINING MARK TUKWENTIS */
{ BMP_0WIDTH(0xA802, 0xA802) }, /* SYLOTI NAGRI SIGN DVISVARA */
{ BMP_0WIDTH(0xA806, 0xA806) }, /* SYLOTI NAGRI SIGN HASANTA */
{ BMP_0WIDTH(0xA80B, 0xA80B) }, /* SYLOTI NAGRI SIGN ANUSVARA */
{ BMP_0WIDTH(0xA823, 0xA827) }, /* SYLOTI NAGRI VOWEL SIGN A - SYLOTI NAGRI VOWEL SIGN OO */
{ BMP_0WIDTH(0xA82C, 0xA82C) }, /* SYLOTI NAGRI SIGN ALTERNATE HASANTA */
{ BMP_0WIDTH(0xA880, 0xA881) }, /* SAURASHTRA SIGN ANUSVARA - SAURASHTRA SIGN VISARGA */
{ BMP_0WIDTH(0xA8B4, 0xA8C5) }, /* SAURASHTRA CONSONANT SIGN HAARU - SAURASHTRA SIGN CANDRABINDU */
{ BMP_0WIDTH(0xA8E0, 0xA8F1) }, /* COMBINING DEVANAGARI DIGIT ZERO - COMBINING DEVANAGARI SIGN AVAGRAHA */
{ BMP_0WIDTH(0xA8FF, 0xA8FF) }, /* DEVANAGARI VOWEL SIGN AY */
{ BMP_0WIDTH(0xA926, 0xA92D) }, /* KAYAH LI VOWEL UE - KAYAH LI TONE CALYA PLOPHU */
{ BMP_0WIDTH(0xA947, 0xA953) }, /* REJANG VOWEL SIGN I - REJANG VIRAMA */
{ BMP_2WIDTH(0xA960, 0xA97C) }, /* HANGUL CHOSEONG TIKEUT-MIEUM - HANGUL CHOSEONG SSANGYEORINHIEUH */
{ BMP_0WIDTH(0xA980, 0xA983) }, /* JAVANESE SIGN PANYANGGA - JAVANESE SIGN WIGNYAN */
{ BMP_0WIDTH(0xA9B3, 0xA9C0) }, /* JAVANESE SIGN CECAK TELU - JAVANESE PANGKON */
{ BMP_0WIDTH(0xA9E5, 0xA9E5) }, /* MYANMAR SIGN SHAN SAW */
{ BMP_0WIDTH(0xAA29, 0xAA36) }, /* CHAM VOWEL SIGN AA - CHAM CONSONANT SIGN WA */
{ BMP_0WIDTH(0xAA43, 0xAA43) }, /* CHAM CONSONANT SIGN FINAL NG */
{ BMP_0WIDTH(0xAA4C, 0xAA4D) }, /* CHAM CONSONANT SIGN FINAL M - CHAM CONSONANT SIGN FINAL H */
{ BMP_0WIDTH(0xAA7B, 0xAA7D) }, /* MYANMAR SIGN PAO KAREN TONE - MYANMAR SIGN TAI LAING TONE-5 */
{ BMP_0WIDTH(0xAAB0, 0xAAB0) }, /* TAI VIET MAI KANG */
{ BMP_0WIDTH(0xAAB2, 0xAAB4) }, /* TAI VIET VOWEL I - TAI VIET VOWEL U */
{ BMP_0WIDTH(0xAAB7, 0xAAB8) }, /* TAI VIET MAI KHIT - TAI VIET VOWEL IA */
{ BMP_0WIDTH(0xAABE, 0xAABF) }, /* TAI VIET VOWEL AM - TAI VIET TONE MAI EK */
{ BMP_0WIDTH(0xAAC1, 0xAAC1) }, /* TAI VIET TONE MAI THO */
{ BMP_0WIDTH(0xAAEB, 0xAAEF) }, /* MEETEI MAYEK VOWEL SIGN II - MEETEI MAYEK VOWEL SIGN AAU */
{ BMP_0WIDTH(0xAAF5, 0xAAF6) }, /* MEETEI MAYEK VOWEL SIGN VISARGA - MEETEI MAYEK VIRAMA */
{ BMP_0WIDTH(0xABE3, 0xABEA) }, /* MEETEI MAYEK VOWEL SIGN ONAP - MEETEI MAYEK VOWEL SIGN NUNG */
{ BMP_0WIDTH(0xABEC, 0xABED) }, /* MEETEI MAYEK LUM IYEK - MEETEI MAYEK APUN IYEK */
{ BMP_2WIDTH(0xAC00, 0xD7A3) }, /* HANGUL SYLLABLE GA - HANGUL SYLLABLE HIH */
{ BMP_2WIDTH(0xF900, 0xFAFF) }, /* U+F900 - U+FAFF */
{ BMP_0WIDTH(0xFB1E, 0xFB1E) }, /* HEBREW POINT JUDEO-SPANISH VARIKA */
{ BMP_0WIDTH(0xFE00, 0xFE0F) }, /* VARIATION SELECTOR-1 - VARIATION SELECTOR-16 */
{ BMP_2WIDTH(0xFE10, 0xFE19) }, /* PRESENTATION FORM FOR VERTICAL COMMA - PRESENTATION FORM FOR VERTICAL HORIZONTAL ELLIPSIS */
{ BMP_0WIDTH(0xFE20, 0xFE2F) }, /* COMBINING LIGATURE LEFT HALF - COMBINING CYRILLIC TITLO RIGHT HALF */
{ BMP_2WIDTH(0xFE30, 0xFE52) }, /* PRESENTATION FORM FOR VERTICAL TWO DOT LEADER - SMALL FULL STOP */
{ BMP_2WIDTH(0xFE54, 0xFE66) }, /* SMALL SEMICOLON - SMALL EQUALS SIGN */
{ BMP_2WIDTH(0xFE68, 0xFE6B) }, /* SMALL REVERSE SOLIDUS - SMALL COMMERCIAL AT */
{ BMP_0WIDTH(0xFEFF, 0xFEFF) }, /* ZERO WIDTH NO-BREAK SPACE */
{ BMP_2WIDTH(0xFF01, 0xFF60) }, /* FULLWIDTH EXCLAMATION MARK - FULLWIDTH RIGHT WHITE PARENTHESIS */
{ BMP_2WIDTH(0xFFE0, 0xFFE6) }, /* FULLWIDTH CENT SIGN - FULLWIDTH WON SIGN */
{ BMP_0WIDTH(0xFFF9, 0xFFFB) }, /* INTERLINEAR ANNOTATION ANCHOR - INTERLINEAR ANNOTATION TERMINATOR */
};
/* Zero-width character ranges (non-BMP, U+10000 and above) */
static const struct ucs_interval32 ucs_zero_width_non_bmp_ranges[] = {
{ 0x101FD, 0x101FD }, /* PHAISTOS DISC SIGN COMBINING OBLIQUE STROKE */
{ 0x102E0, 0x102E0 }, /* COPTIC EPACT THOUSANDS MARK */
{ 0x10376, 0x1037A }, /* COMBINING OLD PERMIC LETTER AN - COMBINING OLD PERMIC LETTER SII */
{ 0x10A01, 0x10A03 }, /* KHAROSHTHI VOWEL SIGN I - KHAROSHTHI VOWEL SIGN VOCALIC R */
{ 0x10A05, 0x10A06 }, /* KHAROSHTHI VOWEL SIGN E - KHAROSHTHI VOWEL SIGN O */
{ 0x10A0C, 0x10A0F }, /* KHAROSHTHI VOWEL LENGTH MARK - KHAROSHTHI SIGN VISARGA */
{ 0x10A38, 0x10A3A }, /* KHAROSHTHI SIGN BAR ABOVE - KHAROSHTHI SIGN DOT BELOW */
{ 0x10A3F, 0x10A3F }, /* KHAROSHTHI VIRAMA */
{ 0x10AE5, 0x10AE6 }, /* MANICHAEAN ABBREVIATION MARK ABOVE - MANICHAEAN ABBREVIATION MARK BELOW */
{ 0x10D24, 0x10D27 }, /* HANIFI ROHINGYA SIGN HARBAHAY - HANIFI ROHINGYA SIGN TASSI */
{ 0x10D69, 0x10D6D }, /* GARAY VOWEL SIGN E - GARAY CONSONANT NASALIZATION MARK */
{ 0x10EAB, 0x10EAC }, /* YEZIDI COMBINING HAMZA MARK - YEZIDI COMBINING MADDA MARK */
{ 0x10EFC, 0x10EFF }, /* ARABIC COMBINING ALEF OVERLAY - ARABIC SMALL LOW WORD MADDA */
{ 0x10F46, 0x10F50 }, /* SOGDIAN COMBINING DOT BELOW - SOGDIAN COMBINING STROKE BELOW */
{ 0x10F82, 0x10F85 }, /* OLD UYGHUR COMBINING DOT ABOVE - OLD UYGHUR COMBINING TWO DOTS BELOW */
{ 0x11000, 0x11002 }, /* BRAHMI SIGN CANDRABINDU - BRAHMI SIGN VISARGA */
{ 0x11038, 0x11046 }, /* BRAHMI VOWEL SIGN AA - BRAHMI VIRAMA */
{ 0x11070, 0x11070 }, /* BRAHMI SIGN OLD TAMIL VIRAMA */
{ 0x11073, 0x11074 }, /* BRAHMI VOWEL SIGN OLD TAMIL SHORT E - BRAHMI VOWEL SIGN OLD TAMIL SHORT O */
{ 0x1107F, 0x11082 }, /* BRAHMI NUMBER JOINER - KAITHI SIGN VISARGA */
{ 0x110B0, 0x110BA }, /* KAITHI VOWEL SIGN AA - KAITHI SIGN NUKTA */
{ 0x110BD, 0x110BD }, /* KAITHI NUMBER SIGN */
{ 0x110C2, 0x110C2 }, /* KAITHI VOWEL SIGN VOCALIC R */
{ 0x110CD, 0x110CD }, /* KAITHI NUMBER SIGN ABOVE */
{ 0x11100, 0x11102 }, /* CHAKMA SIGN CANDRABINDU - CHAKMA SIGN VISARGA */
{ 0x11127, 0x11134 }, /* CHAKMA VOWEL SIGN A - CHAKMA MAAYYAA */
{ 0x11145, 0x11146 }, /* CHAKMA VOWEL SIGN AA - CHAKMA VOWEL SIGN EI */
{ 0x11173, 0x11173 }, /* MAHAJANI SIGN NUKTA */
{ 0x11180, 0x11182 }, /* SHARADA SIGN CANDRABINDU - SHARADA SIGN VISARGA */
{ 0x111B3, 0x111C0 }, /* SHARADA VOWEL SIGN AA - SHARADA SIGN VIRAMA */
{ 0x111C9, 0x111CC }, /* SHARADA SANDHI MARK - SHARADA EXTRA SHORT VOWEL MARK */
{ 0x111CE, 0x111CF }, /* SHARADA VOWEL SIGN PRISHTHAMATRA E - SHARADA SIGN INVERTED CANDRABINDU */
{ 0x1122C, 0x11237 }, /* KHOJKI VOWEL SIGN AA - KHOJKI SIGN SHADDA */
{ 0x1123E, 0x1123E }, /* KHOJKI SIGN SUKUN */
{ 0x11241, 0x11241 }, /* KHOJKI VOWEL SIGN VOCALIC R */
{ 0x112DF, 0x112EA }, /* KHUDAWADI SIGN ANUSVARA - KHUDAWADI SIGN VIRAMA */
{ 0x11300, 0x11303 }, /* GRANTHA SIGN COMBINING ANUSVARA ABOVE - GRANTHA SIGN VISARGA */
{ 0x1133B, 0x1133C }, /* COMBINING BINDU BELOW - GRANTHA SIGN NUKTA */
{ 0x1133E, 0x11344 }, /* GRANTHA VOWEL SIGN AA - GRANTHA VOWEL SIGN VOCALIC RR */
{ 0x11347, 0x11348 }, /* GRANTHA VOWEL SIGN EE - GRANTHA VOWEL SIGN AI */
{ 0x1134B, 0x1134D }, /* GRANTHA VOWEL SIGN OO - GRANTHA SIGN VIRAMA */
{ 0x11357, 0x11357 }, /* GRANTHA AU LENGTH MARK */
{ 0x11362, 0x11363 }, /* GRANTHA VOWEL SIGN VOCALIC L - GRANTHA VOWEL SIGN VOCALIC LL */
{ 0x11366, 0x1136C }, /* COMBINING GRANTHA DIGIT ZERO - COMBINING GRANTHA DIGIT SIX */
{ 0x11370, 0x11374 }, /* COMBINING GRANTHA LETTER A - COMBINING GRANTHA LETTER PA */
{ 0x113B8, 0x113C0 }, /* TULU-TIGALARI VOWEL SIGN AA - TULU-TIGALARI VOWEL SIGN VOCALIC LL */
{ 0x113C2, 0x113C2 }, /* TULU-TIGALARI VOWEL SIGN EE */
{ 0x113C5, 0x113C5 }, /* TULU-TIGALARI VOWEL SIGN AI */
{ 0x113C7, 0x113CA }, /* TULU-TIGALARI VOWEL SIGN OO - TULU-TIGALARI SIGN CANDRA ANUNASIKA */
{ 0x113CC, 0x113D0 }, /* TULU-TIGALARI SIGN ANUSVARA - TULU-TIGALARI CONJOINER */
{ 0x113D2, 0x113D2 }, /* TULU-TIGALARI GEMINATION MARK */
{ 0x113E1, 0x113E2 }, /* TULU-TIGALARI VEDIC TONE SVARITA - TULU-TIGALARI VEDIC TONE ANUDATTA */
{ 0x11435, 0x11446 }, /* NEWA VOWEL SIGN AA - NEWA SIGN NUKTA */
{ 0x1145E, 0x1145E }, /* NEWA SANDHI MARK */
{ 0x114B0, 0x114C3 }, /* TIRHUTA VOWEL SIGN AA - TIRHUTA SIGN NUKTA */
{ 0x115AF, 0x115B5 }, /* SIDDHAM VOWEL SIGN AA - SIDDHAM VOWEL SIGN VOCALIC RR */
{ 0x115B8, 0x115C0 }, /* SIDDHAM VOWEL SIGN E - SIDDHAM SIGN NUKTA */
{ 0x115DC, 0x115DD }, /* SIDDHAM VOWEL SIGN ALTERNATE U - SIDDHAM VOWEL SIGN ALTERNATE UU */
{ 0x11630, 0x11640 }, /* MODI VOWEL SIGN AA - MODI SIGN ARDHACANDRA */
{ 0x116AB, 0x116B7 }, /* TAKRI SIGN ANUSVARA - TAKRI SIGN NUKTA */
{ 0x1171D, 0x1172B }, /* AHOM CONSONANT SIGN MEDIAL LA - AHOM SIGN KILLER */
{ 0x1182C, 0x1183A }, /* DOGRA VOWEL SIGN AA - DOGRA SIGN NUKTA */
{ 0x11930, 0x11935 }, /* DIVES AKURU VOWEL SIGN AA - DIVES AKURU VOWEL SIGN E */
{ 0x11937, 0x11938 }, /* DIVES AKURU VOWEL SIGN AI - DIVES AKURU VOWEL SIGN O */
{ 0x1193B, 0x1193E }, /* DIVES AKURU SIGN ANUSVARA - DIVES AKURU VIRAMA */
{ 0x11940, 0x11940 }, /* DIVES AKURU MEDIAL YA */
{ 0x11942, 0x11943 }, /* DIVES AKURU MEDIAL RA - DIVES AKURU SIGN NUKTA */
{ 0x119D1, 0x119D7 }, /* NANDINAGARI VOWEL SIGN AA - NANDINAGARI VOWEL SIGN VOCALIC RR */
{ 0x119DA, 0x119E0 }, /* NANDINAGARI VOWEL SIGN E - NANDINAGARI SIGN VIRAMA */
{ 0x119E4, 0x119E4 }, /* NANDINAGARI VOWEL SIGN PRISHTHAMATRA E */
{ 0x11A01, 0x11A0A }, /* ZANABAZAR SQUARE VOWEL SIGN I - ZANABAZAR SQUARE VOWEL LENGTH MARK */
{ 0x11A33, 0x11A39 }, /* ZANABAZAR SQUARE FINAL CONSONANT MARK - ZANABAZAR SQUARE SIGN VISARGA */
{ 0x11A3B, 0x11A3E }, /* ZANABAZAR SQUARE CLUSTER-FINAL LETTER YA - ZANABAZAR SQUARE CLUSTER-FINAL LETTER VA */
{ 0x11A47, 0x11A47 }, /* ZANABAZAR SQUARE SUBJOINER */
{ 0x11A51, 0x11A5B }, /* SOYOMBO VOWEL SIGN I - SOYOMBO VOWEL LENGTH MARK */
{ 0x11A8A, 0x11A99 }, /* SOYOMBO FINAL CONSONANT SIGN G - SOYOMBO SUBJOINER */
{ 0x11C2F, 0x11C36 }, /* BHAIKSUKI VOWEL SIGN AA - BHAIKSUKI VOWEL SIGN VOCALIC L */
{ 0x11C38, 0x11C3F }, /* BHAIKSUKI VOWEL SIGN E - BHAIKSUKI SIGN VIRAMA */
{ 0x11C92, 0x11CA7 }, /* MARCHEN SUBJOINED LETTER KA - MARCHEN SUBJOINED LETTER ZA */
{ 0x11CA9, 0x11CB6 }, /* MARCHEN SUBJOINED LETTER YA - MARCHEN SIGN CANDRABINDU */
{ 0x11D31, 0x11D36 }, /* MASARAM GONDI VOWEL SIGN AA - MASARAM GONDI VOWEL SIGN VOCALIC R */
{ 0x11D3A, 0x11D3A }, /* MASARAM GONDI VOWEL SIGN E */
{ 0x11D3C, 0x11D3D }, /* MASARAM GONDI VOWEL SIGN AI - MASARAM GONDI VOWEL SIGN O */
{ 0x11D3F, 0x11D45 }, /* MASARAM GONDI VOWEL SIGN AU - MASARAM GONDI VIRAMA */
{ 0x11D47, 0x11D47 }, /* MASARAM GONDI RA-KARA */
{ 0x11D8A, 0x11D8E }, /* GUNJALA GONDI VOWEL SIGN AA - GUNJALA GONDI VOWEL SIGN UU */
{ 0x11D90, 0x11D91 }, /* GUNJALA GONDI VOWEL SIGN EE - GUNJALA GONDI VOWEL SIGN AI */
{ 0x11D93, 0x11D97 }, /* GUNJALA GONDI VOWEL SIGN OO - GUNJALA GONDI VIRAMA */
{ 0x11EF3, 0x11EF6 }, /* MAKASAR VOWEL SIGN I - MAKASAR VOWEL SIGN O */
{ 0x11F00, 0x11F01 }, /* KAWI SIGN CANDRABINDU - KAWI SIGN ANUSVARA */
{ 0x11F03, 0x11F03 }, /* KAWI SIGN VISARGA */
{ 0x11F34, 0x11F3A }, /* KAWI VOWEL SIGN AA - KAWI VOWEL SIGN VOCALIC R */
{ 0x11F3E, 0x11F42 }, /* KAWI VOWEL SIGN E - KAWI CONJOINER */
{ 0x11F5A, 0x11F5A }, /* KAWI SIGN NUKTA */
{ 0x13430, 0x13440 }, /* EGYPTIAN HIEROGLYPH VERTICAL JOINER - EGYPTIAN HIEROGLYPH MIRROR HORIZONTALLY */
{ 0x13447, 0x13455 }, /* EGYPTIAN HIEROGLYPH MODIFIER DAMAGED AT TOP START - EGYPTIAN HIEROGLYPH MODIFIER DAMAGED */
{ 0x1611E, 0x1612F }, /* GURUNG KHEMA VOWEL SIGN AA - GURUNG KHEMA SIGN THOLHOMA */
{ 0x16AF0, 0x16AF4 }, /* BASSA VAH COMBINING HIGH TONE - BASSA VAH COMBINING HIGH-LOW TONE */
{ 0x16B30, 0x16B36 }, /* PAHAWH HMONG MARK CIM TUB - PAHAWH HMONG MARK CIM TAUM */
{ 0x16F4F, 0x16F4F }, /* MIAO SIGN CONSONANT MODIFIER BAR */
{ 0x16F51, 0x16F87 }, /* MIAO SIGN ASPIRATION - MIAO VOWEL SIGN UI */
{ 0x16F8F, 0x16F92 }, /* MIAO TONE RIGHT - MIAO TONE BELOW */
{ 0x16FE4, 0x16FE4 }, /* KHITAN SMALL SCRIPT FILLER */
{ 0x16FF0, 0x16FF1 }, /* VIETNAMESE ALTERNATE READING MARK CA - VIETNAMESE ALTERNATE READING MARK NHAY */
{ 0x1BC9D, 0x1BC9E }, /* DUPLOYAN THICK LETTER SELECTOR - DUPLOYAN DOUBLE MARK */
{ 0x1BCA0, 0x1BCA3 }, /* SHORTHAND FORMAT LETTER OVERLAP - SHORTHAND FORMAT UP STEP */
{ 0x1CF00, 0x1CF2D }, /* ZNAMENNY COMBINING MARK GORAZDO NIZKO S KRYZHEM ON LEFT - ZNAMENNY COMBINING MARK KRYZH ON LEFT */
{ 0x1CF30, 0x1CF46 }, /* ZNAMENNY COMBINING TONAL RANGE MARK MRACHNO - ZNAMENNY PRIZNAK MODIFIER ROG */
{ 0x1D165, 0x1D169 }, /* MUSICAL SYMBOL COMBINING STEM - MUSICAL SYMBOL COMBINING TREMOLO-3 */
{ 0x1D16D, 0x1D182 }, /* MUSICAL SYMBOL COMBINING AUGMENTATION DOT - MUSICAL SYMBOL COMBINING LOURE */
{ 0x1D185, 0x1D18B }, /* MUSICAL SYMBOL COMBINING DOIT - MUSICAL SYMBOL COMBINING TRIPLE TONGUE */
{ 0x1D1AA, 0x1D1AD }, /* MUSICAL SYMBOL COMBINING DOWN BOW - MUSICAL SYMBOL COMBINING SNAP PIZZICATO */
{ 0x1D242, 0x1D244 }, /* COMBINING GREEK MUSICAL TRISEME - COMBINING GREEK MUSICAL PENTASEME */
{ 0x1DA00, 0x1DA36 }, /* SIGNWRITING HEAD RIM - SIGNWRITING AIR SUCKING IN */
{ 0x1DA3B, 0x1DA6C }, /* SIGNWRITING MOUTH CLOSED NEUTRAL - SIGNWRITING EXCITEMENT */
{ 0x1DA75, 0x1DA75 }, /* SIGNWRITING UPPER BODY TILTING FROM HIP JOINTS */
{ 0x1DA84, 0x1DA84 }, /* SIGNWRITING LOCATION HEAD NECK */
{ 0x1DA9B, 0x1DA9F }, /* SIGNWRITING FILL MODIFIER-2 - SIGNWRITING FILL MODIFIER-6 */
{ 0x1DAA1, 0x1DAAF }, /* SIGNWRITING ROTATION MODIFIER-2 - SIGNWRITING ROTATION MODIFIER-16 */
{ 0x1E000, 0x1E006 }, /* COMBINING GLAGOLITIC LETTER AZU - COMBINING GLAGOLITIC LETTER ZHIVETE */
{ 0x1E008, 0x1E018 }, /* COMBINING GLAGOLITIC LETTER ZEMLJA - COMBINING GLAGOLITIC LETTER HERU */
{ 0x1E01B, 0x1E021 }, /* COMBINING GLAGOLITIC LETTER SHTA - COMBINING GLAGOLITIC LETTER YATI */
{ 0x1E023, 0x1E024 }, /* COMBINING GLAGOLITIC LETTER YU - COMBINING GLAGOLITIC LETTER SMALL YUS */
{ 0x1E026, 0x1E02A }, /* COMBINING GLAGOLITIC LETTER YO - COMBINING GLAGOLITIC LETTER FITA */
{ 0x1E08F, 0x1E08F }, /* COMBINING CYRILLIC SMALL LETTER BYELORUSSIAN-UKRAINIAN I */
{ 0x1E130, 0x1E136 }, /* NYIAKENG PUACHUE HMONG TONE-B - NYIAKENG PUACHUE HMONG TONE-D */
{ 0x1E2AE, 0x1E2AE }, /* TOTO SIGN RISING TONE */
{ 0x1E2EC, 0x1E2EF }, /* WANCHO TONE TUP - WANCHO TONE KOINI */
{ 0x1E4EC, 0x1E4EF }, /* NAG MUNDARI SIGN MUHOR - NAG MUNDARI SIGN SUTUH */
{ 0x1E5EE, 0x1E5EF }, /* OL ONAL SIGN MU - OL ONAL SIGN IKIR */
{ 0x1E8D0, 0x1E8D6 }, /* MENDE KIKAKUI COMBINING NUMBER TEENS - MENDE KIKAKUI COMBINING NUMBER MILLIONS */
{ 0x1E944, 0x1E94A }, /* ADLAM ALIF LENGTHENER - ADLAM NUKTA */
{ 0x1F3FB, 0x1F3FF }, /* EMOJI MODIFIER FITZPATRICK TYPE-1-2 - EMOJI MODIFIER FITZPATRICK TYPE-6 */
{ 0x1F9B0, 0x1F9B3 }, /* EMOJI COMPONENT RED HAIR - EMOJI COMPONENT WHITE HAIR */
{ 0xE0001, 0xE0001 }, /* LANGUAGE TAG */
{ 0xE0020, 0xE007F }, /* TAG SPACE - CANCEL TAG */
{ 0xE0100, 0xE01EF }, /* VARIATION SELECTOR-17 - VARIATION SELECTOR-256 */
};
/* Double-width character ranges (BMP - Basic Multilingual Plane, U+0000 to U+FFFF) */
static const struct ucs_interval16 ucs_double_width_bmp_ranges[] = {
{ 0x1100, 0x115F }, /* HANGUL CHOSEONG KIYEOK - HANGUL CHOSEONG FILLER */
{ 0x231A, 0x231B }, /* WATCH - HOURGLASS */
{ 0x2329, 0x232A }, /* LEFT-POINTING ANGLE BRACKET - RIGHT-POINTING ANGLE BRACKET */
{ 0x23E9, 0x23EC }, /* BLACK RIGHT-POINTING DOUBLE TRIANGLE - BLACK DOWN-POINTING DOUBLE TRIANGLE */
{ 0x23F0, 0x23F0 }, /* ALARM CLOCK */
{ 0x23F3, 0x23F3 }, /* HOURGLASS WITH FLOWING SAND */
{ 0x25FD, 0x25FE }, /* WHITE MEDIUM SMALL SQUARE - BLACK MEDIUM SMALL SQUARE */
{ 0x2614, 0x2615 }, /* UMBRELLA WITH RAIN DROPS - HOT BEVERAGE */
{ 0x2630, 0x2637 }, /* TRIGRAM FOR HEAVEN - TRIGRAM FOR EARTH */
{ 0x2648, 0x2653 }, /* ARIES - PISCES */
{ 0x267F, 0x267F }, /* WHEELCHAIR SYMBOL */
{ 0x268A, 0x268F }, /* MONOGRAM FOR YANG - DIGRAM FOR GREATER YIN */
{ 0x2693, 0x2693 }, /* ANCHOR */
{ 0x26A1, 0x26A1 }, /* HIGH VOLTAGE SIGN */
{ 0x26AA, 0x26AB }, /* MEDIUM WHITE CIRCLE - MEDIUM BLACK CIRCLE */
{ 0x26BD, 0x26BE }, /* SOCCER BALL - BASEBALL */
{ 0x26C4, 0x26C5 }, /* SNOWMAN WITHOUT SNOW - SUN BEHIND CLOUD */
{ 0x26CE, 0x26CE }, /* OPHIUCHUS */
{ 0x26D4, 0x26D4 }, /* NO ENTRY */
{ 0x26EA, 0x26EA }, /* CHURCH */
{ 0x26F2, 0x26F3 }, /* FOUNTAIN - FLAG IN HOLE */
{ 0x26F5, 0x26F5 }, /* SAILBOAT */
{ 0x26FA, 0x26FA }, /* TENT */
{ 0x26FD, 0x26FD }, /* FUEL PUMP */
{ 0x2705, 0x2705 }, /* WHITE HEAVY CHECK MARK */
{ 0x270A, 0x270B }, /* RAISED FIST - RAISED HAND */
{ 0x2728, 0x2728 }, /* SPARKLES */
{ 0x274C, 0x274C }, /* CROSS MARK */
{ 0x274E, 0x274E }, /* NEGATIVE SQUARED CROSS MARK */
{ 0x2753, 0x2755 }, /* BLACK QUESTION MARK ORNAMENT - WHITE EXCLAMATION MARK ORNAMENT */
{ 0x2757, 0x2757 }, /* HEAVY EXCLAMATION MARK SYMBOL */
{ 0x2795, 0x2797 }, /* HEAVY PLUS SIGN - HEAVY DIVISION SIGN */
{ 0x27B0, 0x27B0 }, /* CURLY LOOP */
{ 0x27BF, 0x27BF }, /* DOUBLE CURLY LOOP */
{ 0x2B1B, 0x2B1C }, /* BLACK LARGE SQUARE - WHITE LARGE SQUARE */
{ 0x2B50, 0x2B50 }, /* WHITE MEDIUM STAR */
{ 0x2B55, 0x2B55 }, /* HEAVY LARGE CIRCLE */
{ 0x2E80, 0x2E99 }, /* CJK RADICAL REPEAT - CJK RADICAL RAP */
{ 0x2E9B, 0x2EF3 }, /* CJK RADICAL CHOKE - CJK RADICAL C-SIMPLIFIED TURTLE */
{ 0x2F00, 0x2FD5 }, /* KANGXI RADICAL ONE - KANGXI RADICAL FLUTE */
{ 0x2FF0, 0x3029 }, /* IDEOGRAPHIC DESCRIPTION CHARACTER LEFT TO RIGHT - HANGZHOU NUMERAL NINE */
{ 0x3030, 0x303E }, /* WAVY DASH - IDEOGRAPHIC VARIATION INDICATOR */
{ 0x3041, 0x3096 }, /* HIRAGANA LETTER SMALL A - HIRAGANA LETTER SMALL KE */
{ 0x309B, 0x30FF }, /* KATAKANA-HIRAGANA VOICED SOUND MARK - KATAKANA DIGRAPH KOTO */
{ 0x3105, 0x312F }, /* BOPOMOFO LETTER B - BOPOMOFO LETTER NN */
{ 0x3131, 0x318E }, /* HANGUL LETTER KIYEOK - HANGUL LETTER ARAEAE */
{ 0x3190, 0x31E5 }, /* IDEOGRAPHIC ANNOTATION LINKING MARK - CJK STROKE SZP */
{ 0x31EF, 0x321E }, /* IDEOGRAPHIC DESCRIPTION CHARACTER SUBTRACTION - PARENTHESIZED KOREAN CHARACTER O HU */
{ 0x3220, 0x3247 }, /* PARENTHESIZED IDEOGRAPH ONE - CIRCLED IDEOGRAPH KOTO */
{ 0x3250, 0xA48C }, /* PARTNERSHIP SIGN - YI SYLLABLE YYR */
{ 0xA490, 0xA4C6 }, /* YI RADICAL QOT - YI RADICAL KE */
{ 0xA960, 0xA97C }, /* HANGUL CHOSEONG TIKEUT-MIEUM - HANGUL CHOSEONG SSANGYEORINHIEUH */
{ 0xAC00, 0xD7A3 }, /* HANGUL SYLLABLE GA - HANGUL SYLLABLE HIH */
{ 0xF900, 0xFAFF }, /* U+F900 - U+FAFF */
{ 0xFE10, 0xFE19 }, /* PRESENTATION FORM FOR VERTICAL COMMA - PRESENTATION FORM FOR VERTICAL HORIZONTAL ELLIPSIS */
{ 0xFE30, 0xFE52 }, /* PRESENTATION FORM FOR VERTICAL TWO DOT LEADER - SMALL FULL STOP */
{ 0xFE54, 0xFE66 }, /* SMALL SEMICOLON - SMALL EQUALS SIGN */
{ 0xFE68, 0xFE6B }, /* SMALL REVERSE SOLIDUS - SMALL COMMERCIAL AT */
{ 0xFF01, 0xFF60 }, /* FULLWIDTH EXCLAMATION MARK - FULLWIDTH RIGHT WHITE PARENTHESIS */
{ 0xFFE0, 0xFFE6 }, /* FULLWIDTH CENT SIGN - FULLWIDTH WON SIGN */
};
/* Double-width character ranges (non-BMP, U+10000 and above) */
static const struct ucs_interval32 ucs_double_width_non_bmp_ranges[] = {
{ 0x16FE0, 0x16FE3 }, /* TANGUT ITERATION MARK - OLD CHINESE ITERATION MARK */
{ 0x17000, 0x187F7 }, /* U+17000 - U+187F7 */
{ 0x18800, 0x18CD5 }, /* TANGUT COMPONENT-001 - KHITAN SMALL SCRIPT CHARACTER-18CD5 */
{ 0x18CFF, 0x18D08 }, /* U+18CFF - U+18D08 */
{ 0x1AFF0, 0x1AFF3 }, /* KATAKANA LETTER MINNAN TONE-2 - KATAKANA LETTER MINNAN TONE-5 */
{ 0x1AFF5, 0x1AFFB }, /* KATAKANA LETTER MINNAN TONE-7 - KATAKANA LETTER MINNAN NASALIZED TONE-5 */
{ 0x1AFFD, 0x1AFFE }, /* KATAKANA LETTER MINNAN NASALIZED TONE-7 - KATAKANA LETTER MINNAN NASALIZED TONE-8 */
{ 0x1B000, 0x1B122 }, /* KATAKANA LETTER ARCHAIC E - KATAKANA LETTER ARCHAIC WU */
{ 0x1B132, 0x1B132 }, /* HIRAGANA LETTER SMALL KO */
{ 0x1B150, 0x1B152 }, /* HIRAGANA LETTER SMALL WI - HIRAGANA LETTER SMALL WO */
{ 0x1B155, 0x1B155 }, /* KATAKANA LETTER SMALL KO */
{ 0x1B164, 0x1B167 }, /* KATAKANA LETTER SMALL WI - KATAKANA LETTER SMALL N */
{ 0x1B170, 0x1B2FB }, /* NUSHU CHARACTER-1B170 - NUSHU CHARACTER-1B2FB */
{ 0x1D300, 0x1D356 }, /* MONOGRAM FOR EARTH - TETRAGRAM FOR FOSTERING */
{ 0x1D360, 0x1D376 }, /* COUNTING ROD UNIT DIGIT ONE - IDEOGRAPHIC TALLY MARK FIVE */
{ 0x1F000, 0x1F02F }, /* U+1F000 - U+1F02F */
{ 0x1F0A0, 0x1F0FF }, /* U+1F0A0 - U+1F0FF */
{ 0x1F18E, 0x1F18E }, /* NEGATIVE SQUARED AB */
{ 0x1F191, 0x1F19A }, /* SQUARED CL - SQUARED VS */
{ 0x1F200, 0x1F202 }, /* SQUARE HIRAGANA HOKA - SQUARED KATAKANA SA */
{ 0x1F210, 0x1F23B }, /* SQUARED CJK UNIFIED IDEOGRAPH-624B - SQUARED CJK UNIFIED IDEOGRAPH-914D */
{ 0x1F240, 0x1F248 }, /* TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-672C - TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-6557 */
{ 0x1F250, 0x1F251 }, /* CIRCLED IDEOGRAPH ADVANTAGE - CIRCLED IDEOGRAPH ACCEPT */
{ 0x1F260, 0x1F265 }, /* ROUNDED SYMBOL FOR FU - ROUNDED SYMBOL FOR CAI */
{ 0x1F300, 0x1F3FA }, /* CYCLONE - AMPHORA */
{ 0x1F400, 0x1F64F }, /* RAT - PERSON WITH FOLDED HANDS */
{ 0x1F680, 0x1F9AF }, /* ROCKET - PROBING CANE */
{ 0x1F9B4, 0x1FAFF }, /* U+1F9B4 - U+1FAFF */
{ 0x20000, 0x2FFFD }, /* U+20000 - U+2FFFD */
{ 0x30000, 0x3FFFD }, /* U+30000 - U+3FFFD */
/* Combined zero- and double-width ranges (non-BMP, U+10000 and above).
* The first 33 entries host the BMP double-width bitmap in the low
* 8 bits of `last`. */
static const struct ucs_width32 ucs_nonbmp_ranges[] = {
{ RANGE_0WIDTH(0x101FD, 0x101FD) /* PHAISTOS DISC SIGN COMBINING OBLIQUE STROKE */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 0.. 7] */
{ RANGE_0WIDTH(0x102E0, 0x102E0) /* COPTIC EPACT THOUSANDS MARK */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 8.. 15] */
{ RANGE_0WIDTH(0x10376, 0x1037A) /* COMBINING OLD PERMIC LETTER AN - COMBINING OLD PERMIC LETTER SII */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 16.. 23] */
{ RANGE_0WIDTH(0x10A01, 0x10A03) /* KHAROSHTHI VOWEL SIGN I - KHAROSHTHI VOWEL SIGN VOCALIC R */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 24.. 31] */
{ RANGE_0WIDTH(0x10A05, 0x10A06) /* KHAROSHTHI VOWEL SIGN E - KHAROSHTHI VOWEL SIGN O */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 32.. 39] */
{ RANGE_0WIDTH(0x10A0C, 0x10A0F) /* KHAROSHTHI VOWEL LENGTH MARK - KHAROSHTHI SIGN VISARGA */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 40.. 47] */
{ RANGE_0WIDTH(0x10A38, 0x10A3A) /* KHAROSHTHI SIGN BAR ABOVE - KHAROSHTHI SIGN DOT BELOW */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 48.. 55] */
{ RANGE_0WIDTH(0x10A3F, 0x10A3F) /* KHAROSHTHI VIRAMA */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 56.. 63] */
{ RANGE_0WIDTH(0x10AE5, 0x10AE6) /* MANICHAEAN ABBREVIATION MARK ABOVE - MANICHAEAN ABBREVIATION MARK BELOW */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 64.. 71] */
{ RANGE_0WIDTH(0x10D24, 0x10D27) /* HANIFI ROHINGYA SIGN HARBAHAY - HANIFI ROHINGYA SIGN TASSI */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 72.. 79] */
{ RANGE_0WIDTH(0x10D69, 0x10D6D) /* GARAY VOWEL SIGN E - GARAY CONSONANT NASALIZATION MARK */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 80.. 87] */
{ RANGE_0WIDTH(0x10EAB, 0x10EAC) /* YEZIDI COMBINING HAMZA MARK - YEZIDI COMBINING MADDA MARK */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 88.. 95] */
{ RANGE_0WIDTH(0x10EFC, 0x10EFF) /* ARABIC COMBINING ALEF OVERLAY - ARABIC SMALL LOW WORD MADDA */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [ 96..103] */
{ RANGE_0WIDTH(0x10F46, 0x10F50) /* SOGDIAN COMBINING DOT BELOW - SOGDIAN COMBINING STROKE BELOW */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [104..111] */
{ RANGE_0WIDTH(0x10F82, 0x10F85) /* OLD UYGHUR COMBINING DOT ABOVE - OLD UYGHUR COMBINING TWO DOTS BELOW */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [112..119] */
{ RANGE_0WIDTH(0x11000, 0x11002) /* BRAHMI SIGN CANDRABINDU - BRAHMI SIGN VISARGA */
| BMP_2W_BITS(0b00001000) }, /* BMP entries [120..127] */
{ RANGE_0WIDTH(0x11038, 0x11046) /* BRAHMI VOWEL SIGN AA - BRAHMI VIRAMA */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [128..135] */
{ RANGE_0WIDTH(0x11070, 0x11070) /* BRAHMI SIGN OLD TAMIL VIRAMA */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [136..143] */
{ RANGE_0WIDTH(0x11073, 0x11074) /* BRAHMI VOWEL SIGN OLD TAMIL SHORT E - BRAHMI VOWEL SIGN OLD TAMIL SHORT O */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [144..151] */
{ RANGE_0WIDTH(0x1107F, 0x11082) /* BRAHMI NUMBER JOINER - KAITHI SIGN VISARGA */
| BMP_2W_BITS(0b10000000) }, /* BMP entries [152..159] */
{ RANGE_0WIDTH(0x110B0, 0x110BA) /* KAITHI VOWEL SIGN AA - KAITHI SIGN NUKTA */
| BMP_2W_BITS(0b01111111) }, /* BMP entries [160..167] */
{ RANGE_0WIDTH(0x110BD, 0x110BD) /* KAITHI NUMBER SIGN */
| BMP_2W_BITS(0b10111110) }, /* BMP entries [168..175] */
{ RANGE_0WIDTH(0x110C2, 0x110C2) /* KAITHI VOWEL SIGN VOCALIC R */
| BMP_2W_BITS(0b11111111) }, /* BMP entries [176..183] */
{ RANGE_0WIDTH(0x110CD, 0x110CD) /* KAITHI NUMBER SIGN ABOVE */
| BMP_2W_BITS(0b11111111) }, /* BMP entries [184..191] */
{ RANGE_0WIDTH(0x11100, 0x11102) /* CHAKMA SIGN CANDRABINDU - CHAKMA SIGN VISARGA */
| BMP_2W_BITS(0b00111111) }, /* BMP entries [192..199] */
{ RANGE_0WIDTH(0x11127, 0x11134) /* CHAKMA VOWEL SIGN A - CHAKMA MAAYYAA */
| BMP_2W_BITS(0b11011110) }, /* BMP entries [200..207] */
{ RANGE_0WIDTH(0x11145, 0x11146) /* CHAKMA VOWEL SIGN AA - CHAKMA VOWEL SIGN EI */
| BMP_2W_BITS(0b11111110) }, /* BMP entries [208..215] */
{ RANGE_0WIDTH(0x11173, 0x11173) /* MAHAJANI SIGN NUKTA */
| BMP_2W_BITS(0b00000001) }, /* BMP entries [216..223] */
{ RANGE_0WIDTH(0x11180, 0x11182) /* SHARADA SIGN CANDRABINDU - SHARADA SIGN VISARGA */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [224..231] */
{ RANGE_0WIDTH(0x111B3, 0x111C0) /* SHARADA VOWEL SIGN AA - SHARADA SIGN VIRAMA */
| BMP_2W_BITS(0b00000001) }, /* BMP entries [232..239] */
{ RANGE_0WIDTH(0x111C9, 0x111CC) /* SHARADA SANDHI MARK - SHARADA EXTRA SHORT VOWEL MARK */
| BMP_2W_BITS(0b00000000) }, /* BMP entries [240..247] */
{ RANGE_0WIDTH(0x111CE, 0x111CF) /* SHARADA VOWEL SIGN PRISHTHAMATRA E - SHARADA SIGN INVERTED CANDRABINDU */
| BMP_2W_BITS(0b10100110) }, /* BMP entries [248..255] */
{ RANGE_0WIDTH(0x1122C, 0x11237) /* KHOJKI VOWEL SIGN AA - KHOJKI SIGN SHADDA */
| BMP_2W_BITS(0b00011011) }, /* BMP entries [256..261] */
{ RANGE_0WIDTH(0x1123E, 0x1123E) }, /* KHOJKI SIGN SUKUN */
{ RANGE_0WIDTH(0x11241, 0x11241) }, /* KHOJKI VOWEL SIGN VOCALIC R */
{ RANGE_0WIDTH(0x112DF, 0x112EA) }, /* KHUDAWADI SIGN ANUSVARA - KHUDAWADI SIGN VIRAMA */
{ RANGE_0WIDTH(0x11300, 0x11303) }, /* GRANTHA SIGN COMBINING ANUSVARA ABOVE - GRANTHA SIGN VISARGA */
{ RANGE_0WIDTH(0x1133B, 0x1133C) }, /* COMBINING BINDU BELOW - GRANTHA SIGN NUKTA */
{ RANGE_0WIDTH(0x1133E, 0x11344) }, /* GRANTHA VOWEL SIGN AA - GRANTHA VOWEL SIGN VOCALIC RR */
{ RANGE_0WIDTH(0x11347, 0x11348) }, /* GRANTHA VOWEL SIGN EE - GRANTHA VOWEL SIGN AI */
{ RANGE_0WIDTH(0x1134B, 0x1134D) }, /* GRANTHA VOWEL SIGN OO - GRANTHA SIGN VIRAMA */
{ RANGE_0WIDTH(0x11357, 0x11357) }, /* GRANTHA AU LENGTH MARK */
{ RANGE_0WIDTH(0x11362, 0x11363) }, /* GRANTHA VOWEL SIGN VOCALIC L - GRANTHA VOWEL SIGN VOCALIC LL */
{ RANGE_0WIDTH(0x11366, 0x1136C) }, /* COMBINING GRANTHA DIGIT ZERO - COMBINING GRANTHA DIGIT SIX */
{ RANGE_0WIDTH(0x11370, 0x11374) }, /* COMBINING GRANTHA LETTER A - COMBINING GRANTHA LETTER PA */
{ RANGE_0WIDTH(0x113B8, 0x113C0) }, /* TULU-TIGALARI VOWEL SIGN AA - TULU-TIGALARI VOWEL SIGN VOCALIC LL */
{ RANGE_0WIDTH(0x113C2, 0x113C2) }, /* TULU-TIGALARI VOWEL SIGN EE */
{ RANGE_0WIDTH(0x113C5, 0x113C5) }, /* TULU-TIGALARI VOWEL SIGN AI */
{ RANGE_0WIDTH(0x113C7, 0x113CA) }, /* TULU-TIGALARI VOWEL SIGN OO - TULU-TIGALARI SIGN CANDRA ANUNASIKA */
{ RANGE_0WIDTH(0x113CC, 0x113D0) }, /* TULU-TIGALARI SIGN ANUSVARA - TULU-TIGALARI CONJOINER */
{ RANGE_0WIDTH(0x113D2, 0x113D2) }, /* TULU-TIGALARI GEMINATION MARK */
{ RANGE_0WIDTH(0x113E1, 0x113E2) }, /* TULU-TIGALARI VEDIC TONE SVARITA - TULU-TIGALARI VEDIC TONE ANUDATTA */
{ RANGE_0WIDTH(0x11435, 0x11446) }, /* NEWA VOWEL SIGN AA - NEWA SIGN NUKTA */
{ RANGE_0WIDTH(0x1145E, 0x1145E) }, /* NEWA SANDHI MARK */
{ RANGE_0WIDTH(0x114B0, 0x114C3) }, /* TIRHUTA VOWEL SIGN AA - TIRHUTA SIGN NUKTA */
{ RANGE_0WIDTH(0x115AF, 0x115B5) }, /* SIDDHAM VOWEL SIGN AA - SIDDHAM VOWEL SIGN VOCALIC RR */
{ RANGE_0WIDTH(0x115B8, 0x115C0) }, /* SIDDHAM VOWEL SIGN E - SIDDHAM SIGN NUKTA */
{ RANGE_0WIDTH(0x115DC, 0x115DD) }, /* SIDDHAM VOWEL SIGN ALTERNATE U - SIDDHAM VOWEL SIGN ALTERNATE UU */
{ RANGE_0WIDTH(0x11630, 0x11640) }, /* MODI VOWEL SIGN AA - MODI SIGN ARDHACANDRA */
{ RANGE_0WIDTH(0x116AB, 0x116B7) }, /* TAKRI SIGN ANUSVARA - TAKRI SIGN NUKTA */
{ RANGE_0WIDTH(0x1171D, 0x1172B) }, /* AHOM CONSONANT SIGN MEDIAL LA - AHOM SIGN KILLER */
{ RANGE_0WIDTH(0x1182C, 0x1183A) }, /* DOGRA VOWEL SIGN AA - DOGRA SIGN NUKTA */
{ RANGE_0WIDTH(0x11930, 0x11935) }, /* DIVES AKURU VOWEL SIGN AA - DIVES AKURU VOWEL SIGN E */
{ RANGE_0WIDTH(0x11937, 0x11938) }, /* DIVES AKURU VOWEL SIGN AI - DIVES AKURU VOWEL SIGN O */
{ RANGE_0WIDTH(0x1193B, 0x1193E) }, /* DIVES AKURU SIGN ANUSVARA - DIVES AKURU VIRAMA */
{ RANGE_0WIDTH(0x11940, 0x11940) }, /* DIVES AKURU MEDIAL YA */
{ RANGE_0WIDTH(0x11942, 0x11943) }, /* DIVES AKURU MEDIAL RA - DIVES AKURU SIGN NUKTA */
{ RANGE_0WIDTH(0x119D1, 0x119D7) }, /* NANDINAGARI VOWEL SIGN AA - NANDINAGARI VOWEL SIGN VOCALIC RR */
{ RANGE_0WIDTH(0x119DA, 0x119E0) }, /* NANDINAGARI VOWEL SIGN E - NANDINAGARI SIGN VIRAMA */
{ RANGE_0WIDTH(0x119E4, 0x119E4) }, /* NANDINAGARI VOWEL SIGN PRISHTHAMATRA E */
{ RANGE_0WIDTH(0x11A01, 0x11A0A) }, /* ZANABAZAR SQUARE VOWEL SIGN I - ZANABAZAR SQUARE VOWEL LENGTH MARK */
{ RANGE_0WIDTH(0x11A33, 0x11A39) }, /* ZANABAZAR SQUARE FINAL CONSONANT MARK - ZANABAZAR SQUARE SIGN VISARGA */
{ RANGE_0WIDTH(0x11A3B, 0x11A3E) }, /* ZANABAZAR SQUARE CLUSTER-FINAL LETTER YA - ZANABAZAR SQUARE CLUSTER-FINAL LETTER VA */
{ RANGE_0WIDTH(0x11A47, 0x11A47) }, /* ZANABAZAR SQUARE SUBJOINER */
{ RANGE_0WIDTH(0x11A51, 0x11A5B) }, /* SOYOMBO VOWEL SIGN I - SOYOMBO VOWEL LENGTH MARK */
{ RANGE_0WIDTH(0x11A8A, 0x11A99) }, /* SOYOMBO FINAL CONSONANT SIGN G - SOYOMBO SUBJOINER */
{ RANGE_0WIDTH(0x11C2F, 0x11C36) }, /* BHAIKSUKI VOWEL SIGN AA - BHAIKSUKI VOWEL SIGN VOCALIC L */
{ RANGE_0WIDTH(0x11C38, 0x11C3F) }, /* BHAIKSUKI VOWEL SIGN E - BHAIKSUKI SIGN VIRAMA */
{ RANGE_0WIDTH(0x11C92, 0x11CA7) }, /* MARCHEN SUBJOINED LETTER KA - MARCHEN SUBJOINED LETTER ZA */
{ RANGE_0WIDTH(0x11CA9, 0x11CB6) }, /* MARCHEN SUBJOINED LETTER YA - MARCHEN SIGN CANDRABINDU */
{ RANGE_0WIDTH(0x11D31, 0x11D36) }, /* MASARAM GONDI VOWEL SIGN AA - MASARAM GONDI VOWEL SIGN VOCALIC R */
{ RANGE_0WIDTH(0x11D3A, 0x11D3A) }, /* MASARAM GONDI VOWEL SIGN E */
{ RANGE_0WIDTH(0x11D3C, 0x11D3D) }, /* MASARAM GONDI VOWEL SIGN AI - MASARAM GONDI VOWEL SIGN O */
{ RANGE_0WIDTH(0x11D3F, 0x11D45) }, /* MASARAM GONDI VOWEL SIGN AU - MASARAM GONDI VIRAMA */
{ RANGE_0WIDTH(0x11D47, 0x11D47) }, /* MASARAM GONDI RA-KARA */
{ RANGE_0WIDTH(0x11D8A, 0x11D8E) }, /* GUNJALA GONDI VOWEL SIGN AA - GUNJALA GONDI VOWEL SIGN UU */
{ RANGE_0WIDTH(0x11D90, 0x11D91) }, /* GUNJALA GONDI VOWEL SIGN EE - GUNJALA GONDI VOWEL SIGN AI */
{ RANGE_0WIDTH(0x11D93, 0x11D97) }, /* GUNJALA GONDI VOWEL SIGN OO - GUNJALA GONDI VIRAMA */
{ RANGE_0WIDTH(0x11EF3, 0x11EF6) }, /* MAKASAR VOWEL SIGN I - MAKASAR VOWEL SIGN O */
{ RANGE_0WIDTH(0x11F00, 0x11F01) }, /* KAWI SIGN CANDRABINDU - KAWI SIGN ANUSVARA */
{ RANGE_0WIDTH(0x11F03, 0x11F03) }, /* KAWI SIGN VISARGA */
{ RANGE_0WIDTH(0x11F34, 0x11F3A) }, /* KAWI VOWEL SIGN AA - KAWI VOWEL SIGN VOCALIC R */
{ RANGE_0WIDTH(0x11F3E, 0x11F42) }, /* KAWI VOWEL SIGN E - KAWI CONJOINER */
{ RANGE_0WIDTH(0x11F5A, 0x11F5A) }, /* KAWI SIGN NUKTA */
{ RANGE_0WIDTH(0x13430, 0x13440) }, /* EGYPTIAN HIEROGLYPH VERTICAL JOINER - EGYPTIAN HIEROGLYPH MIRROR HORIZONTALLY */
{ RANGE_0WIDTH(0x13447, 0x13455) }, /* EGYPTIAN HIEROGLYPH MODIFIER DAMAGED AT TOP START - EGYPTIAN HIEROGLYPH MODIFIER DAMAGED */
{ RANGE_0WIDTH(0x1611E, 0x1612F) }, /* GURUNG KHEMA VOWEL SIGN AA - GURUNG KHEMA SIGN THOLHOMA */
{ RANGE_0WIDTH(0x16AF0, 0x16AF4) }, /* BASSA VAH COMBINING HIGH TONE - BASSA VAH COMBINING HIGH-LOW TONE */
{ RANGE_0WIDTH(0x16B30, 0x16B36) }, /* PAHAWH HMONG MARK CIM TUB - PAHAWH HMONG MARK CIM TAUM */
{ RANGE_0WIDTH(0x16F4F, 0x16F4F) }, /* MIAO SIGN CONSONANT MODIFIER BAR */
{ RANGE_0WIDTH(0x16F51, 0x16F87) }, /* MIAO SIGN ASPIRATION - MIAO VOWEL SIGN UI */
{ RANGE_0WIDTH(0x16F8F, 0x16F92) }, /* MIAO TONE RIGHT - MIAO TONE BELOW */
{ RANGE_2WIDTH(0x16FE0, 0x16FE3) }, /* TANGUT ITERATION MARK - OLD CHINESE ITERATION MARK */
{ RANGE_0WIDTH(0x16FE4, 0x16FE4) }, /* KHITAN SMALL SCRIPT FILLER */
{ RANGE_0WIDTH(0x16FF0, 0x16FF1) }, /* VIETNAMESE ALTERNATE READING MARK CA - VIETNAMESE ALTERNATE READING MARK NHAY */
{ RANGE_2WIDTH(0x17000, 0x187F7) }, /* U+17000 - U+187F7 */
{ RANGE_2WIDTH(0x18800, 0x18CD5) }, /* TANGUT COMPONENT-001 - KHITAN SMALL SCRIPT CHARACTER-18CD5 */
{ RANGE_2WIDTH(0x18CFF, 0x18D08) }, /* U+18CFF - U+18D08 */
{ RANGE_2WIDTH(0x1AFF0, 0x1AFF3) }, /* KATAKANA LETTER MINNAN TONE-2 - KATAKANA LETTER MINNAN TONE-5 */
{ RANGE_2WIDTH(0x1AFF5, 0x1AFFB) }, /* KATAKANA LETTER MINNAN TONE-7 - KATAKANA LETTER MINNAN NASALIZED TONE-5 */
{ RANGE_2WIDTH(0x1AFFD, 0x1AFFE) }, /* KATAKANA LETTER MINNAN NASALIZED TONE-7 - KATAKANA LETTER MINNAN NASALIZED TONE-8 */
{ RANGE_2WIDTH(0x1B000, 0x1B122) }, /* KATAKANA LETTER ARCHAIC E - KATAKANA LETTER ARCHAIC WU */
{ RANGE_2WIDTH(0x1B132, 0x1B132) }, /* HIRAGANA LETTER SMALL KO */
{ RANGE_2WIDTH(0x1B150, 0x1B152) }, /* HIRAGANA LETTER SMALL WI - HIRAGANA LETTER SMALL WO */
{ RANGE_2WIDTH(0x1B155, 0x1B155) }, /* KATAKANA LETTER SMALL KO */
{ RANGE_2WIDTH(0x1B164, 0x1B167) }, /* KATAKANA LETTER SMALL WI - KATAKANA LETTER SMALL N */
{ RANGE_2WIDTH(0x1B170, 0x1B2FB) }, /* NUSHU CHARACTER-1B170 - NUSHU CHARACTER-1B2FB */
{ RANGE_0WIDTH(0x1BC9D, 0x1BC9E) }, /* DUPLOYAN THICK LETTER SELECTOR - DUPLOYAN DOUBLE MARK */
{ RANGE_0WIDTH(0x1BCA0, 0x1BCA3) }, /* SHORTHAND FORMAT LETTER OVERLAP - SHORTHAND FORMAT UP STEP */
{ RANGE_0WIDTH(0x1CF00, 0x1CF2D) }, /* ZNAMENNY COMBINING MARK GORAZDO NIZKO S KRYZHEM ON LEFT - ZNAMENNY COMBINING MARK KRYZH ON LEFT */
{ RANGE_0WIDTH(0x1CF30, 0x1CF46) }, /* ZNAMENNY COMBINING TONAL RANGE MARK MRACHNO - ZNAMENNY PRIZNAK MODIFIER ROG */
{ RANGE_0WIDTH(0x1D165, 0x1D169) }, /* MUSICAL SYMBOL COMBINING STEM - MUSICAL SYMBOL COMBINING TREMOLO-3 */
{ RANGE_0WIDTH(0x1D16D, 0x1D182) }, /* MUSICAL SYMBOL COMBINING AUGMENTATION DOT - MUSICAL SYMBOL COMBINING LOURE */
{ RANGE_0WIDTH(0x1D185, 0x1D18B) }, /* MUSICAL SYMBOL COMBINING DOIT - MUSICAL SYMBOL COMBINING TRIPLE TONGUE */
{ RANGE_0WIDTH(0x1D1AA, 0x1D1AD) }, /* MUSICAL SYMBOL COMBINING DOWN BOW - MUSICAL SYMBOL COMBINING SNAP PIZZICATO */
{ RANGE_0WIDTH(0x1D242, 0x1D244) }, /* COMBINING GREEK MUSICAL TRISEME - COMBINING GREEK MUSICAL PENTASEME */
{ RANGE_2WIDTH(0x1D300, 0x1D356) }, /* MONOGRAM FOR EARTH - TETRAGRAM FOR FOSTERING */
{ RANGE_2WIDTH(0x1D360, 0x1D376) }, /* COUNTING ROD UNIT DIGIT ONE - IDEOGRAPHIC TALLY MARK FIVE */
{ RANGE_0WIDTH(0x1DA00, 0x1DA36) }, /* SIGNWRITING HEAD RIM - SIGNWRITING AIR SUCKING IN */
{ RANGE_0WIDTH(0x1DA3B, 0x1DA6C) }, /* SIGNWRITING MOUTH CLOSED NEUTRAL - SIGNWRITING EXCITEMENT */
{ RANGE_0WIDTH(0x1DA75, 0x1DA75) }, /* SIGNWRITING UPPER BODY TILTING FROM HIP JOINTS */
{ RANGE_0WIDTH(0x1DA84, 0x1DA84) }, /* SIGNWRITING LOCATION HEAD NECK */
{ RANGE_0WIDTH(0x1DA9B, 0x1DA9F) }, /* SIGNWRITING FILL MODIFIER-2 - SIGNWRITING FILL MODIFIER-6 */
{ RANGE_0WIDTH(0x1DAA1, 0x1DAAF) }, /* SIGNWRITING ROTATION MODIFIER-2 - SIGNWRITING ROTATION MODIFIER-16 */
{ RANGE_0WIDTH(0x1E000, 0x1E006) }, /* COMBINING GLAGOLITIC LETTER AZU - COMBINING GLAGOLITIC LETTER ZHIVETE */
{ RANGE_0WIDTH(0x1E008, 0x1E018) }, /* COMBINING GLAGOLITIC LETTER ZEMLJA - COMBINING GLAGOLITIC LETTER HERU */
{ RANGE_0WIDTH(0x1E01B, 0x1E021) }, /* COMBINING GLAGOLITIC LETTER SHTA - COMBINING GLAGOLITIC LETTER YATI */
{ RANGE_0WIDTH(0x1E023, 0x1E024) }, /* COMBINING GLAGOLITIC LETTER YU - COMBINING GLAGOLITIC LETTER SMALL YUS */
{ RANGE_0WIDTH(0x1E026, 0x1E02A) }, /* COMBINING GLAGOLITIC LETTER YO - COMBINING GLAGOLITIC LETTER FITA */
{ RANGE_0WIDTH(0x1E08F, 0x1E08F) }, /* COMBINING CYRILLIC SMALL LETTER BYELORUSSIAN-UKRAINIAN I */
{ RANGE_0WIDTH(0x1E130, 0x1E136) }, /* NYIAKENG PUACHUE HMONG TONE-B - NYIAKENG PUACHUE HMONG TONE-D */
{ RANGE_0WIDTH(0x1E2AE, 0x1E2AE) }, /* TOTO SIGN RISING TONE */
{ RANGE_0WIDTH(0x1E2EC, 0x1E2EF) }, /* WANCHO TONE TUP - WANCHO TONE KOINI */
{ RANGE_0WIDTH(0x1E4EC, 0x1E4EF) }, /* NAG MUNDARI SIGN MUHOR - NAG MUNDARI SIGN SUTUH */
{ RANGE_0WIDTH(0x1E5EE, 0x1E5EF) }, /* OL ONAL SIGN MU - OL ONAL SIGN IKIR */
{ RANGE_0WIDTH(0x1E8D0, 0x1E8D6) }, /* MENDE KIKAKUI COMBINING NUMBER TEENS - MENDE KIKAKUI COMBINING NUMBER MILLIONS */
{ RANGE_0WIDTH(0x1E944, 0x1E94A) }, /* ADLAM ALIF LENGTHENER - ADLAM NUKTA */
{ RANGE_2WIDTH(0x1F000, 0x1F02F) }, /* U+1F000 - U+1F02F */
{ RANGE_2WIDTH(0x1F0A0, 0x1F0FF) }, /* U+1F0A0 - U+1F0FF */
{ RANGE_2WIDTH(0x1F18E, 0x1F18E) }, /* NEGATIVE SQUARED AB */
{ RANGE_2WIDTH(0x1F191, 0x1F19A) }, /* SQUARED CL - SQUARED VS */
{ RANGE_2WIDTH(0x1F200, 0x1F202) }, /* SQUARE HIRAGANA HOKA - SQUARED KATAKANA SA */
{ RANGE_2WIDTH(0x1F210, 0x1F23B) }, /* SQUARED CJK UNIFIED IDEOGRAPH-624B - SQUARED CJK UNIFIED IDEOGRAPH-914D */
{ RANGE_2WIDTH(0x1F240, 0x1F248) }, /* TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-672C - TORTOISE SHELL BRACKETED CJK UNIFIED IDEOGRAPH-6557 */
{ RANGE_2WIDTH(0x1F250, 0x1F251) }, /* CIRCLED IDEOGRAPH ADVANTAGE - CIRCLED IDEOGRAPH ACCEPT */
{ RANGE_2WIDTH(0x1F260, 0x1F265) }, /* ROUNDED SYMBOL FOR FU - ROUNDED SYMBOL FOR CAI */
{ RANGE_2WIDTH(0x1F300, 0x1F3FA) }, /* CYCLONE - AMPHORA */
{ RANGE_0WIDTH(0x1F3FB, 0x1F3FF) }, /* EMOJI MODIFIER FITZPATRICK TYPE-1-2 - EMOJI MODIFIER FITZPATRICK TYPE-6 */
{ RANGE_2WIDTH(0x1F400, 0x1F64F) }, /* RAT - PERSON WITH FOLDED HANDS */
{ RANGE_2WIDTH(0x1F680, 0x1F9AF) }, /* ROCKET - PROBING CANE */
{ RANGE_0WIDTH(0x1F9B0, 0x1F9B3) }, /* EMOJI COMPONENT RED HAIR - EMOJI COMPONENT WHITE HAIR */
{ RANGE_2WIDTH(0x1F9B4, 0x1FAFF) }, /* U+1F9B4 - U+1FAFF */
{ RANGE_2WIDTH(0x20000, 0x2FFFD) }, /* U+20000 - U+2FFFD */
{ RANGE_2WIDTH(0x30000, 0x3FFFD) }, /* U+30000 - U+3FFFD */
{ RANGE_0WIDTH(0xE0001, 0xE0001) }, /* LANGUAGE TAG */
{ RANGE_0WIDTH(0xE0020, 0xE007F) }, /* TAG SPACE - CANCEL TAG */
{ RANGE_0WIDTH(0xE0100, 0xE01EF) }, /* VARIATION SELECTOR-17 - VARIATION SELECTOR-256 */
};

2
drivers/tty/vt/vc_screen.c
View File

@@ -686,7 +686,7 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
}
*ppos += written;
ret = written;
if (written)
if (written && vc)
vcs_scr_updated(vc);
return ret;

11
drivers/tty/vt/vt.c
View File

@@ -3094,8 +3094,12 @@ static void vc_con_rewind(struct vc_data *vc)
static int vc_process_ucs(struct vc_data *vc, int *c, int *tc)
{
u32 prev_c, curr_c = *c;
unsigned int w = ucs_get_width(curr_c);
if (ucs_is_double_width(curr_c)) {
if (likely(w == 1))
return 1;
if (w == 2) {
/*
* The Unicode screen memory is allocated only when
* required. This is one such case as we need to remember
@@ -3105,12 +3109,9 @@ static int vc_process_ucs(struct vc_data *vc, int *c, int *tc)
return 2;
}
if (!ucs_is_zero_width(curr_c))
return 1;
/* From here curr_c is known to be zero-width. */
if (ucs_is_double_width(vc_uniscr_getc(vc, -2))) {
if (ucs_get_width(vc_uniscr_getc(vc, -2)) == 2) {
/*
* Let's merge this zero-width code point with the preceding
* double-width code point by replacing the existing

12
include/linux/consolemap.h
View File

@@ -28,8 +28,7 @@ int conv_uni_to_pc(struct vc_data *conp, long ucs);
u32 conv_8bit_to_uni(unsigned char c);
int conv_uni_to_8bit(u32 uni);
void console_map_init(void);
bool ucs_is_double_width(uint32_t cp);
bool ucs_is_zero_width(uint32_t cp);
unsigned int ucs_get_width(uint32_t cp);
u32 ucs_recompose(u32 base, u32 mark);
u32 ucs_get_fallback(u32 cp);
#else
@@ -62,14 +61,9 @@ static inline int conv_uni_to_8bit(u32 uni)
static inline void console_map_init(void) { }
static inline bool ucs_is_double_width(uint32_t cp)
static inline unsigned int ucs_get_width(uint32_t cp)
{
return false;
}
static inline bool ucs_is_zero_width(uint32_t cp)
{
return false;
return 1;
}
static inline u32 ucs_recompose(u32 base, u32 mark)

20
include/linux/serial_core.h
View File

@@ -533,6 +533,7 @@ struct uart_port {
#define UPF_HARD_FLOW ((__force upf_t) (UPF_AUTO_CTS | UPF_AUTO_RTS))
/* Port has hardware-assisted s/w flow control */
#define UPF_SOFT_FLOW ((__force upf_t) BIT_ULL(22))
/* Deprecated: use uart_set_cons_flow_enabled()/uart_cons_flow_enabled() instead. */
#define UPF_CONS_FLOW ((__force upf_t) BIT_ULL(23))
#define UPF_SHARE_IRQ ((__force upf_t) BIT_ULL(24))
#define UPF_EXAR_EFR ((__force upf_t) BIT_ULL(25))
@@ -567,6 +568,7 @@ struct uart_port {
#define UPSTAT_SYNC_FIFO ((__force upstat_t) (1 << 5))
bool hw_stopped; /* sw-assisted CTS flow state */
bool cons_flow; /* user specified console flow control */
unsigned int mctrl; /* current modem ctrl settings */
unsigned int frame_time; /* frame timing in ns */
unsigned int type; /* port type */
@@ -1163,6 +1165,24 @@ static inline bool uart_softcts_mode(struct uart_port *uport)
return ((uport->status & mask) == UPSTAT_CTS_ENABLE);
}
static inline void uart_set_cons_flow_enabled(struct uart_port *uport, bool enabled)
{
uport->cons_flow = enabled;
}
static inline bool uart_cons_flow_enabled(const struct uart_port *uport)
{
return uport->cons_flow;
}
static inline bool uart_console_hwflow_active(struct uart_port *uport)
{
return uart_console(uport) &&
!(uport->rs485.flags & SER_RS485_ENABLED) &&
uart_cons_flow_enabled(uport) &&
uart_cts_enabled(uport);
}
/*
* The following are helper functions for the low level drivers.
*/

1
include/linux/serial_sci.h
View File

@@ -51,7 +51,6 @@ struct plat_sci_port_ops {
*/
struct plat_sci_port {
unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
upf_t flags; /* UPF_* flags */
unsigned int sampling_rate;
unsigned int scscr; /* SCSCR initialization */

37
include/linux/synclink.h
View File

@@ -1,37 +0,0 @@
/*
* SyncLink Multiprotocol Serial Adapter Driver
*
* $Id: synclink.h,v 3.14 2006/07/17 20:15:43 paulkf Exp $
*
* Copyright (C) 1998-2000 by Microgate Corporation
*
* Redistribution of this file is permitted under
* the terms of the GNU Public License (GPL)
*/
#ifndef _SYNCLINK_H_
#define _SYNCLINK_H_
#include <uapi/linux/synclink.h>
/* provide 32 bit ioctl compatibility on 64 bit systems */
#ifdef CONFIG_COMPAT
#include <linux/compat.h>
struct MGSL_PARAMS32 {
compat_ulong_t mode;
unsigned char loopback;
unsigned short flags;
unsigned char encoding;
compat_ulong_t clock_speed;
unsigned char addr_filter;
unsigned short crc_type;
unsigned char preamble_length;
unsigned char preamble;
compat_ulong_t data_rate;
unsigned char data_bits;
unsigned char stop_bits;
unsigned char parity;
};
#define MGSL_IOCSPARAMS32 _IOW(MGSL_MAGIC_IOC,0,struct MGSL_PARAMS32)
#define MGSL_IOCGPARAMS32 _IOR(MGSL_MAGIC_IOC,1,struct MGSL_PARAMS32)
#endif
#endif /* _SYNCLINK_H_ */

164
include/trace/events/qcom_geni_serial.h Normal file
View File

@@ -0,0 +1,164 @@
/* SPDX-License-Identifier: GPL-2.0 */
#undef TRACE_SYSTEM
#define TRACE_SYSTEM qcom_geni_serial
#if !defined(_TRACE_QCOM_GENI_SERIAL_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_QCOM_GENI_SERIAL_H
#include <linux/device.h>
#include <linux/tracepoint.h>
TRACE_EVENT(geni_serial_set_termios,
TP_PROTO(struct device *dev, unsigned int baud,
unsigned int bits_per_char, u32 tx_trans_cfg,
u32 tx_parity_cfg, u32 rx_trans_cfg,
u32 rx_parity_cfg, u32 stop_bit_len),
TP_ARGS(dev, baud, bits_per_char, tx_trans_cfg, tx_parity_cfg,
rx_trans_cfg, rx_parity_cfg, stop_bit_len),
TP_STRUCT__entry(__string(name, dev_name(dev))
__field(unsigned int, baud)
__field(unsigned int, bits_per_char)
__field(u32, tx_trans_cfg)
__field(u32, tx_parity_cfg)
__field(u32, rx_trans_cfg)
__field(u32, rx_parity_cfg)
__field(u32, stop_bit_len)
),
TP_fast_assign(__assign_str(name);
__entry->baud = baud;
__entry->bits_per_char = bits_per_char;
__entry->tx_trans_cfg = tx_trans_cfg;
__entry->tx_parity_cfg = tx_parity_cfg;
__entry->rx_trans_cfg = rx_trans_cfg;
__entry->rx_parity_cfg = rx_parity_cfg;
__entry->stop_bit_len = stop_bit_len;
),
TP_printk("%s: baud=%u bpc=%u tx_trans=0x%08x tx_par=0x%08x rx_trans=0x%08x rx_par=0x%08x stop=%u",
__get_str(name), __entry->baud, __entry->bits_per_char,
__entry->tx_trans_cfg, __entry->tx_parity_cfg,
__entry->rx_trans_cfg, __entry->rx_parity_cfg,
__entry->stop_bit_len)
);
TRACE_EVENT(geni_serial_clk_cfg,
TP_PROTO(struct device *dev, unsigned int desired_rate,
unsigned long clk_rate, unsigned int clk_div,
unsigned int clk_idx),
TP_ARGS(dev, desired_rate, clk_rate, clk_div, clk_idx),
TP_STRUCT__entry(__string(name, dev_name(dev))
__field(unsigned int, desired_rate)
__field(unsigned long, clk_rate)
__field(unsigned int, clk_div)
__field(unsigned int, clk_idx)
),
TP_fast_assign(__assign_str(name);
__entry->desired_rate = desired_rate;
__entry->clk_rate = clk_rate;
__entry->clk_div = clk_div;
__entry->clk_idx = clk_idx;
),
TP_printk("%s: desired_rate=%u clk_rate=%lu clk_div=%u clk_idx=%u",
__get_str(name), __entry->desired_rate, __entry->clk_rate,
__entry->clk_div, __entry->clk_idx)
);
TRACE_EVENT(geni_serial_irq,
TP_PROTO(struct device *dev, u32 m_irq, u32 s_irq,
u32 dma_tx, u32 dma_rx),
TP_ARGS(dev, m_irq, s_irq, dma_tx, dma_rx),
TP_STRUCT__entry(__string(name, dev_name(dev))
__field(u32, m_irq)
__field(u32, s_irq)
__field(u32, dma_tx)
__field(u32, dma_rx)
),
TP_fast_assign(__assign_str(name);
__entry->m_irq = m_irq;
__entry->s_irq = s_irq;
__entry->dma_tx = dma_tx;
__entry->dma_rx = dma_rx;
),
TP_printk("%s: m_irq=0x%08x s_irq=0x%08x dma_tx=0x%08x dma_rx=0x%08x",
__get_str(name), __entry->m_irq, __entry->s_irq,
__entry->dma_tx, __entry->dma_rx)
);
DECLARE_EVENT_CLASS(geni_serial_data,
TP_PROTO(struct device *dev, const u8 *buf, unsigned int len),
TP_ARGS(dev, buf, len),
TP_STRUCT__entry(__string(name, dev_name(dev))
__field(unsigned int, len)
__dynamic_array(u8, data, len)
),
TP_fast_assign(__assign_str(name);
__entry->len = len;
memcpy(__get_dynamic_array(data), buf, len);
),
TP_printk("%s: len=%u data=%s",
__get_str(name), __entry->len,
__print_hex(__get_dynamic_array(data), __entry->len))
);
DEFINE_EVENT(geni_serial_data, geni_serial_tx_data,
TP_PROTO(struct device *dev, const u8 *buf, unsigned int len),
TP_ARGS(dev, buf, len)
);
DEFINE_EVENT(geni_serial_data, geni_serial_rx_data,
TP_PROTO(struct device *dev, const u8 *buf, unsigned int len),
TP_ARGS(dev, buf, len)
);
TRACE_EVENT(geni_serial_set_mctrl,
TP_PROTO(struct device *dev, unsigned int mctrl,
u32 uart_manual_rfr),
TP_ARGS(dev, mctrl, uart_manual_rfr),
TP_STRUCT__entry(__string(name, dev_name(dev))
__field(unsigned int, mctrl)
__field(u32, uart_manual_rfr)
),
TP_fast_assign(__assign_str(name);
__entry->mctrl = mctrl;
__entry->uart_manual_rfr = uart_manual_rfr;
),
TP_printk("%s: mctrl=0x%04x uart_manual_rfr=0x%08x",
__get_str(name), __entry->mctrl, __entry->uart_manual_rfr)
);
TRACE_EVENT(geni_serial_get_mctrl,
TP_PROTO(struct device *dev, unsigned int mctrl, u32 geni_ios),
TP_ARGS(dev, mctrl, geni_ios),
TP_STRUCT__entry(__string(name, dev_name(dev))
__field(unsigned int, mctrl)
__field(u32, geni_ios)
),
TP_fast_assign(__assign_str(name);
__entry->mctrl = mctrl;
__entry->geni_ios = geni_ios;
),
TP_printk("%s: mctrl=0x%04x geni_ios=0x%08x",
__get_str(name), __entry->mctrl, __entry->geni_ios)
);
#endif /* _TRACE_QCOM_GENI_SERIAL_H */
/* This part must be outside protection */
#include <trace/define_trace.h>

301
include/uapi/linux/synclink.h
View File

@@ -1,301 +0,0 @@
/* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
/*
* SyncLink Multiprotocol Serial Adapter Driver
*
* $Id: synclink.h,v 3.14 2006/07/17 20:15:43 paulkf Exp $
*
* Copyright (C) 1998-2000 by Microgate Corporation
*
* Redistribution of this file is permitted under
* the terms of the GNU Public License (GPL)
*/
#ifndef _UAPI_SYNCLINK_H_
#define _UAPI_SYNCLINK_H_
#define SYNCLINK_H_VERSION 3.6
#include <linux/types.h>
#define BIT0 0x0001
#define BIT1 0x0002
#define BIT2 0x0004
#define BIT3 0x0008
#define BIT4 0x0010
#define BIT5 0x0020
#define BIT6 0x0040
#define BIT7 0x0080
#define BIT8 0x0100
#define BIT9 0x0200
#define BIT10 0x0400
#define BIT11 0x0800
#define BIT12 0x1000
#define BIT13 0x2000
#define BIT14 0x4000
#define BIT15 0x8000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
#define HDLC_MAX_FRAME_SIZE 65535
#define MAX_ASYNC_TRANSMIT 4096
#define MAX_ASYNC_BUFFER_SIZE 4096
#define ASYNC_PARITY_NONE 0
#define ASYNC_PARITY_EVEN 1
#define ASYNC_PARITY_ODD 2
#define ASYNC_PARITY_SPACE 3
#define HDLC_FLAG_UNDERRUN_ABORT7 0x0000
#define HDLC_FLAG_UNDERRUN_ABORT15 0x0001
#define HDLC_FLAG_UNDERRUN_FLAG 0x0002
#define HDLC_FLAG_UNDERRUN_CRC 0x0004
#define HDLC_FLAG_SHARE_ZERO 0x0010
#define HDLC_FLAG_AUTO_CTS 0x0020
#define HDLC_FLAG_AUTO_DCD 0x0040
#define HDLC_FLAG_AUTO_RTS 0x0080
#define HDLC_FLAG_RXC_DPLL 0x0100
#define HDLC_FLAG_RXC_BRG 0x0200
#define HDLC_FLAG_RXC_TXCPIN 0x8000
#define HDLC_FLAG_RXC_RXCPIN 0x0000
#define HDLC_FLAG_TXC_DPLL 0x0400
#define HDLC_FLAG_TXC_BRG 0x0800
#define HDLC_FLAG_TXC_TXCPIN 0x0000
#define HDLC_FLAG_TXC_RXCPIN 0x0008
#define HDLC_FLAG_DPLL_DIV8 0x1000
#define HDLC_FLAG_DPLL_DIV16 0x2000
#define HDLC_FLAG_DPLL_DIV32 0x0000
#define HDLC_FLAG_HDLC_LOOPMODE 0x4000
#define HDLC_CRC_NONE 0
#define HDLC_CRC_16_CCITT 1
#define HDLC_CRC_32_CCITT 2
#define HDLC_CRC_MASK 0x00ff
#define HDLC_CRC_RETURN_EX 0x8000
#define RX_OK 0
#define RX_CRC_ERROR 1
#define HDLC_TXIDLE_FLAGS 0
#define HDLC_TXIDLE_ALT_ZEROS_ONES 1
#define HDLC_TXIDLE_ZEROS 2
#define HDLC_TXIDLE_ONES 3
#define HDLC_TXIDLE_ALT_MARK_SPACE 4
#define HDLC_TXIDLE_SPACE 5
#define HDLC_TXIDLE_MARK 6
#define HDLC_TXIDLE_CUSTOM_8 0x10000000
#define HDLC_TXIDLE_CUSTOM_16 0x20000000
#define HDLC_ENCODING_NRZ 0
#define HDLC_ENCODING_NRZB 1
#define HDLC_ENCODING_NRZI_MARK 2
#define HDLC_ENCODING_NRZI_SPACE 3
#define HDLC_ENCODING_NRZI HDLC_ENCODING_NRZI_SPACE
#define HDLC_ENCODING_BIPHASE_MARK 4
#define HDLC_ENCODING_BIPHASE_SPACE 5
#define HDLC_ENCODING_BIPHASE_LEVEL 6
#define HDLC_ENCODING_DIFF_BIPHASE_LEVEL 7
#define HDLC_PREAMBLE_LENGTH_8BITS 0
#define HDLC_PREAMBLE_LENGTH_16BITS 1
#define HDLC_PREAMBLE_LENGTH_32BITS 2
#define HDLC_PREAMBLE_LENGTH_64BITS 3
#define HDLC_PREAMBLE_PATTERN_NONE 0
#define HDLC_PREAMBLE_PATTERN_ZEROS 1
#define HDLC_PREAMBLE_PATTERN_FLAGS 2
#define HDLC_PREAMBLE_PATTERN_10 3
#define HDLC_PREAMBLE_PATTERN_01 4
#define HDLC_PREAMBLE_PATTERN_ONES 5
#define MGSL_MODE_ASYNC 1
#define MGSL_MODE_HDLC 2
#define MGSL_MODE_MONOSYNC 3
#define MGSL_MODE_BISYNC 4
#define MGSL_MODE_RAW 6
#define MGSL_MODE_BASE_CLOCK 7
#define MGSL_MODE_XSYNC 8
#define MGSL_BUS_TYPE_ISA 1
#define MGSL_BUS_TYPE_EISA 2
#define MGSL_BUS_TYPE_PCI 5
#define MGSL_INTERFACE_MASK 0xf
#define MGSL_INTERFACE_DISABLE 0
#define MGSL_INTERFACE_RS232 1
#define MGSL_INTERFACE_V35 2
#define MGSL_INTERFACE_RS422 3
#define MGSL_INTERFACE_RTS_EN 0x10
#define MGSL_INTERFACE_LL 0x20
#define MGSL_INTERFACE_RL 0x40
#define MGSL_INTERFACE_MSB_FIRST 0x80
typedef struct _MGSL_PARAMS
{
/* Common */
unsigned long mode; /* Asynchronous or HDLC */
unsigned char loopback; /* internal loopback mode */
/* HDLC Only */
unsigned short flags;
unsigned char encoding; /* NRZ, NRZI, etc. */
unsigned long clock_speed; /* external clock speed in bits per second */
unsigned char addr_filter; /* receive HDLC address filter, 0xFF = disable */
unsigned short crc_type; /* None, CRC16-CCITT, or CRC32-CCITT */
unsigned char preamble_length;
unsigned char preamble;
/* Async Only */
unsigned long data_rate; /* bits per second */
unsigned char data_bits; /* 7 or 8 data bits */
unsigned char stop_bits; /* 1 or 2 stop bits */
unsigned char parity; /* none, even, or odd */
} MGSL_PARAMS, *PMGSL_PARAMS;
#define MICROGATE_VENDOR_ID 0x13c0
#define SYNCLINK_DEVICE_ID 0x0010
#define MGSCC_DEVICE_ID 0x0020
#define SYNCLINK_SCA_DEVICE_ID 0x0030
#define SYNCLINK_GT_DEVICE_ID 0x0070
#define SYNCLINK_GT4_DEVICE_ID 0x0080
#define SYNCLINK_AC_DEVICE_ID 0x0090
#define SYNCLINK_GT2_DEVICE_ID 0x00A0
#define MGSL_MAX_SERIAL_NUMBER 30
/*
** device diagnostics status
*/
#define DiagStatus_OK 0
#define DiagStatus_AddressFailure 1
#define DiagStatus_AddressConflict 2
#define DiagStatus_IrqFailure 3
#define DiagStatus_IrqConflict 4
#define DiagStatus_DmaFailure 5
#define DiagStatus_DmaConflict 6
#define DiagStatus_PciAdapterNotFound 7
#define DiagStatus_CantAssignPciResources 8
#define DiagStatus_CantAssignPciMemAddr 9
#define DiagStatus_CantAssignPciIoAddr 10
#define DiagStatus_CantAssignPciIrq 11
#define DiagStatus_MemoryError 12
#define SerialSignal_DCD 0x01 /* Data Carrier Detect */
#define SerialSignal_TXD 0x02 /* Transmit Data */
#define SerialSignal_RI 0x04 /* Ring Indicator */
#define SerialSignal_RXD 0x08 /* Receive Data */
#define SerialSignal_CTS 0x10 /* Clear to Send */
#define SerialSignal_RTS 0x20 /* Request to Send */
#define SerialSignal_DSR 0x40 /* Data Set Ready */
#define SerialSignal_DTR 0x80 /* Data Terminal Ready */
/*
* Counters of the input lines (CTS, DSR, RI, CD) interrupts
*/
struct mgsl_icount {
__u32 cts, dsr, rng, dcd, tx, rx;
__u32 frame, parity, overrun, brk;
__u32 buf_overrun;
__u32 txok;
__u32 txunder;
__u32 txabort;
__u32 txtimeout;
__u32 rxshort;
__u32 rxlong;
__u32 rxabort;
__u32 rxover;
__u32 rxcrc;
__u32 rxok;
__u32 exithunt;
__u32 rxidle;
};
struct gpio_desc {
__u32 state;
__u32 smask;
__u32 dir;
__u32 dmask;
};
#define DEBUG_LEVEL_DATA 1
#define DEBUG_LEVEL_ERROR 2
#define DEBUG_LEVEL_INFO 3
#define DEBUG_LEVEL_BH 4
#define DEBUG_LEVEL_ISR 5
/*
** Event bit flags for use with MgslWaitEvent
*/
#define MgslEvent_DsrActive 0x0001
#define MgslEvent_DsrInactive 0x0002
#define MgslEvent_Dsr 0x0003
#define MgslEvent_CtsActive 0x0004
#define MgslEvent_CtsInactive 0x0008
#define MgslEvent_Cts 0x000c
#define MgslEvent_DcdActive 0x0010
#define MgslEvent_DcdInactive 0x0020
#define MgslEvent_Dcd 0x0030
#define MgslEvent_RiActive 0x0040
#define MgslEvent_RiInactive 0x0080
#define MgslEvent_Ri 0x00c0
#define MgslEvent_ExitHuntMode 0x0100
#define MgslEvent_IdleReceived 0x0200
/* Private IOCTL codes:
*
* MGSL_IOCSPARAMS set MGSL_PARAMS structure values
* MGSL_IOCGPARAMS get current MGSL_PARAMS structure values
* MGSL_IOCSTXIDLE set current transmit idle mode
* MGSL_IOCGTXIDLE get current transmit idle mode
* MGSL_IOCTXENABLE enable or disable transmitter
* MGSL_IOCRXENABLE enable or disable receiver
* MGSL_IOCTXABORT abort transmitting frame (HDLC)
* MGSL_IOCGSTATS return current statistics
* MGSL_IOCWAITEVENT wait for specified event to occur
* MGSL_LOOPTXDONE transmit in HDLC LoopMode done
* MGSL_IOCSIF set the serial interface type
* MGSL_IOCGIF get the serial interface type
*/
#define MGSL_MAGIC_IOC 'm'
#define MGSL_IOCSPARAMS _IOW(MGSL_MAGIC_IOC,0,struct _MGSL_PARAMS)
#define MGSL_IOCGPARAMS _IOR(MGSL_MAGIC_IOC,1,struct _MGSL_PARAMS)
#define MGSL_IOCSTXIDLE _IO(MGSL_MAGIC_IOC,2)
#define MGSL_IOCGTXIDLE _IO(MGSL_MAGIC_IOC,3)
#define MGSL_IOCTXENABLE _IO(MGSL_MAGIC_IOC,4)
#define MGSL_IOCRXENABLE _IO(MGSL_MAGIC_IOC,5)
#define MGSL_IOCTXABORT _IO(MGSL_MAGIC_IOC,6)
#define MGSL_IOCGSTATS _IO(MGSL_MAGIC_IOC,7)
#define MGSL_IOCWAITEVENT _IOWR(MGSL_MAGIC_IOC,8,int)
#define MGSL_IOCCLRMODCOUNT _IO(MGSL_MAGIC_IOC,15)
#define MGSL_IOCLOOPTXDONE _IO(MGSL_MAGIC_IOC,9)
#define MGSL_IOCSIF _IO(MGSL_MAGIC_IOC,10)
#define MGSL_IOCGIF _IO(MGSL_MAGIC_IOC,11)
#define MGSL_IOCSGPIO _IOW(MGSL_MAGIC_IOC,16,struct gpio_desc)
#define MGSL_IOCGGPIO _IOR(MGSL_MAGIC_IOC,17,struct gpio_desc)
#define MGSL_IOCWAITGPIO _IOWR(MGSL_MAGIC_IOC,18,struct gpio_desc)
#define MGSL_IOCSXSYNC _IO(MGSL_MAGIC_IOC, 19)
#define MGSL_IOCGXSYNC _IO(MGSL_MAGIC_IOC, 20)
#define MGSL_IOCSXCTRL _IO(MGSL_MAGIC_IOC, 21)
#define MGSL_IOCGXCTRL _IO(MGSL_MAGIC_IOC, 22)
#endif /* _UAPI_SYNCLINK_H_ */