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riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller

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Change the dma-controller and timer nodes to use the APB clock provided
by the AP_SUBSYS clock controller.

Remove apb_clk reference from BeagleV Ahead and LPI4a dts.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
This commit is contained in:
Drew Fustini
2024-08-01 11:38:08 -07:00
committed by Drew Fustini
parent 03a20182e1
commit 89d58327fd
3 changed files with 9 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
View File

@@ -45,10 +45,6 @@ &osc_32k {
clock-frequency = <32768>;
};
&apb_clk {
clock-frequency = <62500000>;
};
&spi_clk {
clock-frequency = <396000000>;
};

4
arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
View File

@@ -25,10 +25,6 @@ &osc_32k {
clock-frequency = <32768>;
};
&apb_clk {
clock-frequency = <62500000>;
};
&spi_clk {
clock-frequency = <396000000>;
};

24
arch/riscv/boot/dts/thead/th1520.dtsi
View File

@@ -216,12 +216,6 @@ osc_32k: 32k-oscillator {
#clock-cells = <0>;
};
apb_clk: apb-clk-clock {
compatible = "fixed-clock";
clock-output-names = "apb_clk";
#clock-cells = <0>;
};
spi_clk: spi-clock {
compatible = "fixed-clock";
clock-output-names = "spi_clk";
@@ -422,7 +416,7 @@ dmac0: dma-controller@ffefc00000 {
compatible = "snps,axi-dma-1.01a";
reg = <0xff 0xefc00000 0x0 0x1000>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb_clk>, <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>, <&clk CLK_PERI_APB_PCLK>;
clock-names = "core-clk", "cfgr-clk";
#dma-cells = <1>;
dma-channels = <4>;
@@ -437,7 +431,7 @@ dmac0: dma-controller@ffefc00000 {
timer0: timer@ffefc32000 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xefc32000 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -446,7 +440,7 @@ timer0: timer@ffefc32000 {
timer1: timer@ffefc32014 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xefc32014 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -455,7 +449,7 @@ timer1: timer@ffefc32014 {
timer2: timer@ffefc32028 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xefc32028 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -464,7 +458,7 @@ timer2: timer@ffefc32028 {
timer3: timer@ffefc3203c {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xefc3203c 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -495,7 +489,7 @@ uart5: serial@fff7f0c000 {
timer4: timer@ffffc33000 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xffc33000 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -504,7 +498,7 @@ timer4: timer@ffffc33000 {
timer5: timer@ffffc33014 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xffc33014 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -513,7 +507,7 @@ timer5: timer@ffffc33014 {
timer6: timer@ffffc33028 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xffc33028 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -522,7 +516,7 @@ timer6: timer@ffffc33028 {
timer7: timer@ffffc3303c {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xffc3303c 0x0 0x14>;
clocks = <&apb_clk>;
clocks = <&clk CLK_PERI_APB_PCLK>;
clock-names = "timer";
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";