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arm64: dts: renesas: r8a774c0: Add USB2.0 phy and host device nodes
Add USB2.0 phy and host (EHCI/OHCI) device tree nodes to the RZ/G2E SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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committed by
Simon Horman
parent
8ed3a6b223
commit
89893580cf
@@ -1228,6 +1228,43 @@ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
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dma-channels = <16>;
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};
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ohci0: usb@ee080000 {
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compatible = "generic-ohci";
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reg = <0 0xee080000 0 0x100>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
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phys = <&usb2_phy0>;
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phy-names = "usb";
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power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
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resets = <&cpg 703>, <&cpg 704>;
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status = "disabled";
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};
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ehci0: usb@ee080100 {
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compatible = "generic-ehci";
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reg = <0 0xee080100 0 0x100>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
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phys = <&usb2_phy0>;
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phy-names = "usb";
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companion = <&ohci0>;
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power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
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resets = <&cpg 703>, <&cpg 704>;
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status = "disabled";
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};
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usb2_phy0: usb-phy@ee080200 {
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compatible = "renesas,usb2-phy-r8a774c0",
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"renesas,rcar-gen3-usb2-phy";
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reg = <0 0xee080200 0 0x700>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
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power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
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resets = <&cpg 703>, <&cpg 704>;
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#phy-cells = <0>;
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status = "disabled";
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};
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a774c0",
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"renesas,rcar-gen3-sdhi";
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