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drm/amdgpu: Update PTE flags with TF enabled
This patch updates the PTE flags when translate further (TF) is
enabled:
- With translate_further enabled, invalid PTEs can be 0. Reading
consecutive invalid PTEs as 0 is considered a fault. To prevent
this, ensure invalid PTEs have at least 1 bit set.
- The current invalid PTE flags settings to translate a retry fault
into a no-retry fault, doesn't work with TF enabled. As a result,
update invalid PTE flags settings which works for both TF enabled
and disabled case.
Fixes: 352e683b72 ("drm/amdgpu: Enable translate_further to extend UTCL2 reach")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
3913f0179b
commit
876552e5d5
@@ -2484,8 +2484,7 @@ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid,
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/* Intentionally setting invalid PTE flag
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* combination to force a no-retry-fault
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*/
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flags = AMDGPU_PTE_EXECUTABLE | AMDGPU_PDE_PTE |
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AMDGPU_PTE_TF;
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flags = AMDGPU_PTE_SNOOPED | AMDGPU_PTE_PRT;
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value = 0;
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} else if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_NEVER) {
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/* Redirect the access to the dummy page */
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@@ -1103,10 +1103,13 @@ static void gmc_v9_0_get_vm_pde(struct amdgpu_device *adev, int level,
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*flags |= AMDGPU_PDE_BFS(0x9);
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} else if (level == AMDGPU_VM_PDB0) {
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if (*flags & AMDGPU_PDE_PTE)
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if (*flags & AMDGPU_PDE_PTE) {
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*flags &= ~AMDGPU_PDE_PTE;
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else
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if (!(*flags & AMDGPU_PTE_VALID))
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*addr |= 1 << PAGE_SHIFT;
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} else {
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*flags |= AMDGPU_PTE_TF;
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}
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}
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}
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