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arm64: dts: ls1088a: Fix incorrect I2C clock divider

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Ls1088a platform, the i2c input clock is actually platform pll CLK / 8
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Chuanhua Han
2019-08-06 16:42:20 +08:00
committed by Shawn Guo
parent f64697bd0b
commit 86c457e399
1 changed files with 4 additions and 4 deletions
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8
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
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@@ -328,7 +328,7 @@ i2c0: i2c@2000000 {
#size-cells = <0>;
reg = <0x0 0x2000000 0x0 0x10000>;
interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
clocks = <&clockgen 4 7>;
status = "disabled";
};
@@ -338,7 +338,7 @@ i2c1: i2c@2010000 {
#size-cells = <0>;
reg = <0x0 0x2010000 0x0 0x10000>;
interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
clocks = <&clockgen 4 7>;
status = "disabled";
};
@@ -348,7 +348,7 @@ i2c2: i2c@2020000 {
#size-cells = <0>;
reg = <0x0 0x2020000 0x0 0x10000>;
interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
clocks = <&clockgen 4 7>;
status = "disabled";
};
@@ -358,7 +358,7 @@ i2c3: i2c@2030000 {
#size-cells = <0>;
reg = <0x0 0x2030000 0x0 0x10000>;
interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
clocks = <&clockgen 4 7>;
status = "disabled";
};