mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-06 07:34:03 -04:00
drm/i915: Drop useless PLANE_FOO_3 register defines
We only need register defines for the first two planes on the first two pipes. Nuke everything else. v2: Drop a few more that snuck through Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240513165842.15199-1-ville.syrjala@linux.intel.com
This commit is contained in:
@@ -10,7 +10,6 @@
|
||||
|
||||
#define _PLANE_CTL_1_A 0x70180
|
||||
#define _PLANE_CTL_2_A 0x70280
|
||||
#define _PLANE_CTL_3_A 0x70380
|
||||
#define PLANE_CTL_ENABLE REG_BIT(31)
|
||||
#define PLANE_CTL_ARB_SLOTS_MASK REG_GENMASK(30, 28) /* icl+ */
|
||||
#define PLANE_CTL_ARB_SLOTS(x) REG_FIELD_PREP(PLANE_CTL_ARB_SLOTS_MASK, (x)) /* icl+ */
|
||||
@@ -76,31 +75,26 @@
|
||||
#define PLANE_CTL_ROTATE_270 REG_FIELD_PREP(PLANE_CTL_ROTATE_MASK, 3)
|
||||
#define _PLANE_STRIDE_1_A 0x70188
|
||||
#define _PLANE_STRIDE_2_A 0x70288
|
||||
#define _PLANE_STRIDE_3_A 0x70388
|
||||
#define PLANE_STRIDE__MASK REG_GENMASK(11, 0)
|
||||
#define PLANE_STRIDE_(stride) REG_FIELD_PREP(PLANE_STRIDE__MASK, (stride))
|
||||
#define _PLANE_POS_1_A 0x7018c
|
||||
#define _PLANE_POS_2_A 0x7028c
|
||||
#define _PLANE_POS_3_A 0x7038c
|
||||
#define PLANE_POS_Y_MASK REG_GENMASK(31, 16)
|
||||
#define PLANE_POS_Y(y) REG_FIELD_PREP(PLANE_POS_Y_MASK, (y))
|
||||
#define PLANE_POS_X_MASK REG_GENMASK(15, 0)
|
||||
#define PLANE_POS_X(x) REG_FIELD_PREP(PLANE_POS_X_MASK, (x))
|
||||
#define _PLANE_SIZE_1_A 0x70190
|
||||
#define _PLANE_SIZE_2_A 0x70290
|
||||
#define _PLANE_SIZE_3_A 0x70390
|
||||
#define PLANE_HEIGHT_MASK REG_GENMASK(31, 16)
|
||||
#define PLANE_HEIGHT(h) REG_FIELD_PREP(PLANE_HEIGHT_MASK, (h))
|
||||
#define PLANE_WIDTH_MASK REG_GENMASK(15, 0)
|
||||
#define PLANE_WIDTH(w) REG_FIELD_PREP(PLANE_WIDTH_MASK, (w))
|
||||
#define _PLANE_SURF_1_A 0x7019c
|
||||
#define _PLANE_SURF_2_A 0x7029c
|
||||
#define _PLANE_SURF_3_A 0x7039c
|
||||
#define PLANE_SURF_ADDR_MASK REG_GENMASK(31, 12)
|
||||
#define PLANE_SURF_DECRYPT REG_BIT(2)
|
||||
#define _PLANE_OFFSET_1_A 0x701a4
|
||||
#define _PLANE_OFFSET_2_A 0x702a4
|
||||
#define _PLANE_OFFSET_3_A 0x703a4
|
||||
#define PLANE_OFFSET_Y_MASK REG_GENMASK(31, 16)
|
||||
#define PLANE_OFFSET_Y(y) REG_FIELD_PREP(PLANE_OFFSET_Y_MASK, (y))
|
||||
#define PLANE_OFFSET_X_MASK REG_GENMASK(15, 0)
|
||||
@@ -145,7 +139,6 @@
|
||||
#define PLANE_CUS_VPHASE_0_5 REG_FIELD_PREP(PLANE_CUS_VPHASE_MASK, 2)
|
||||
#define _PLANE_COLOR_CTL_1_A 0x701CC /* GLK+ */
|
||||
#define _PLANE_COLOR_CTL_2_A 0x702CC /* GLK+ */
|
||||
#define _PLANE_COLOR_CTL_3_A 0x703CC /* GLK+ */
|
||||
#define PLANE_COLOR_PIPE_GAMMA_ENABLE REG_BIT(30) /* Pre-ICL */
|
||||
#define PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE REG_BIT(28)
|
||||
#define PLANE_COLOR_PIPE_CSC_ENABLE REG_BIT(23) /* Pre-ICL */
|
||||
@@ -234,49 +227,38 @@
|
||||
|
||||
#define _PLANE_CTL_1_B 0x71180
|
||||
#define _PLANE_CTL_2_B 0x71280
|
||||
#define _PLANE_CTL_3_B 0x71380
|
||||
#define _PLANE_CTL_1(pipe) _PIPE(pipe, _PLANE_CTL_1_A, _PLANE_CTL_1_B)
|
||||
#define _PLANE_CTL_2(pipe) _PIPE(pipe, _PLANE_CTL_2_A, _PLANE_CTL_2_B)
|
||||
#define _PLANE_CTL_3(pipe) _PIPE(pipe, _PLANE_CTL_3_A, _PLANE_CTL_3_B)
|
||||
#define PLANE_CTL(pipe, plane) \
|
||||
_MMIO_PLANE(plane, _PLANE_CTL_1(pipe), _PLANE_CTL_2(pipe))
|
||||
|
||||
#define _PLANE_STRIDE_1_B 0x71188
|
||||
#define _PLANE_STRIDE_2_B 0x71288
|
||||
#define _PLANE_STRIDE_3_B 0x71388
|
||||
#define _PLANE_STRIDE_1(pipe) \
|
||||
_PIPE(pipe, _PLANE_STRIDE_1_A, _PLANE_STRIDE_1_B)
|
||||
#define _PLANE_STRIDE_2(pipe) \
|
||||
_PIPE(pipe, _PLANE_STRIDE_2_A, _PLANE_STRIDE_2_B)
|
||||
#define _PLANE_STRIDE_3(pipe) \
|
||||
_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
|
||||
#define PLANE_STRIDE(pipe, plane) \
|
||||
_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
|
||||
|
||||
#define _PLANE_POS_1_B 0x7118c
|
||||
#define _PLANE_POS_2_B 0x7128c
|
||||
#define _PLANE_POS_3_B 0x7138c
|
||||
#define _PLANE_POS_1(pipe) _PIPE(pipe, _PLANE_POS_1_A, _PLANE_POS_1_B)
|
||||
#define _PLANE_POS_2(pipe) _PIPE(pipe, _PLANE_POS_2_A, _PLANE_POS_2_B)
|
||||
#define _PLANE_POS_3(pipe) _PIPE(pipe, _PLANE_POS_3_A, _PLANE_POS_3_B)
|
||||
#define PLANE_POS(pipe, plane) \
|
||||
_MMIO_PLANE(plane, _PLANE_POS_1(pipe), _PLANE_POS_2(pipe))
|
||||
|
||||
#define _PLANE_SIZE_1_B 0x71190
|
||||
#define _PLANE_SIZE_2_B 0x71290
|
||||
#define _PLANE_SIZE_3_B 0x71390
|
||||
#define _PLANE_SIZE_1(pipe) _PIPE(pipe, _PLANE_SIZE_1_A, _PLANE_SIZE_1_B)
|
||||
#define _PLANE_SIZE_2(pipe) _PIPE(pipe, _PLANE_SIZE_2_A, _PLANE_SIZE_2_B)
|
||||
#define _PLANE_SIZE_3(pipe) _PIPE(pipe, _PLANE_SIZE_3_A, _PLANE_SIZE_3_B)
|
||||
#define PLANE_SIZE(pipe, plane) \
|
||||
_MMIO_PLANE(plane, _PLANE_SIZE_1(pipe), _PLANE_SIZE_2(pipe))
|
||||
|
||||
#define _PLANE_SURF_1_B 0x7119c
|
||||
#define _PLANE_SURF_2_B 0x7129c
|
||||
#define _PLANE_SURF_3_B 0x7139c
|
||||
#define _PLANE_SURF_1(pipe) _PIPE(pipe, _PLANE_SURF_1_A, _PLANE_SURF_1_B)
|
||||
#define _PLANE_SURF_2(pipe) _PIPE(pipe, _PLANE_SURF_2_A, _PLANE_SURF_2_B)
|
||||
#define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B)
|
||||
#define PLANE_SURF(pipe, plane) \
|
||||
_MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe))
|
||||
|
||||
@@ -351,7 +333,6 @@
|
||||
|
||||
#define _PLANE_COLOR_CTL_1_B 0x711CC
|
||||
#define _PLANE_COLOR_CTL_2_B 0x712CC
|
||||
#define _PLANE_COLOR_CTL_3_B 0x713CC
|
||||
#define _PLANE_COLOR_CTL_1(pipe) \
|
||||
_PIPE(pipe, _PLANE_COLOR_CTL_1_A, _PLANE_COLOR_CTL_1_B)
|
||||
#define _PLANE_COLOR_CTL_2(pipe) \
|
||||
|
||||
Reference in New Issue
Block a user