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media: imx8-isi: Add support for i.MX8QM and i.MX8QXP

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Add compatibles and platform data for i.MX8QM and i.MX8QXP platforms.
i.MX8QM's IER register layout is difference with i.MX8QXP.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20250522-8qxp_camera-v5-7-d4be869fdb7e@nxp.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
This commit is contained in:
Robert Chiras
2025-05-22 13:56:45 -04:00
committed by Hans Verkuil
parent dee8521f69
commit 859278460f
2 changed files with 43 additions and 2 deletions
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43
drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
View File

@@ -246,7 +246,7 @@ static void mxc_isi_v4l2_cleanup(struct mxc_isi_dev *isi)
/* Panic will assert when the buffers are 50% full */
/* For i.MX8QXP C0 and i.MX8MN ISI IER version */
/* For i.MX8MN ISI IER version */
static const struct mxc_isi_ier_reg mxc_imx8_isi_ier_v1 = {
.oflw_y_buf_en = { .mask = BIT(19) },
.oflw_u_buf_en = { .mask = BIT(21) },
@@ -257,7 +257,7 @@ static const struct mxc_isi_ier_reg mxc_imx8_isi_ier_v1 = {
.panic_v_buf_en = { .mask = BIT(24) },
};
/* For i.MX8MP ISI IER version */
/* For i.MX8QXP C0 and i.MX8MP ISI IER version */
static const struct mxc_isi_ier_reg mxc_imx8_isi_ier_v2 = {
.oflw_y_buf_en = { .mask = BIT(18) },
.oflw_u_buf_en = { .mask = BIT(20) },
@@ -268,6 +268,21 @@ static const struct mxc_isi_ier_reg mxc_imx8_isi_ier_v2 = {
.panic_v_buf_en = { .mask = BIT(23) },
};
/* For i.MX8QM ISI IER version */
static const struct mxc_isi_ier_reg mxc_imx8_isi_ier_qm = {
.oflw_y_buf_en = { .mask = BIT(16) },
.oflw_u_buf_en = { .mask = BIT(19) },
.oflw_v_buf_en = { .mask = BIT(22) },
.excs_oflw_y_buf_en = { .mask = BIT(17) },
.excs_oflw_u_buf_en = { .mask = BIT(20) },
.excs_oflw_v_buf_en = { .mask = BIT(23) },
.panic_y_buf_en = { .mask = BIT(18) },
.panic_u_buf_en = { .mask = BIT(21) },
.panic_v_buf_en = { .mask = BIT(24) },
};
/* Panic will assert when the buffers are 50% full */
static const struct mxc_isi_set_thd mxc_imx8_isi_thd_v1 = {
.panic_set_thd_y = { .mask = 0x0000f, .offset = 0, .threshold = 0x7 },
@@ -322,6 +337,28 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
.has_36bit_dma = false,
};
static const struct mxc_isi_plat_data mxc_imx8qm_data = {
.model = MXC_ISI_IMX8QM,
.num_ports = 5,
.num_channels = 8,
.reg_offset = 0x10000,
.ier_reg = &mxc_imx8_isi_ier_qm,
.set_thd = &mxc_imx8_isi_thd_v1,
.buf_active_reverse = true,
.has_36bit_dma = false,
};
static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
.model = MXC_ISI_IMX8QXP,
.num_ports = 5,
.num_channels = 6,
.reg_offset = 0x10000,
.ier_reg = &mxc_imx8_isi_ier_v2,
.set_thd = &mxc_imx8_isi_thd_v1,
.buf_active_reverse = true,
.has_36bit_dma = false,
};
/* -----------------------------------------------------------------------------
* Power management
*/
@@ -499,6 +536,8 @@ static void mxc_isi_remove(struct platform_device *pdev)
static const struct of_device_id mxc_isi_of_match[] = {
{ .compatible = "fsl,imx8mn-isi", .data = &mxc_imx8mn_data },
{ .compatible = "fsl,imx8mp-isi", .data = &mxc_imx8mp_data },
{ .compatible = "fsl,imx8qm-isi", .data = &mxc_imx8qm_data },
{ .compatible = "fsl,imx8qxp-isi", .data = &mxc_imx8qxp_data },
{ .compatible = "fsl,imx8ulp-isi", .data = &mxc_imx8ulp_data },
{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
{ /* sentinel */ },

2
drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
View File

@@ -157,6 +157,8 @@ struct mxc_gasket_ops {
enum model {
MXC_ISI_IMX8MN,
MXC_ISI_IMX8MP,
MXC_ISI_IMX8QM,
MXC_ISI_IMX8QXP,
MXC_ISI_IMX8ULP,
MXC_ISI_IMX93,
};