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arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes

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The LS1043A PCIe controller has some control registers
in SCFG block, so add the SCFG phandle for each PCIe
controller node.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Hou Zhiqiang
2022-09-14 16:46:56 -05:00
committed by Shawn Guo
parent ee00c1a631
commit 8580b6aa02
1 changed files with 3 additions and 0 deletions
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3
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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@@ -901,6 +901,7 @@ pcie1: pcie@3400000 {
<0000 0 0 2 &gic 0 111 0x4>,
<0000 0 0 3 &gic 0 112 0x4>,
<0000 0 0 4 &gic 0 113 0x4>;
fsl,pcie-scfg = <&scfg 0>;
status = "disabled";
};
@@ -927,6 +928,7 @@ pcie2: pcie@3500000 {
<0000 0 0 2 &gic 0 121 0x4>,
<0000 0 0 3 &gic 0 122 0x4>,
<0000 0 0 4 &gic 0 123 0x4>;
fsl,pcie-scfg = <&scfg 1>;
status = "disabled";
};
@@ -953,6 +955,7 @@ pcie3: pcie@3600000 {
<0000 0 0 2 &gic 0 155 0x4>,
<0000 0 0 3 &gic 0 156 0x4>,
<0000 0 0 4 &gic 0 157 0x4>;
fsl,pcie-scfg = <&scfg 2>;
status = "disabled";
};