gpu: nova-core: Move one PBUS register definition

Move NV_PBUS_SW_SCRATCH_0E_FRTS_ERR register definition into gsp
module and update registers visibility.

Suggested-by: Alexandre Courbot <acourbot@nvidia.com>
Suggested-by: Danilo Krummrich <dakr@kernel.org>
Signed-off-by: Antonin Malzieu Ridolfi <dev@nanonej.com>
Link: https://patch.msgid.link/20260727-nova-core-regs-split-v2-3-21b5e6e32ea5@nanonej.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
This commit is contained in:
Antonin Malzieu Ridolfi
2026-07-27 17:51:53 +02:00
committed by Alexandre Courbot
parent 81aa6f190a
commit 849044a381
3 changed files with 12 additions and 6 deletions

View File

@@ -40,12 +40,12 @@
GspHal,
UnloadBundle, //
},
regs,
sequencer::GspSequencer,
Gsp,
GspBootContext,
GspFwWprMeta, //
},
regs,
vbios::Vbios, //
};

View File

@@ -2,6 +2,8 @@
use kernel::io::register;
use crate::regs::NV_PBUS_SW_SCRATCH;
// PGSP
register! {
@@ -9,3 +11,12 @@
31:0 address;
}
}
// PBUS
register! {
/// Scratch register 0xe used as FRTS firmware error code.
pub(super) NV_PBUS_SW_SCRATCH_0E_FRTS_ERR(u32) => NV_PBUS_SW_SCRATCH[0xe] {
31:16 frts_err_code;
}
}

View File

@@ -109,11 +109,6 @@ fn fmt(&self, f: &mut kernel::fmt::Formatter<'_>) -> kernel::fmt::Result {
register! {
pub(crate) NV_PBUS_SW_SCRATCH(u32)[64] @ 0x00001400 {}
/// Scratch register 0xe used as FRTS firmware error code.
pub(crate) NV_PBUS_SW_SCRATCH_0E_FRTS_ERR(u32) => NV_PBUS_SW_SCRATCH[0xe] {
31:16 frts_err_code;
}
}
// PGC6 register space.