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Merge tag 'stm32-dt-for-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

Browse Source 
STM32 DT for v6.4, round 1

Highlights:
----------
- MPU:
  - STM32MP13:
    - Add FMC support.
    - Add QSPI support.
    - Add 8 UART instances nodes.
    - Enable UART on STM32MP135F-DK:
      -UART1/UART8 used on expansion connector.
      -UART2 used for BT.
      -UART4 used for console.
  - STMP32MP15:
    - Add STM32MP151 support ( documentation + machine).
    - Uart fixes (slew rate, aliases clean-up).
    - Fix GPU YAMl issue.

* tag 'stm32-dt-for-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: stm32: add initial documentation for STM32MP151
  ARM: dts: stm32: Add QSPI support on STM32MP13x SoC family
  ARM: dts: stm32: add FMC support on STM32MP13x SoC family
  ARM: dts: stm32: YAML validation fails for Argon Boards
  ARM: dts: stm32: YAML validation fails for Odyssey Boards
  ARM: dts: stm32: YAML validation fails for STM32MP15 ST Boards
  ARM: dts: stm32: add uart nodes and uart aliases on stm32mp135f-dk
  ARM: dts: stm32: add pins for usart2/1/4/8 in stm32mp13-pinctrl
  ARM: dts: stm32: add uart nodes on stm32mp13
  ARM: dts: stm32: clean uart aliases on stm32mp15xx-exx boards
  ARM: dts: stm32: clean uart aliases on stm32mp15xx-dkx boards
  ARM: dts: stm32: fix slew-rate of USART2 on stm32mp15xx-dkx
  ARM: stm32: add support for STM32MP151
  ARM: dts: stm32: fix spi1 pin assignment on stm32mp15
  ARM: dts: stm32: drop invalid simple-panel compatible on stm32mp157c-lxa
  ARM: dts: stm32: Add coprocessor detach mbox on stm32mp15xx-osd32 SoM

Link: https://lore.kernel.org/r/63987ed6-2813-15ff-e058-73312a730d61@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-04-14 15:24:58 +02:00
parent d40a2f5062 49f1d0b65f
commit 83f91bb49c
16 changed files with 386 additions and 74 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/arm/index.rst
View File

@@ -58,6 +58,7 @@ SoC-specific documents
stm32/stm32f769-overview
stm32/stm32f429-overview
stm32/stm32mp13-overview
stm32/stm32mp151-overview
stm32/stm32mp157-overview
stm32/stm32-dma-mdma-chaining

36
Documentation/arm/stm32/stm32mp151-overview.rst Normal file
View File

@@ -0,0 +1,36 @@
===================
STM32MP151 Overview
===================
Introduction
------------
The STM32MP151 is a Cortex-A MPU aimed at various applications.
It features:
- Single Cortex-A7 application core
- Standard memories interface support
- Standard connectivity, widely inherited from the STM32 MCU family
- Comprehensive security support
More details:
- Cortex-A7 core running up to @800MHz
- FMC controller to connect SDRAM, NOR and NAND memories
- QSPI
- SD/MMC/SDIO support
- Ethernet controller
- ADC/DAC
- USB EHCI/OHCI controllers
- USB OTG
- I2C, SPI busses support
- Several general purpose timers
- Serial Audio interface
- LCD-TFT controller
- DCMIPP
- SPDIFRX
- DFSDM
:Authors:
- Roan van Dijk <roan@protonic.nl>

129
arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
View File

@@ -258,4 +258,133 @@ pins2 {
bias-disable;
};
};
uart4_idle_pins_a: uart4-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */
};
pins2 {
pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
bias-disable;
};
};
uart4_sleep_pins_a: uart4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */
<STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */
};
};
uart8_pins_a: uart8-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
bias-pull-up;
};
};
uart8_idle_pins_a: uart8-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* UART8_TX */
};
pins2 {
pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
bias-pull-up;
};
};
uart8_sleep_pins_a: uart8-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* UART8_TX */
<STM32_PINMUX('F', 9, ANALOG)>; /* UART8_RX */
};
};
usart1_pins_a: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
<STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
<STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
bias-pull-up;
};
};
usart1_idle_pins_a: usart1-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
<STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */
bias-pull-up;
};
};
usart1_sleep_pins_a: usart1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
<STM32_PINMUX('C', 2, ANALOG)>, /* USART1_RTS */
<STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */
<STM32_PINMUX('B', 0, ANALOG)>; /* USART1_RX */
};
};
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 12, AF1)>, /* USART2_TX */
<STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */
<STM32_PINMUX('E', 11, AF2)>; /* USART2_CTS_NSS */
bias-disable;
};
};
usart2_idle_pins_a: usart2-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */
};
pins2 {
pinmux = <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */
bias-disable;
};
};
usart2_sleep_pins_a: usart2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */
<STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */
};
};
};

145
arch/arm/boot/dts/stm32mp131.dtsi
View File

@@ -397,12 +397,42 @@ spdifrx: audio-controller@4000d000 {
status = "disabled";
};
usart3: serial@4000f000 {
compatible = "st,stm32h7-uart";
reg = <0x4000f000 0x400>;
interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART3_K>;
resets = <&rcc USART3_R>;
wakeup-source;
dmas = <&dmamux1 45 0x400 0x5>,
<&dmamux1 46 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
uart4: serial@40010000 {
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART4_K>;
resets = <&rcc UART4_R>;
wakeup-source;
dmas = <&dmamux1 63 0x400 0x5>,
<&dmamux1 64 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
uart5: serial@40011000 {
compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART5_K>;
resets = <&rcc UART5_R>;
wakeup-source;
dmas = <&dmamux1 65 0x400 0x5>,
<&dmamux1 66 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -442,6 +472,32 @@ i2c2: i2c@40013000 {
status = "disabled";
};
uart7: serial@40018000 {
compatible = "st,stm32h7-uart";
reg = <0x40018000 0x400>;
interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART7_K>;
resets = <&rcc UART7_R>;
wakeup-source;
dmas = <&dmamux1 79 0x400 0x5>,
<&dmamux1 80 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
uart8: serial@40019000 {
compatible = "st,stm32h7-uart";
reg = <0x40019000 0x400>;
interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART8_K>;
resets = <&rcc UART8_R>;
wakeup-source;
dmas = <&dmamux1 81 0x400 0x5>,
<&dmamux1 82 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
timers1: timer@44000000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -524,6 +580,19 @@ counter {
};
};
usart6: serial@44003000 {
compatible = "st,stm32h7-uart";
reg = <0x44003000 0x400>;
interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART6_K>;
resets = <&rcc USART6_R>;
wakeup-source;
dmas = <&dmamux1 71 0x400 0x5>,
<&dmamux1 72 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
i2s1: audio-controller@44004000 {
compatible = "st,stm32h7-i2s";
reg = <0x44004000 0x400>;
@@ -748,6 +817,32 @@ usbotg_hs: usb@49000000 {
status = "disabled";
};
usart1: serial@4c000000 {
compatible = "st,stm32h7-uart";
reg = <0x4c000000 0x400>;
interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART1_K>;
resets = <&rcc USART1_R>;
wakeup-source;
dmas = <&dmamux1 41 0x400 0x5>,
<&dmamux1 42 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
usart2: serial@4c001000 {
compatible = "st,stm32h7-uart";
reg = <0x4c001000 0x400>;
interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART2_K>;
resets = <&rcc USART2_R>;
wakeup-source;
dmas = <&dmamux1 43 0x400 0x5>,
<&dmamux1 44 0x400 0x1>;
dma-names = "rx", "tx";
status = "disabled";
};
i2s4: audio-controller@4c002000 {
compatible = "st,stm32h7-i2s";
reg = <0x4c002000 0x400>;
@@ -1137,6 +1232,54 @@ mdma: dma-controller@58000000 {
dma-requests = <48>;
};
fmc: memory-controller@58002000 {
compatible = "st,stm32mp1-fmc2-ebi";
reg = <0x58002000 0x1000>;
ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
<1 0 0x64000000 0x04000000>, /* EBI CS 2 */
<2 0 0x68000000 0x04000000>, /* EBI CS 3 */
<3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
<4 0 0x80000000 0x10000000>; /* NAND */
#address-cells = <2>;
#size-cells = <1>;
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
status = "disabled";
nand-controller@4,0 {
compatible = "st,stm32mp1-fmc2-nfc";
reg = <4 0x00000000 0x1000>,
<4 0x08010000 0x1000>,
<4 0x08020000 0x1000>,
<4 0x01000000 0x1000>,
<4 0x09010000 0x1000>,
<4 0x09020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>,
<&mdma 24 0x2 0x12000a08 0x0 0x0>,
<&mdma 25 0x2 0x12000a0a 0x0 0x0>;
dma-names = "tx", "rx", "ecc";
status = "disabled";
};
};
qspi: spi@58003000 {
compatible = "st,stm32f469-qspi";
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
reg-names = "qspi", "qspi_mm";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>,
<&mdma 26 0x2 0x10100008 0x0 0x0>;
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
status = "disabled";
};
sdmmc1: mmc@58005000 {
compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x20253180>;

42
arch/arm/boot/dts/stm32mp135f-dk.dts
View File

@@ -19,6 +19,13 @@ / {
aliases {
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
serial3 = &usart2;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@c0000000 {
@@ -267,8 +274,41 @@ timer@13 {
};
&uart4 {
pinctrl-names = "default";
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart4_pins_a>;
pinctrl-1 = <&uart4_sleep_pins_a>;
pinctrl-2 = <&uart4_idle_pins_a>;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
&uart8 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&uart8_pins_a>;
pinctrl-1 = <&uart8_sleep_pins_a>;
pinctrl-2 = <&uart8_idle_pins_a>;
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
};
&usart1 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart1_pins_a>;
pinctrl-1 = <&usart1_sleep_pins_a>;
pinctrl-2 = <&usart1_idle_pins_a>;
uart-has-rtscts;
status = "disabled";
};
/* Bluetooth */
&usart2 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_sleep_pins_a>;
pinctrl-2 = <&usart2_idle_pins_a>;
uart-has-rtscts;
status = "okay";
};

34
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View File

@@ -1880,6 +1880,21 @@ pins {
};
};
spi1_pins_b: spi1-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
bias-disable;
};
};
spi2_pins_a: spi2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
@@ -2163,7 +2178,7 @@ pins1 {
<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <3>;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
@@ -2181,7 +2196,7 @@ pins2 {
pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <3>;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
@@ -2448,19 +2463,4 @@ pins2 {
bias-disable;
};
};
spi1_pins_b: spi1-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
bias-disable;
};
};
};

3
arch/arm/boot/dts/stm32mp157a-dk1.dts
View File

@@ -17,9 +17,6 @@ / {
aliases {
ethernet0 = &ethernet0;
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart7;
};
chosen {

3
arch/arm/boot/dts/stm32mp157c-dk2.dts
View File

@@ -18,9 +18,6 @@ / {
aliases {
ethernet0 = &ethernet0;
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart7;
serial3 = &usart2;
};

17
arch/arm/boot/dts/stm32mp157c-ed1.dts
View File

@@ -16,6 +16,10 @@ / {
model = "STMicroelectronics STM32MP157C eval daughter";
compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
aliases {
serial0 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
@@ -65,15 +69,6 @@ retram: retram@38000000 {
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@e8000000 {
reg = <0xe8000000 0x8000000>;
no-map;
};
};
aliases {
serial0 = &uart4;
};
sd_switch: regulator-sd_switch {
@@ -140,10 +135,6 @@ &dts {
status = "okay";
};
&gpu {
contiguous-area = <&gpu_reserved>;
};
&hash1 {
status = "okay";
};

9
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
View File

@@ -68,11 +68,6 @@ retram: retram@38000000 {
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@dc000000 {
reg = <0xdc000000 0x4000000>;
no-map;
};
};
led: gpio_leds {
@@ -183,10 +178,6 @@ phy0: ethernet-phy@0 {
};
};
&gpu {
contiguous-area = <&gpu_reserved>;
};
&hash1 {
status = "okay";
};

9
arch/arm/boot/dts/stm32mp157c-ev1.dts
View File

@@ -14,16 +14,15 @@ / {
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &uart4;
serial1 = &usart3;
ethernet0 = &ethernet0;
};
chosen {
stdout-path = "serial0:115200n8";
};
clocks {
clk_ext_camera: clk-ext-camera {
#clock-cells = <0>;

2
arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
View File

@@ -73,7 +73,7 @@ led-3 {
};
panel: panel {
compatible = "edt,etm0700g0edh6", "simple-panel";
compatible = "edt,etm0700g0edh6";
backlight = <&backlight>;
enable-gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>;
power-supply = <&reg_3v3>;

10
arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
View File

@@ -62,11 +62,6 @@ retram: retram@38000000 {
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@d4000000 {
reg = <0xd4000000 0x4000000>;
no-map;
};
};
led {
@@ -80,11 +75,6 @@ led-blue {
};
};
&gpu {
contiguous-area = <&gpu_reserved>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;

15
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@@ -8,6 +8,12 @@
#include <dt-bindings/mfd/st,stpmic1.h>
/ {
aliases {
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart7;
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
@@ -53,11 +59,6 @@ retram: retram@38000000 {
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@d4000000 {
reg = <0xd4000000 0x4000000>;
no-map;
};
};
led {
@@ -151,10 +152,6 @@ phy0: ethernet-phy@0 {
};
};
&gpu {
contiguous-area = <&gpu_reserved>;
};
&hash1 {
status = "okay";
};

4
arch/arm/boot/dts/stm32mp15xx-osd32.dtsi
View File

@@ -210,8 +210,8 @@ &ipcc {
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
mbox-names = "vq0", "vq1", "shutdown", "detach";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";

1
arch/arm/mach-stm32/board-dt.c
View File

@@ -21,6 +21,7 @@ static const char *const stm32_compat[] __initconst = {
"st,stm32mp131",
"st,stm32mp133",
"st,stm32mp135",
"st,stm32mp151",
"st,stm32mp157",
NULL
};