mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-02 08:39:08 -04:00
drm/i915: Undo rmw damage to gen3 error interrupt handler
The gen2/gen3 irq code is supposed to be identical apart from the 32bit vs. 16bit access width. The recent change to intel_de_rmw() ruined that symmetry. Restore it to avoid needless mental gymnastics when comparing the two codepaths. And while at it remove the extra eir!=0 check that somehow ended up in the gen2 codepath only. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230125185234.21599-3-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
This commit is contained in:
@@ -3503,9 +3503,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
|
||||
u16 emr;
|
||||
|
||||
*eir = intel_uncore_read16(uncore, EIR);
|
||||
|
||||
if (*eir)
|
||||
intel_uncore_write16(uncore, EIR, *eir);
|
||||
intel_uncore_write16(uncore, EIR, *eir);
|
||||
|
||||
*eir_stuck = intel_uncore_read16(uncore, EIR);
|
||||
if (*eir_stuck == 0)
|
||||
@@ -3541,7 +3539,8 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
|
||||
{
|
||||
u32 emr;
|
||||
|
||||
*eir = intel_uncore_rmw(&dev_priv->uncore, EIR, 0, 0);
|
||||
*eir = intel_uncore_read(&dev_priv->uncore, EIR);
|
||||
intel_uncore_write(&dev_priv->uncore, EIR, *eir);
|
||||
|
||||
*eir_stuck = intel_uncore_read(&dev_priv->uncore, EIR);
|
||||
if (*eir_stuck == 0)
|
||||
@@ -3557,7 +3556,8 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
|
||||
* (or by a GPU reset) so we mask any bit that
|
||||
* remains set.
|
||||
*/
|
||||
emr = intel_uncore_rmw(&dev_priv->uncore, EMR, ~0, 0xffffffff);
|
||||
emr = intel_uncore_read(&dev_priv->uncore, EMR);
|
||||
intel_uncore_write(&dev_priv->uncore, EMR, 0xffffffff);
|
||||
intel_uncore_write(&dev_priv->uncore, EMR, emr | *eir_stuck);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user