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arm64: dts: microchip: lan969x: add QSPI nodes

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Add the required DT nodes for both QSPI controllers.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20260709112006.390742-6-robert.marko@sartura.hr
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
This commit is contained in:
Robert Marko
2026-07-09 13:19:11 +02:00
committed by Claudiu Beznea
parent dc59e4fea9
commit 8258a4bcfa
1 changed files with 33 additions and 0 deletions
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33
arch/arm64/boot/dts/microchip/lan9691.dtsi
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@@ -396,6 +396,39 @@ clks: clock-controller@e00c00b4 {
clock-names = "cpu", "ddr", "sys";
};
qspi0: spi@e0804000 {
compatible = "microchip,lan9691-qspi";
reg = <0xe0804000 0x00000100>,
<0x20000000 0x08000000>;
reg-names = "qspi_base", "qspi_mmap";
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&fabric_clk>, <&clks GCK_ID_QSPI0>;
clock-names = "pclk", "gclk";
assigned-clocks = <&clks GCK_ID_QSPI0>;
assigned-clock-rates = <100000000>;
dmas = <&dma AT91_XDMAC_DT_PERID(1)>,
<&dma AT91_XDMAC_DT_PERID(0)>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi2: spi@e0834000 {
compatible = "microchip,lan9691-qspi";
reg = <0xe0834000 0x00000100>,
<0x30000000 0x04000000>;
reg-names = "qspi_base", "qspi_mmap";
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&fabric_clk>, <&clks GCK_ID_QSPI2>;
clock-names = "pclk", "gclk";
assigned-clocks = <&clks GCK_ID_QSPI2>;
assigned-clock-rates = <100000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
reset: reset-controller@e201000c {
compatible = "microchip,lan9691-switch-reset",
"microchip,lan966x-switch-reset";