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drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection

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The spec says to use the CPU ISR registers for DP-alt/TBT HPD detection
on ADLP, so do that instead of using the related IOM/TCSS registers.

Bspec: 55480, 55482, 49212, 49305

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-23-imre.deak@intel.com
This commit is contained in:
Imre Deak
2023-03-23 16:20:28 +02:00
parent c55b73f391
commit 825535f44f
1 changed files with 9 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
drivers/gpu/drm/i915/display/intel_tc.c
View File

@@ -688,22 +688,19 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
{
struct drm_i915_private *i915 = tc_to_i915(tc);
struct intel_digital_port *dig_port = tc->dig_port;
enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
u32 val, mask = 0;
enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin];
u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin];
u32 cpu_isr;
u32 mask = 0;
/*
* On ADL-P HW/FW will wake from TCCOLD to complete the read access of
* registers in IOM. Note that this doesn't apply to PHY and FIA
* registers.
*/
val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
if (cpu_isr & (cpu_isr_bits & GEN11_DE_TC_HOTPLUG_MASK))
mask |= BIT(TC_PORT_DP_ALT);
if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
if (cpu_isr & (cpu_isr_bits & GEN11_DE_TBT_HOTPLUG_MASK))
mask |= BIT(TC_PORT_TBT_ALT);
if (intel_de_read(i915, SDEISR) & isr_bit)
if (intel_de_read(i915, SDEISR) & pch_isr_bit)
mask |= BIT(TC_PORT_LEGACY);
return mask;