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clk: qcom: ipq5332: fix the src parameter in ftbl_gcc_apss_axi_clk_src

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480MHz is derived from P_GPLL4_OUT_AUX not from P_GPLL4_OUT_MAIN. Update
the freq_tbl with the correct src.

Fixes: 3d89d52970 ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Reported-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230417044342.9406-1-quic_kathirav@quicinc.com
This commit is contained in:
Kathiravan T
2023-04-17 10:13:42 +05:30
committed by Bjorn Andersson
parent 63d56adf04
commit 81c1ef89a4
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/qcom/gcc-ipq5332.c
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@@ -366,7 +366,7 @@ static struct clk_rcg2 gcc_adss_pwm_clk_src = {
};
static const struct freq_tbl ftbl_gcc_apss_axi_clk_src[] = {
F(480000000, P_GPLL4_OUT_MAIN, 2.5, 0, 0),
F(480000000, P_GPLL4_OUT_AUX, 2.5, 0, 0),
F(533333333, P_GPLL0_OUT_MAIN, 1.5, 0, 0),
{ }
};