mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-09 12:33:18 -04:00
Code Issues Packages Projects Releases Wiki Activity

staging: comedi: ni_stc.h: remove unused GPCT register bit defines

Browse Source 
The bit defines in this header for the GPCT registers are not used. The ones
in ni_tio_internal.h are used instead. Remove them from this header.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
2015-05-01 14:59:50 -07:00
committed by Greg Kroah-Hartman
parent 549835c76a
commit 81bee07f95
1 changed files with 0 additions and 68 deletions
Download Patch File Download Diff File Expand all files Collapse all files

68
drivers/staging/comedi/drivers/ni_stc.h
View File

@@ -561,74 +561,6 @@
#define NISTC_AI_SI_SAVE_REG 64
#define NISTC_AI_SC_SAVE_REG 66
/* command register */
#define G_Disarm_Copy _bit15 /* strobe */
#define G_Save_Trace_Copy _bit14
#define G_Arm_Copy _bit13 /* strobe */
#define G_Bank_Switch_Start _bit10 /* strobe */
#define G_Little_Big_Endian _bit9
#define G_Synchronized_Gate _bit8
#define G_Write_Switch _bit7
#define G_Up_Down(a) (((a)&0x03)<<5)
#define G_Disarm _bit4 /* strobe */
#define G_Analog_Trigger_Reset _bit3 /* strobe */
#define G_Save_Trace _bit1
#define G_Arm _bit0 /* strobe */
/*channel agnostic names for the command register #defines */
#define G_Bank_Switch_Enable _bit12
#define G_Bank_Switch_Mode _bit11
#define G_Load _bit2 /* strobe */
/* input select register */
#define G_Gate_Select(a) (((a)&0x1f)<<7)
#define G_Source_Select(a) (((a)&0x1f)<<2)
#define G_Write_Acknowledges_Irq _bit1
#define G_Read_Acknowledges_Irq _bit0
/* same input select register, but with channel agnostic names */
#define G_Source_Polarity _bit15
#define G_Output_Polarity _bit14
#define G_OR_Gate _bit13
#define G_Gate_Select_Load_Source _bit12
/* mode register */
#define G_Loading_On_TC _bit12
#define G_Output_Mode(a) (((a)&0x03)<<8)
#define G_Trigger_Mode_For_Edge_Gate(a) (((a)&0x03)<<3)
#define G_Gating_Mode(a) (((a)&0x03)<<0)
/* same input mode register, but with channel agnostic names */
#define G_Load_Source_Select _bit7
#define G_Reload_Source_Switching _bit15
#define G_Loading_On_Gate _bit14
#define G_Gate_Polarity _bit13
#define G_Counting_Once(a) (((a)&0x03)<<10)
#define G_Stop_Mode(a) (((a)&0x03)<<5)
#define G_Gate_On_Both_Edges _bit2
/* G_Status_Register */
#define G1_Gate_Error_St _bit15
#define G0_Gate_Error_St _bit14
#define G1_TC_Error_St _bit13
#define G0_TC_Error_St _bit12
#define G1_No_Load_Between_Gates_St _bit11
#define G0_No_Load_Between_Gates_St _bit10
#define G1_Armed_St _bit9
#define G0_Armed_St _bit8
#define G1_Stale_Data_St _bit7
#define G0_Stale_Data_St _bit6
#define G1_Next_Load_Source_St _bit5
#define G0_Next_Load_Source_St _bit4
#define G1_Counting_St _bit3
#define G0_Counting_St _bit2
#define G1_Save_St _bit1
#define G0_Save_St _bit0
/* general purpose counter timer */
#define G_Autoincrement(a) ((a)<<0)
/* Additional windowed registers unique to E series */
/* 16 bit registers shadowed from DAQ-STC */