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arm64: dts: qcom: correct gpio-ranges for QCS615

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Correct the gpio-ranges for the QCS615 TLMM pin controller to include
GPIOs 0-122 and the UFS_RESET pin for primary UFS memory reset.

Fixes: 8e266654a2 ("arm64: dts: qcom: add QCS615 platform")
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241219-correct_gpio_ranges-v2-5-19af8588dbd0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Lijuan Gao
2024-12-19 15:59:47 +08:00
committed by Bjorn Andersson
parent 4bb53051c9
commit 80c8282732
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/qcom/qcs615.dtsi
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@@ -938,7 +938,7 @@ tlmm: pinctrl@3100000 {
"west",
"south";
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&tlmm 0 0 123>;
gpio-ranges = <&tlmm 0 0 124>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;