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drm/amd/display: refine code for dmcub inbox1 ring buffer debug

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[Why]
1. To watch dmcub inbox1 ring buffer cmd type without tools
2. dmub_cmd_PLAT_54186_wa 66 bytes

[How]
Added dmcub cmd type enum: unsigned char for debug use only,
also fixed 66 bytes issue by using unsigned int in bit
define instead of unsigned char.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Fudongwang <fudong.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Fudongwang
2024-01-17 19:13:46 +08:00
committed by Alex Deucher
parent f341055b10
commit 7fc0d111ba
2 changed files with 5 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/amd/display/dmub/dmub_srv.h
View File

@@ -78,10 +78,6 @@ struct dmub_srv_dcn31_regs;
struct dmcub_trace_buf_entry;
struct dmcub_inbox1_buf {
union dmub_rb_cmd cmd[DMUB_RB_MAX_ENTRY];
};
/* enum dmub_window_memory_type - memory location type specification for windows */
enum dmub_window_memory_type {
DMUB_WINDOW_MEMORY_TYPE_FB = 0,

10
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
View File

@@ -1265,11 +1265,11 @@ struct dmub_cmd_PLAT_54186_wa {
uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C; /**< reg value */
uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C; /**< reg value */
struct {
uint8_t hubp_inst : 4; /**< HUBP instance */
uint8_t tmz_surface : 1; /**< TMZ enable or disable */
uint8_t immediate :1; /**< Immediate flip */
uint8_t vmid : 4; /**< VMID */
uint8_t grph_stereo : 1; /**< 1 if stereo */
uint32_t hubp_inst : 4; /**< HUBP instance */
uint32_t tmz_surface : 1; /**< TMZ enable or disable */
uint32_t immediate :1; /**< Immediate flip */
uint32_t vmid : 4; /**< VMID */
uint32_t grph_stereo : 1; /**< 1 if stereo */
uint32_t reserved : 21; /**< Reserved */
} flip_params; /**< Pageflip parameters */
uint32_t reserved[9]; /**< Reserved bits */