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mtd: rawnand: qcom: embed nand_controller into qcom_nand_controller

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The qcom_nand_controller had a struct nand_controller *controller
pointer that was assigned to (struct nand_controller *)&nandc[1],
with the allocation oversized by sizeof(*controller) to make room.
get_qcom_nand_controller() then walked backwards from chip->controller
using sizeof()-based arithmetic to recover the enclosing nandc.

Embed the nand_controller directly into qcom_nand_controller and use
container_of() in get_qcom_nand_controller(). The header now needs
the full rawnand.h definition rather than a forward declaration.

Assisted-by: Claude:Opus-4.7
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Rosen Penev
2026-05-25 15:04:40 -07:00
committed by Miquel Raynal
parent 8e4531667d
commit 7fbdbc7d02
2 changed files with 9 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/mtd/nand/raw/qcom_nandc.c
View File

@@ -128,8 +128,8 @@ static struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
static struct qcom_nand_controller *
get_qcom_nand_controller(struct nand_chip *chip)
{
return (struct qcom_nand_controller *)
((u8 *)chip->controller - sizeof(struct qcom_nand_controller));
return container_of(chip->controller, struct qcom_nand_controller,
controller);
}
static u32 nandc_read(struct qcom_nand_controller *nandc, int offset)
@@ -2034,8 +2034,8 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
{
u32 nand_ctrl;
nand_controller_init(nandc->controller);
nandc->controller->ops = &qcom_nandc_ops;
nand_controller_init(&nandc->controller);
nandc->controller.ops = &qcom_nandc_ops;
/* kill onenand */
if (!nandc->props->nandc_part_of_qpic)
@@ -2175,7 +2175,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
chip->legacy.block_bad = qcom_nandc_block_bad;
chip->legacy.block_markbad = qcom_nandc_block_markbad;
chip->controller = nandc->controller;
chip->controller = &nandc->controller;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA |
NAND_SKIP_BBTSCAN;
@@ -2256,21 +2256,17 @@ static int qcom_nandc_parse_dt(struct platform_device *pdev)
static int qcom_nandc_probe(struct platform_device *pdev)
{
struct qcom_nand_controller *nandc;
struct nand_controller *controller;
const void *dev_data;
struct device *dev = &pdev->dev;
struct resource *res;
int ret;
nandc = devm_kzalloc(&pdev->dev, sizeof(*nandc) + sizeof(*controller),
GFP_KERNEL);
nandc = devm_kzalloc(&pdev->dev, sizeof(*nandc), GFP_KERNEL);
if (!nandc)
return -ENOMEM;
controller = (struct nand_controller *)&nandc[1];
platform_set_drvdata(pdev, nandc);
nandc->dev = dev;
nandc->controller = controller;
dev_data = of_device_get_match_data(dev);
if (!dev_data) {

4
include/linux/mtd/nand-qpic-common.h
View File

@@ -9,6 +9,8 @@
#ifndef __MTD_NAND_QPIC_COMMON_H__
#define __MTD_NAND_QPIC_COMMON_H__
#include <linux/mtd/rawnand.h>
/* NANDc reg offsets */
#define NAND_FLASH_CMD 0x00
#define NAND_ADDR0 0x04
@@ -394,7 +396,7 @@ struct qcom_nand_controller {
const struct qcom_nandc_props *props;
struct nand_controller *controller;
struct nand_controller controller;
struct qpic_spi_nand *qspi;
struct list_head host_list;