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riscv: dts: renesas: rzfive-smarc-som: Drop PHY interrupt support for ETH{0,1}

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IRQC support for RZ/Five is still missing so drop the interrupts and
interrupt-parent properties from the PHY nodes of ETH{0,1}.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230102222708.274369-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar
2023-01-02 22:27:08 +00:00
committed by Geert Uytterhoeven
parent 87d85b48f8
commit 7dd48e96d0
1 changed files with 10 additions and 0 deletions
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10
arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
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@@ -24,10 +24,20 @@ &dmac {
&eth0 {
status = "disabled";
phy0: ethernet-phy@7 {
/delete-property/ interrupt-parent;
/delete-property/ interrupts;
};
};
&eth1 {
status = "disabled";
phy1: ethernet-phy@7 {
/delete-property/ interrupt-parent;
/delete-property/ interrupts;
};
};
&sdhi0 {