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arm64: tegra: Use symbolic reset identifiers

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Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
2016-11-21 10:25:31 +01:00
parent c58f5f8848
commit 7bcf266462
1 changed files with 21 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

41
arch/arm64/boot/dts/nvidia/tegra186.dtsi
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@@ -2,6 +2,7 @@
#include <dt-bindings/gpio/tegra186-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/tegra186-hsp.h>
#include <dt-bindings/reset/tegra186-reset.h>
/ {
compatible = "nvidia,tegra186";
@@ -33,7 +34,7 @@ uarta: serial@3100000 {
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTA>;
clock-names = "serial";
resets = <&bpmp 47>;
resets = <&bpmp TEGRA186_RESET_UARTA>;
reset-names = "serial";
status = "disabled";
};
@@ -45,7 +46,7 @@ uartb: serial@3110000 {
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTB>;
clock-names = "serial";
resets = <&bpmp 48>;
resets = <&bpmp TEGRA186_RESET_UARTB>;
reset-names = "serial";
status = "disabled";
};
@@ -57,7 +58,7 @@ uartd: serial@3130000 {
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTD>;
clock-names = "serial";
resets = <&bpmp 50>;
resets = <&bpmp TEGRA186_RESET_UARTD>;
reset-names = "serial";
status = "disabled";
};
@@ -69,7 +70,7 @@ uarte: serial@3140000 {
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTE>;
clock-names = "serial";
resets = <&bpmp 132>;
resets = <&bpmp TEGRA186_RESET_UARTE>;
reset-names = "serial";
status = "disabled";
};
@@ -81,7 +82,7 @@ uartf: serial@3150000 {
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTF>;
clock-names = "serial";
resets = <&bpmp 111>;
resets = <&bpmp TEGRA186_RESET_UARTF>;
reset-names = "serial";
status = "disabled";
};
@@ -94,7 +95,7 @@ gen1_i2c: i2c@3160000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C1>;
clock-names = "div-clk";
resets = <&bpmp 19>;
resets = <&bpmp TEGRA186_RESET_I2C1>;
reset-names = "i2c";
status = "disabled";
};
@@ -107,7 +108,7 @@ cam_i2c: i2c@3180000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C3>;
clock-names = "div-clk";
resets = <&bpmp 21>;
resets = <&bpmp TEGRA186_RESET_I2C3>;
reset-names = "i2c";
status = "disabled";
};
@@ -121,7 +122,7 @@ dp_aux_ch1_i2c: i2c@3190000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C4>;
clock-names = "div-clk";
resets = <&bpmp 22>;
resets = <&bpmp TEGRA186_RESET_I2C4>;
reset-names = "i2c";
status = "disabled";
};
@@ -135,7 +136,7 @@ pwr_i2c: i2c@31a0000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C5>;
clock-names = "div-clk";
resets = <&bpmp 23>;
resets = <&bpmp TEGRA186_RESET_I2C5>;
reset-names = "i2c";
status = "disabled";
};
@@ -149,7 +150,7 @@ dp_aux_ch0_i2c: i2c@31b0000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C6>;
clock-names = "div-clk";
resets = <&bpmp 24>;
resets = <&bpmp TEGRA186_RESET_I2C6>;
reset-names = "i2c";
status = "disabled";
};
@@ -162,7 +163,7 @@ gen7_i2c: i2c@31c0000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C7>;
clock-names = "div-clk";
resets = <&bpmp 81>;
resets = <&bpmp TEGRA186_RESET_I2C7>;
reset-names = "i2c";
status = "disabled";
};
@@ -175,7 +176,7 @@ gen9_i2c: i2c@31e0000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C9>;
clock-names = "div-clk";
resets = <&bpmp 83>;
resets = <&bpmp TEGRA186_RESET_I2C9>;
reset-names = "i2c";
status = "disabled";
};
@@ -186,7 +187,7 @@ sdmmc1: sdhci@3400000 {
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
clock-names = "sdhci";
resets = <&bpmp 33>;
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
reset-names = "sdhci";
status = "disabled";
};
@@ -197,7 +198,7 @@ sdmmc2: sdhci@3420000 {
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
clock-names = "sdhci";
resets = <&bpmp 34>;
resets = <&bpmp TEGRA186_RESET_SDMMC2>;
reset-names = "sdhci";
status = "disabled";
};
@@ -208,7 +209,7 @@ sdmmc3: sdhci@3440000 {
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
clock-names = "sdhci";
resets = <&bpmp 35>;
resets = <&bpmp TEGRA186_RESET_SDMMC3>;
reset-names = "sdhci";
status = "disabled";
};
@@ -219,7 +220,7 @@ sdmmc4: sdhci@3460000 {
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
clock-names = "sdhci";
resets = <&bpmp 36>;
resets = <&bpmp TEGRA186_RESET_SDMMC4>;
reset-names = "sdhci";
status = "disabled";
};
@@ -252,7 +253,7 @@ gen2_i2c: i2c@c240000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C2>;
clock-names = "div-clk";
resets = <&bpmp 20>;
resets = <&bpmp TEGRA186_RESET_I2C2>;
reset-names = "i2c";
status = "disabled";
};
@@ -265,7 +266,7 @@ gen8_i2c: i2c@c250000 {
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C8>;
clock-names = "div-clk";
resets = <&bpmp 82>;
resets = <&bpmp TEGRA186_RESET_I2C8>;
reset-names = "i2c";
status = "disabled";
};
@@ -277,7 +278,7 @@ uartc: serial@c280000 {
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTC>;
clock-names = "serial";
resets = <&bpmp 49>;
resets = <&bpmp TEGRA186_RESET_UARTC>;
reset-names = "serial";
status = "disabled";
};
@@ -289,7 +290,7 @@ uartg: serial@c290000 {
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTG>;
clock-names = "serial";
resets = <&bpmp 112>;
resets = <&bpmp TEGRA186_RESET_UARTG>;
reset-names = "serial";
status = "disabled";
};