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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-16 12:31:52 -04:00
usb: cdnsp: Add support for device-only configuration
This patch introduces support for operating the Cadence USBSSP (cdnsp) controller in a peripheral-only mode, bypassing the Dual-Role Device (DRD) logic. The change in BAR indexing (from BAR 2 to BAR 1) is a direct consequence of switching from 64-bit to 32-bit addressing in the Peripheral-only configuration. Tested on PCI platform with Device-only configuration. Platform-side changes are included to support the PCI glue layer's property injection. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> # pci_ids.h Link: https://patch.msgid.link/20260331-device_only-v1-1-00378b80365c@cadence.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
3c7df5079c
commit
7b7f2dd913
@@ -75,6 +75,7 @@ static int cdns3_plat_probe(struct platform_device *pdev)
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if (cdns->pdata && cdns->pdata->override_apb_timeout)
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cdns->override_apb_timeout = cdns->pdata->override_apb_timeout;
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cdns->no_drd = device_property_read_bool(dev, "no_drd");
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platform_set_drvdata(pdev, cdns);
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ret = platform_get_irq_byname(pdev, "host");
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@@ -107,21 +108,23 @@ static int cdns3_plat_probe(struct platform_device *pdev)
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cdns->dev_regs = regs;
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cdns->otg_irq = platform_get_irq_byname(pdev, "otg");
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if (cdns->otg_irq < 0)
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return dev_err_probe(dev, cdns->otg_irq,
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"Failed to get otg IRQ\n");
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if (!cdns->no_drd) {
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cdns->otg_irq = platform_get_irq_byname(pdev, "otg");
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if (cdns->otg_irq < 0)
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return dev_err_probe(dev, cdns->otg_irq,
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"Failed to get otg IRQ\n");
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "otg");
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if (!res) {
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dev_err(dev, "couldn't get otg resource\n");
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return -ENXIO;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "otg");
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if (!res) {
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dev_err(dev, "couldn't get otg resource\n");
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return -ENXIO;
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}
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cdns->otg_res = *res;
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}
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cdns->phyrst_a_enable = device_property_read_bool(dev, "cdns,phyrst-a-enable");
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cdns->otg_res = *res;
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cdns->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup");
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if (cdns->wakeup_irq == -EPROBE_DEFER)
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return cdns->wakeup_irq;
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@@ -158,6 +161,7 @@ static int cdns3_plat_probe(struct platform_device *pdev)
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goto err_cdns_init;
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cdns->gadget_init = cdns3_plat_gadget_init;
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ret = cdns_core_init_role(cdns);
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if (ret)
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goto err_cdns_init;
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@@ -19,6 +19,7 @@
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struct cdnsp_wrap {
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struct platform_device *plat_dev;
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struct property_entry prop[3];
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struct resource dev_res[6];
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int devfn;
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};
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@@ -29,10 +30,15 @@ struct cdnsp_wrap {
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#define RES_HOST_ID 3
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#define RES_DEV_ID 4
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#define RES_DRD_ID 5
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/* DRD PCI configuration - 64-bit addressing */
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/* First PCI function */
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#define PCI_BAR_HOST 0
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#define PCI_BAR_OTG 0
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#define PCI_BAR_DEV 2
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/* Second PCI function */
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#define PCI_BAR_OTG 0
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/* Device only PCI configuration - 32-bit addressing */
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/* First PCI function */
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#define PCI_BAR_ONLY_DEV 1
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#define PCI_DEV_FN_HOST_DEVICE 0
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#define PCI_DEV_FN_OTG 1
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@@ -65,6 +71,7 @@ static int cdnsp_pci_probe(struct pci_dev *pdev,
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struct cdnsp_wrap *wrap;
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struct resource *res;
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struct pci_dev *func;
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bool no_drd = false;
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int ret = 0;
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/*
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@@ -75,11 +82,14 @@ static int cdnsp_pci_probe(struct pci_dev *pdev,
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pdev->devfn != PCI_DEV_FN_OTG))
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return -EINVAL;
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if (pdev->device == PCI_DEVICE_ID_CDNS_UDC_USBSSP)
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no_drd = true;
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func = cdnsp_get_second_fun(pdev);
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if (!func)
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if (!func && !no_drd)
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return -EINVAL;
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if (func->class == PCI_CLASS_SERIAL_USB_XHCI ||
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if ((func && func->class == PCI_CLASS_SERIAL_USB_XHCI) ||
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pdev->class == PCI_CLASS_SERIAL_USB_XHCI) {
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ret = -EINVAL;
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goto put_pci;
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@@ -93,7 +103,7 @@ static int cdnsp_pci_probe(struct pci_dev *pdev,
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pci_set_master(pdev);
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if (pci_is_enabled(func)) {
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if (func && pci_is_enabled(func)) {
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wrap = pci_get_drvdata(func);
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} else {
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wrap = kzalloc_obj(*wrap);
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@@ -106,10 +116,13 @@ static int cdnsp_pci_probe(struct pci_dev *pdev,
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res = wrap->dev_res;
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if (pdev->devfn == PCI_DEV_FN_HOST_DEVICE) {
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int bar_dev = no_drd ? PCI_BAR_ONLY_DEV : PCI_BAR_DEV;
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/* Function 0: host(BAR_0) + device(BAR_2). */
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dev_dbg(&pdev->dev, "Initialize Device resources\n");
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res[RES_DEV_ID].start = pci_resource_start(pdev, PCI_BAR_DEV);
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res[RES_DEV_ID].end = pci_resource_end(pdev, PCI_BAR_DEV);
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res[RES_DEV_ID].start = pci_resource_start(pdev, bar_dev);
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res[RES_DEV_ID].end = pci_resource_end(pdev, bar_dev);
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res[RES_DEV_ID].name = "dev";
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res[RES_DEV_ID].flags = IORESOURCE_MEM;
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dev_dbg(&pdev->dev, "USBSSP-DEV physical base addr: %pa\n",
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@@ -145,9 +158,20 @@ static int cdnsp_pci_probe(struct pci_dev *pdev,
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wrap->dev_res[RES_IRQ_OTG_ID].flags = IORESOURCE_IRQ;
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}
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if (pci_is_enabled(func)) {
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if (no_drd || pci_is_enabled(func)) {
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u8 idx = 0;
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/* set up platform device info */
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pdata.override_apb_timeout = CHICKEN_APB_TIMEOUT_VALUE;
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if (no_drd) {
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wrap->prop[idx++] = PROPERTY_ENTRY_STRING("dr_mode", "peripheral");
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wrap->prop[idx++] = PROPERTY_ENTRY_BOOL("no_drd");
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} else {
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wrap->prop[idx++] = PROPERTY_ENTRY_STRING("dr_mode", "otg");
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wrap->prop[idx++] = PROPERTY_ENTRY_BOOL("usb-role-switch");
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}
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wrap->prop[idx] = (struct property_entry){ };
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memset(&plat_info, 0, sizeof(plat_info));
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plat_info.parent = &pdev->dev;
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plat_info.fwnode = pdev->dev.fwnode;
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@@ -158,6 +182,7 @@ static int cdnsp_pci_probe(struct pci_dev *pdev,
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plat_info.dma_mask = pdev->dma_mask;
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plat_info.data = &pdata;
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plat_info.size_data = sizeof(pdata);
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plat_info.properties = wrap->prop;
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wrap->devfn = pdev->devfn;
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/* register platform device */
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wrap->plat_dev = platform_device_register_full(&plat_info);
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@@ -185,13 +210,17 @@ static void cdnsp_pci_remove(struct pci_dev *pdev)
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if (wrap->devfn == pdev->devfn)
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platform_device_unregister(wrap->plat_dev);
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if (!pci_is_enabled(func))
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if (!func || !pci_is_enabled(func))
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kfree(wrap);
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pci_dev_put(func);
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}
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static const struct pci_device_id cdnsp_pci_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_CDNS, PCI_DEVICE_ID_CDNS_UDC_USBSSP),
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.class = PCI_CLASS_SERIAL_USB_DEVICE },
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{ PCI_DEVICE(PCI_VENDOR_ID_CDNS, PCI_DEVICE_ID_CDNS_UDC_USBSSP),
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.class = PCI_CLASS_SERIAL_USB_CDNS },
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{ PCI_DEVICE(PCI_VENDOR_ID_CDNS, PCI_DEVICE_ID_CDNS_USBSSP),
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.class = PCI_CLASS_SERIAL_USB_DEVICE },
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{ PCI_DEVICE(PCI_VENDOR_ID_CDNS, PCI_DEVICE_ID_CDNS_USBSSP),
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@@ -71,7 +71,8 @@ static void cdns_role_stop(struct cdns *cdns)
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static void cdns_exit_roles(struct cdns *cdns)
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{
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cdns_role_stop(cdns);
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cdns_drd_exit(cdns);
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if (!cdns->no_drd)
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cdns_drd_exit(cdns);
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}
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/**
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@@ -80,9 +80,11 @@ struct cdns3_platform_data {
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* @pdata: platform data from glue layer
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* @lock: spinlock structure
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* @xhci_plat_data: xhci private data structure pointer
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* @gadget_init: pointer to gadget initialization function
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* @override_apb_timeout: hold value of APB timeout. For value 0 the default
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* value in CHICKEN_BITS_3 will be preserved.
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* @gadget_init: pointer to gadget initialization function
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* @no_drd: DRD register block is inaccessible - driver handles only
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* device mode.
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*/
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struct cdns {
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struct device *dev;
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@@ -122,6 +124,7 @@ struct cdns {
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struct xhci_plat_priv *xhci_plat_data;
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int (*gadget_init)(struct cdns *cdns);
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u32 override_apb_timeout;
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bool no_drd;
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};
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int cdns_hw_role_switch(struct cdns *cdns);
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@@ -107,7 +107,7 @@ void cdns_clear_vbus(struct cdns *cdns)
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{
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u32 reg;
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if (cdns->version != CDNSP_CONTROLLER_V2)
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if (cdns->version != CDNSP_CONTROLLER_V2 || cdns->no_drd)
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return;
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reg = readl(&cdns->otg_cdnsp_regs->override);
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@@ -120,7 +120,7 @@ void cdns_set_vbus(struct cdns *cdns)
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{
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u32 reg;
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if (cdns->version != CDNSP_CONTROLLER_V2)
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if (cdns->version != CDNSP_CONTROLLER_V2 || cdns->no_drd)
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return;
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reg = readl(&cdns->otg_cdnsp_regs->override);
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@@ -234,6 +234,9 @@ int cdns_drd_gadget_on(struct cdns *cdns)
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u32 ready_bit;
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int ret, val;
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if (cdns->no_drd)
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return 0;
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/* switch OTG core */
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writel(OTGCMD_DEV_BUS_REQ | reg, &cdns->otg_regs->cmd);
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@@ -265,6 +268,9 @@ void cdns_drd_gadget_off(struct cdns *cdns)
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{
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u32 val;
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if (cdns->no_drd)
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return;
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/*
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* Driver should wait at least 10us after disabling Device
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* before turning-off Device (DEV_BUS_DROP).
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@@ -392,6 +398,12 @@ int cdns_drd_init(struct cdns *cdns)
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u32 state, reg;
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int ret;
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if (cdns->no_drd) {
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cdns->version = CDNSP_CONTROLLER_V2;
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cdns->dr_mode = USB_DR_MODE_PERIPHERAL;
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return 0;
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}
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regs = devm_ioremap_resource(cdns->dev, &cdns->otg_res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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@@ -2424,6 +2424,7 @@
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#define PCI_DEVICE_ID_CDNS_USBSS 0x0100
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#define PCI_DEVICE_ID_CDNS_USB 0x0120
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#define PCI_DEVICE_ID_CDNS_USBSSP 0x0200
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#define PCI_DEVICE_ID_CDNS_UDC_USBSSP 0x0400
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#define PCI_VENDOR_ID_ARECA 0x17d3
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#define PCI_DEVICE_ID_ARECA_1110 0x1110
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