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drm/amd/display: update dig enable sequence
[why] HW delta follow up Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
f5442b35e6
commit
7b1b3f5818
@@ -274,10 +274,10 @@ static bool is_dp_dig_pixel_rate_div_policy(struct dc *dc, const struct dc_crtc_
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dc->debug.enable_dp_dig_pixel_rate_div_policy;
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}
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static void enc32_stream_encoder_dp_unblank(
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struct dc_link *link,
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struct stream_encoder *enc,
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const struct encoder_unblank_param *param)
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void enc32_stream_encoder_dp_unblank(
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struct dc_link *link,
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struct stream_encoder *enc,
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const struct encoder_unblank_param *param)
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{
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struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
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struct dc *dc = enc->ctx->dc;
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@@ -440,7 +440,7 @@ static void enc32_reset_fifo(struct stream_encoder *enc, bool reset)
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udelay(10);
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}
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static void enc32_enable_fifo(struct stream_encoder *enc)
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void enc32_enable_fifo(struct stream_encoder *enc)
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{
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struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
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@@ -194,4 +194,12 @@ void dcn32_dio_stream_encoder_construct(
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const struct dcn10_stream_encoder_shift *se_shift,
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const struct dcn10_stream_encoder_mask *se_mask);
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void enc32_enable_fifo(struct stream_encoder *enc);
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void enc32_stream_encoder_dp_unblank(
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struct dc_link *link,
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struct stream_encoder *enc,
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const struct encoder_unblank_param *param);
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#endif /* __DC_DIO_STREAM_ENCODER_DCN32_H__ */
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@@ -2477,11 +2477,12 @@ void link_set_dpms_on(
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* from transmitter control.
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*/
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if (!(dc_is_virtual_signal(pipe_ctx->stream->signal) ||
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dp_is_128b_132b_signal(pipe_ctx)))
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if (link_enc)
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link_enc->funcs->setup(
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link_enc,
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pipe_ctx->stream->signal);
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dp_is_128b_132b_signal(pipe_ctx))) {
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if (link_enc)
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link_enc->funcs->setup(
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link_enc,
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pipe_ctx->stream->signal);
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}
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dc->hwss.enable_stream(pipe_ctx);
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