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arm64: tegra: Sort nodes by unit-address, then alphabetically

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Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.

These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").

While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
2022-11-22 11:25:05 +01:00
parent 2838cfddbc
commit 79ed18d9ec
22 changed files with 6652 additions and 6646 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
View File

@@ -1030,6 +1030,14 @@ clk32k_in: clock-32k {
gpio-keys {
compatible = "gpio-keys";
key-power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
wakeup-source;
};
switch-lid {
label = "Lid";
gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
@@ -1038,14 +1046,6 @@ switch-lid {
debounce-interval = <1>;
wakeup-source;
};
key-power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
wakeup-source;
};
};
panel: panel {

232
arch/arm64/boot/dts/nvidia/tegra132.dtsi
View File

@@ -893,122 +893,6 @@ throttle_heavy: heavy {
};
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
trips {
cpu_shutdown_trip {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <102000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
mem-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
trips {
mem_shutdown_trip {
temperature = <101000>;
hysteresis = <1000>;
type = "critical";
};
mem_throttle_trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
gpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
trips {
gpu_shutdown_trip {
temperature = <101000>;
hysteresis = <1000>;
type = "critical";
};
gpu_throttle_trip: throttle-trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&gpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
pllx-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
trips {
pllx_shutdown_trip {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
pllx_throttle_trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
};
ahub@70300000 {
compatible = "nvidia,tegra124-ahub";
reg = <0x0 0x70300000 0x0 0x200>,
@@ -1255,6 +1139,122 @@ cpu@1 {
};
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
trips {
cpu_shutdown_trip {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <102000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
mem-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
trips {
mem_shutdown_trip {
temperature = <101000>;
hysteresis = <1000>;
type = "critical";
};
mem_throttle_trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
gpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
trips {
gpu_shutdown_trip {
temperature = <101000>;
hysteresis = <1000>;
type = "critical";
};
gpu_throttle_trip: throttle-trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&gpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
pllx-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
trips {
pllx_shutdown_trip {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
pllx_throttle_trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13

2560
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
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File diff suppressed because it is too large Load Diff

86
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
View File

@@ -190,32 +190,6 @@ pmc@c360000 {
nvidia,invert-interrupt;
};
cpus {
cpu@0 {
enable-method = "psci";
};
cpu@1 {
enable-method = "psci";
};
cpu@2 {
enable-method = "psci";
};
cpu@3 {
enable-method = "psci";
};
cpu@4 {
enable-method = "psci";
};
cpu@5 {
enable-method = "psci";
};
};
bpmp {
i2c {
status = "okay";
@@ -235,6 +209,23 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
max77620_default: pinmux {
gpio0 {
pins = "gpio0";
@@ -284,23 +275,6 @@ gpio7 {
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;
@@ -387,6 +361,32 @@ vdd_pex: ldo8 {
};
};
cpus {
cpu@0 {
enable-method = "psci";
};
cpu@1 {
enable-method = "psci";
};
cpu@2 {
enable-method = "psci";
};
cpu@3 {
enable-method = "psci";
};
cpu@4 {
enable-method = "psci";
};
cpu@5 {
enable-method = "psci";
};
};
psci {
compatible = "arm,psci-1.0";
status = "okay";

1176
arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts
View File

File diff suppressed because it is too large Load Diff

518
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@@ -129,62 +129,6 @@ aconnect@2900000 {
ranges = <0x02900000 0x0 0x02900000 0x200000>;
status = "disabled";
adma: dma-controller@2930000 {
compatible = "nvidia,tegra186-adma";
reg = <0x02930000 0x20000>;
interrupt-parent = <&agic>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&bpmp TEGRA186_CLK_AHUB>;
clock-names = "d_audio";
status = "disabled";
};
agic: interrupt-controller@2a40000 {
compatible = "nvidia,tegra186-agic",
"nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x02a41000 0x1000>,
<0x02a42000 0x2000>;
interrupts = <GIC_SPI 145
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&bpmp TEGRA186_CLK_APE>;
clock-names = "clk";
status = "disabled";
};
tegra_ahub: ahub@2900800 {
compatible = "nvidia,tegra186-ahub";
reg = <0x02900800 0x800>;
@@ -197,52 +141,6 @@ tegra_ahub: ahub@2900800 {
ranges = <0x02900800 0x02900800 0x11800>;
status = "disabled";
tegra_admaif: admaif@290f000 {
compatible = "nvidia,tegra186-admaif";
reg = <0x0290f000 0x1000>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>,
<&adma 11>, <&adma 11>,
<&adma 12>, <&adma 12>,
<&adma 13>, <&adma 13>,
<&adma 14>, <&adma 14>,
<&adma 15>, <&adma 15>,
<&adma 16>, <&adma 16>,
<&adma 17>, <&adma 17>,
<&adma 18>, <&adma 18>,
<&adma 19>, <&adma 19>,
<&adma 20>, <&adma 20>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10",
"rx11", "tx11",
"rx12", "tx12",
"rx13", "tx13",
"rx14", "tx14",
"rx15", "tx15",
"rx16", "tx16",
"rx17", "tx17",
"rx18", "tx18",
"rx19", "tx19",
"rx20", "tx20";
status = "disabled";
};
tegra_i2s1: i2s@2901000 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
@@ -327,6 +225,102 @@ tegra_i2s6: i2s@2901500 {
status = "disabled";
};
tegra_sfc1: sfc@2902000 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902000 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
tegra_sfc2: sfc@2902200 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902200 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
tegra_sfc3: sfc@2902400 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902400 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
tegra_sfc4: sfc@2902600 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902600 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
tegra_amx1: amx@2903000 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903000 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
tegra_amx2: amx@2903100 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903100 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
tegra_amx3: amx@2903200 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903200 0x100>;
sound-name-prefix = "AMX3";
status = "disabled";
};
tegra_amx4: amx@2903300 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903300 0x100>;
sound-name-prefix = "AMX4";
status = "disabled";
};
tegra_adx1: adx@2903800 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903800 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
tegra_adx2: adx@2903900 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903900 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
tegra_adx3: adx@2903a00 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903a00 0x100>;
sound-name-prefix = "ADX3";
status = "disabled";
};
tegra_adx4: adx@2903b00 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903b00 0x100>;
sound-name-prefix = "ADX4";
status = "disabled";
};
tegra_dmic1: dmic@2904000 {
compatible = "nvidia,tegra210-dmic";
reg = <0x2904000 0x100>;
@@ -399,118 +393,6 @@ tegra_dspk2: dspk@2905100 {
status = "disabled";
};
tegra_sfc1: sfc@2902000 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902000 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
tegra_sfc2: sfc@2902200 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902200 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
tegra_sfc3: sfc@2902400 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902400 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
tegra_sfc4: sfc@2902600 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
reg = <0x2902600 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
tegra_mvc1: mvc@290a000 {
compatible = "nvidia,tegra186-mvc",
"nvidia,tegra210-mvc";
reg = <0x290a000 0x200>;
sound-name-prefix = "MVC1";
status = "disabled";
};
tegra_mvc2: mvc@290a200 {
compatible = "nvidia,tegra186-mvc",
"nvidia,tegra210-mvc";
reg = <0x290a200 0x200>;
sound-name-prefix = "MVC2";
status = "disabled";
};
tegra_amx1: amx@2903000 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903000 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
tegra_amx2: amx@2903100 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903100 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
tegra_amx3: amx@2903200 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903200 0x100>;
sound-name-prefix = "AMX3";
status = "disabled";
};
tegra_amx4: amx@2903300 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
reg = <0x2903300 0x100>;
sound-name-prefix = "AMX4";
status = "disabled";
};
tegra_adx1: adx@2903800 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903800 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
tegra_adx2: adx@2903900 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903900 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
tegra_adx3: adx@2903a00 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903a00 0x100>;
sound-name-prefix = "ADX3";
status = "disabled";
};
tegra_adx4: adx@2903b00 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
reg = <0x2903b00 0x100>;
sound-name-prefix = "ADX4";
status = "disabled";
};
tegra_ope1: processing-engine@2908000 {
compatible = "nvidia,tegra186-ope",
"nvidia,tegra210-ope";
@@ -534,6 +416,22 @@ dynamic-range-compressor@2908200 {
};
};
tegra_mvc1: mvc@290a000 {
compatible = "nvidia,tegra186-mvc",
"nvidia,tegra210-mvc";
reg = <0x290a000 0x200>;
sound-name-prefix = "MVC1";
status = "disabled";
};
tegra_mvc2: mvc@290a200 {
compatible = "nvidia,tegra186-mvc",
"nvidia,tegra210-mvc";
reg = <0x290a200 0x200>;
sound-name-prefix = "MVC2";
status = "disabled";
};
tegra_amixer: amixer@290bb00 {
compatible = "nvidia,tegra186-amixer",
"nvidia,tegra210-amixer";
@@ -542,6 +440,52 @@ tegra_amixer: amixer@290bb00 {
status = "disabled";
};
tegra_admaif: admaif@290f000 {
compatible = "nvidia,tegra186-admaif";
reg = <0x0290f000 0x1000>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>,
<&adma 11>, <&adma 11>,
<&adma 12>, <&adma 12>,
<&adma 13>, <&adma 13>,
<&adma 14>, <&adma 14>,
<&adma 15>, <&adma 15>,
<&adma 16>, <&adma 16>,
<&adma 17>, <&adma 17>,
<&adma 18>, <&adma 18>,
<&adma 19>, <&adma 19>,
<&adma 20>, <&adma 20>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10",
"rx11", "tx11",
"rx12", "tx12",
"rx13", "tx13",
"rx14", "tx14",
"rx15", "tx15",
"rx16", "tx16",
"rx17", "tx17",
"rx18", "tx18",
"rx19", "tx19",
"rx20", "tx20";
status = "disabled";
};
tegra_asrc: asrc@2910000 {
compatible = "nvidia,tegra186-asrc";
reg = <0x2910000 0x2000>;
@@ -549,6 +493,62 @@ tegra_asrc: asrc@2910000 {
status = "disabled";
};
};
adma: dma-controller@2930000 {
compatible = "nvidia,tegra186-adma";
reg = <0x02930000 0x20000>;
interrupt-parent = <&agic>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&bpmp TEGRA186_CLK_AHUB>;
clock-names = "d_audio";
status = "disabled";
};
agic: interrupt-controller@2a40000 {
compatible = "nvidia,tegra186-agic",
"nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x02a41000 0x1000>,
<0x02a42000 0x2000>;
interrupts = <GIC_SPI 145
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&bpmp TEGRA186_CLK_APE>;
clock-names = "clk";
status = "disabled";
};
};
mc: memory-controller@2c00000 {
@@ -970,6 +970,34 @@ sdmmc4: mmc@3460000 {
status = "disabled";
};
sata@3507000 {
compatible = "nvidia,tegra186-ahci";
reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
<0x0 0x03500000 0x0 0x00007000>, /* SATA */
<0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SATA>;
clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
clock-names = "sata", "sata-oob";
assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
<&bpmp TEGRA186_CLK_PLLP>;
assigned-clock-rates = <102000000>,
<204000000>;
resets = <&bpmp TEGRA186_RESET_SATA>,
<&bpmp TEGRA186_RESET_SATACOLD>;
reset-names = "sata", "sata-cold";
status = "disabled";
};
hda@3510000 {
compatible = "nvidia,tegra186-hda", "nvidia,tegra30-hda";
reg = <0x0 0x03510000 0x0 0x10000>;
@@ -1286,18 +1314,13 @@ pmc: pmc@c360000 {
#interrupt-cells = <2>;
interrupt-controller;
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
sdmmc1_1v8: sdmmc1-1v8 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc2_3v3: sdmmc2-3v3 {
pins = "sdmmc2-hv";
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
@@ -1306,8 +1329,8 @@ sdmmc2_1v8: sdmmc2-1v8 {
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3-hv";
sdmmc2_3v3: sdmmc2-3v3 {
pins = "sdmmc2-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
@@ -1315,6 +1338,11 @@ sdmmc3_1v8: sdmmc3-1v8 {
pins = "sdmmc3-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
};
ccplex@e000000 {
@@ -1894,34 +1922,6 @@ cpu_bpmp_rx: sram@4f000 {
};
};
sata@3507000 {
compatible = "nvidia,tegra186-ahci";
reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
<0x0 0x03500000 0x0 0x00007000>, /* SATA */
<0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
<&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SATA>;
clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
clock-names = "sata", "sata-oob";
assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
<&bpmp TEGRA186_CLK_SATA_OOB>;
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
<&bpmp TEGRA186_CLK_PLLP>;
assigned-clock-rates = <102000000>,
<204000000>;
resets = <&bpmp TEGRA186_RESET_SATA>,
<&bpmp TEGRA186_RESET_SATACOLD>;
reset-names = "sata", "sata-cold";
status = "disabled";
};
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
@@ -2052,14 +2052,7 @@ L2_A57: l2-cache1 {
};
};
pmu_denver {
compatible = "nvidia,denver-pmu";
interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&denver_0 &denver_1>;
};
pmu_a57 {
pmu-a57 {
compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
@@ -2068,6 +2061,13 @@ pmu_a57 {
interrupt-affinity = <&ca57_0 &ca57_1 &ca57_2 &ca57_3>;
};
pmu-denver {
compatible = "nvidia,denver-pmu";
interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&denver_0 &denver_1>;
};
sound {
status = "disabled";

36
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
View File

@@ -147,6 +147,24 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max20024_default>;
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
max20024_default: pinmux {
gpio0 {
pins = "gpio0";
@@ -190,24 +208,6 @@ gpio7 {
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;

2242
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
View File

File diff suppressed because it is too large Load Diff

2395
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi
View File

File diff suppressed because it is too large Load Diff

36
arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi
View File

@@ -121,6 +121,24 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max20024_default>;
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
max20024_default: pinmux {
gpio0 {
pins = "gpio0";
@@ -164,24 +182,6 @@ gpio7 {
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;

547
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@@ -111,6 +111,34 @@ axi2apb: axi2apb@2390000 {
status = "okay";
};
pinmux: pinmux@2430000 {
compatible = "nvidia,tegra194-pinmux";
reg = <0x0 0x2430000 0x0 0x17000>;
status = "okay";
pex_clkreq_c5_bi_dir_state: pinmux-pex-clkreq-c5-bi-dir {
clkreq {
nvidia,pins = "pex_l5_clkreq_n_pgg0";
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
};
pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
pex_rst {
nvidia,pins = "pex_l5_rst_n_pgg1";
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
};
};
ethernet@2490000 {
compatible = "nvidia,tegra194-eqos",
"nvidia,tegra186-eqos",
@@ -196,64 +224,6 @@ aconnect@2900000 {
#size-cells = <2>;
ranges = <0x0 0x02900000 0x0 0x02900000 0x0 0x200000>;
adma: dma-controller@2930000 {
compatible = "nvidia,tegra194-adma",
"nvidia,tegra186-adma";
reg = <0x0 0x02930000 0x0 0x20000>;
interrupt-parent = <&agic>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&bpmp TEGRA194_CLK_AHUB>;
clock-names = "d_audio";
status = "disabled";
};
agic: interrupt-controller@2a40000 {
compatible = "nvidia,tegra194-agic",
"nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x02a41000 0x0 0x1000>,
<0x0 0x02a42000 0x0 0x2000>;
interrupts = <GIC_SPI 145
(GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&bpmp TEGRA194_CLK_APE>;
clock-names = "clk";
status = "disabled";
};
tegra_ahub: ahub@2900800 {
compatible = "nvidia,tegra194-ahub",
"nvidia,tegra186-ahub";
@@ -268,57 +238,6 @@ tegra_ahub: ahub@2900800 {
#size-cells = <2>;
ranges = <0x0 0x02900800 0x0 0x02900800 0x0 0x11800>;
tegra_admaif: admaif@290f000 {
compatible = "nvidia,tegra194-admaif",
"nvidia,tegra186-admaif";
reg = <0x0 0x0290f000 0x0 0x1000>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>,
<&adma 11>, <&adma 11>,
<&adma 12>, <&adma 12>,
<&adma 13>, <&adma 13>,
<&adma 14>, <&adma 14>,
<&adma 15>, <&adma 15>,
<&adma 16>, <&adma 16>,
<&adma 17>, <&adma 17>,
<&adma 18>, <&adma 18>,
<&adma 19>, <&adma 19>,
<&adma 20>, <&adma 20>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10",
"rx11", "tx11",
"rx12", "tx12",
"rx13", "tx13",
"rx14", "tx14",
"rx15", "tx15",
"rx16", "tx16",
"rx17", "tx17",
"rx18", "tx18",
"rx19", "tx19",
"rx20", "tx20";
status = "disabled";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_APEDMAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA194_SID_APE>;
};
tegra_i2s1: i2s@2901000 {
compatible = "nvidia,tegra194-i2s",
"nvidia,tegra210-i2s";
@@ -403,6 +322,98 @@ tegra_i2s6: i2s@2901500 {
status = "disabled";
};
tegra_sfc1: sfc@2902000 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902000 0x0 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
tegra_sfc2: sfc@2902200 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902200 0x0 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
tegra_sfc3: sfc@2902400 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902400 0x0 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
tegra_sfc4: sfc@2902600 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902600 0x0 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
tegra_amx1: amx@2903000 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903000 0x0 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
tegra_amx2: amx@2903100 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903100 0x0 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
tegra_amx3: amx@2903200 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903200 0x0 0x100>;
sound-name-prefix = "AMX3";
status = "disabled";
};
tegra_amx4: amx@2903300 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903300 0x0 0x100>;
sound-name-prefix = "AMX4";
status = "disabled";
};
tegra_adx1: adx@2903800 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903800 0x0 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
tegra_adx2: adx@2903900 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903900 0x0 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
tegra_adx3: adx@2903a00 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903a00 0x0 0x100>;
sound-name-prefix = "ADX3";
status = "disabled";
};
tegra_adx4: adx@2903b00 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903b00 0x0 0x100>;
sound-name-prefix = "ADX4";
status = "disabled";
};
tegra_dmic1: dmic@2904000 {
compatible = "nvidia,tegra194-dmic",
"nvidia,tegra210-dmic";
@@ -481,114 +492,6 @@ tegra_dspk2: dspk@2905100 {
status = "disabled";
};
tegra_sfc1: sfc@2902000 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902000 0x0 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
tegra_sfc2: sfc@2902200 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902200 0x0 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
tegra_sfc3: sfc@2902400 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902400 0x0 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
tegra_sfc4: sfc@2902600 {
compatible = "nvidia,tegra194-sfc",
"nvidia,tegra210-sfc";
reg = <0x0 0x2902600 0x0 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
tegra_mvc1: mvc@290a000 {
compatible = "nvidia,tegra194-mvc",
"nvidia,tegra210-mvc";
reg = <0x0 0x290a000 0x0 0x200>;
sound-name-prefix = "MVC1";
status = "disabled";
};
tegra_mvc2: mvc@290a200 {
compatible = "nvidia,tegra194-mvc",
"nvidia,tegra210-mvc";
reg = <0x0 0x290a200 0x0 0x200>;
sound-name-prefix = "MVC2";
status = "disabled";
};
tegra_amx1: amx@2903000 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903000 0x0 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
tegra_amx2: amx@2903100 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903100 0x0 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
tegra_amx3: amx@2903200 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903200 0x0 0x100>;
sound-name-prefix = "AMX3";
status = "disabled";
};
tegra_amx4: amx@2903300 {
compatible = "nvidia,tegra194-amx";
reg = <0x0 0x2903300 0x0 0x100>;
sound-name-prefix = "AMX4";
status = "disabled";
};
tegra_adx1: adx@2903800 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903800 0x0 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
tegra_adx2: adx@2903900 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903900 0x0 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
tegra_adx3: adx@2903a00 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903a00 0x0 0x100>;
sound-name-prefix = "ADX3";
status = "disabled";
};
tegra_adx4: adx@2903b00 {
compatible = "nvidia,tegra194-adx",
"nvidia,tegra210-adx";
reg = <0x0 0x2903b00 0x0 0x100>;
sound-name-prefix = "ADX4";
status = "disabled";
};
tegra_ope1: processing-engine@2908000 {
compatible = "nvidia,tegra194-ope",
"nvidia,tegra210-ope";
@@ -613,6 +516,22 @@ dynamic-range-compressor@2908200 {
};
};
tegra_mvc1: mvc@290a000 {
compatible = "nvidia,tegra194-mvc",
"nvidia,tegra210-mvc";
reg = <0x0 0x290a000 0x0 0x200>;
sound-name-prefix = "MVC1";
status = "disabled";
};
tegra_mvc2: mvc@290a200 {
compatible = "nvidia,tegra194-mvc",
"nvidia,tegra210-mvc";
reg = <0x0 0x290a200 0x0 0x200>;
sound-name-prefix = "MVC2";
status = "disabled";
};
tegra_amixer: amixer@290bb00 {
compatible = "nvidia,tegra194-amixer",
"nvidia,tegra210-amixer";
@@ -621,6 +540,57 @@ tegra_amixer: amixer@290bb00 {
status = "disabled";
};
tegra_admaif: admaif@290f000 {
compatible = "nvidia,tegra194-admaif",
"nvidia,tegra186-admaif";
reg = <0x0 0x0290f000 0x0 0x1000>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>,
<&adma 11>, <&adma 11>,
<&adma 12>, <&adma 12>,
<&adma 13>, <&adma 13>,
<&adma 14>, <&adma 14>,
<&adma 15>, <&adma 15>,
<&adma 16>, <&adma 16>,
<&adma 17>, <&adma 17>,
<&adma 18>, <&adma 18>,
<&adma 19>, <&adma 19>,
<&adma 20>, <&adma 20>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10",
"rx11", "tx11",
"rx12", "tx12",
"rx13", "tx13",
"rx14", "tx14",
"rx15", "tx15",
"rx16", "tx16",
"rx17", "tx17",
"rx18", "tx18",
"rx19", "tx19",
"rx20", "tx20";
status = "disabled";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_APEDMAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA194_SID_APE>;
};
tegra_asrc: asrc@2910000 {
compatible = "nvidia,tegra194-asrc",
"nvidia,tegra186-asrc";
@@ -629,33 +599,63 @@ tegra_asrc: asrc@2910000 {
status = "disabled";
};
};
};
pinmux: pinmux@2430000 {
compatible = "nvidia,tegra194-pinmux";
reg = <0x0 0x2430000 0x0 0x17000>;
status = "okay";
pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
pex_rst {
nvidia,pins = "pex_l5_rst_n_pgg1";
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
adma: dma-controller@2930000 {
compatible = "nvidia,tegra194-adma",
"nvidia,tegra186-adma";
reg = <0x0 0x02930000 0x0 0x20000>;
interrupt-parent = <&agic>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&bpmp TEGRA194_CLK_AHUB>;
clock-names = "d_audio";
status = "disabled";
};
clkreq_c5_bi_dir_state: pinmux-clkreq-c5-bi-dir {
clkreq {
nvidia,pins = "pex_l5_clkreq_n_pgg0";
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,io-hv = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
agic: interrupt-controller@2a40000 {
compatible = "nvidia,tegra194-agic",
"nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x02a41000 0x0 0x1000>,
<0x0 0x02a42000 0x0 0x2000>;
interrupts = <GIC_SPI 145
(GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&bpmp TEGRA194_CLK_APE>;
clock-names = "clk";
status = "disabled";
};
};
@@ -942,19 +942,6 @@ spi@3270000 {
status = "disabled";
};
spi@3300000 {
compatible = "nvidia,tegra194-qspi";
reg = <0x0 0x3300000 0x0 0x1000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA194_CLK_QSPI1>,
<&bpmp TEGRA194_CLK_QSPI1_PM>;
clock-names = "qspi", "qspi_out";
resets = <&bpmp TEGRA194_RESET_QSPI1>;
status = "disabled";
};
pwm1: pwm@3280000 {
compatible = "nvidia,tegra194-pwm",
"nvidia,tegra186-pwm";
@@ -1032,6 +1019,19 @@ pwm8: pwm@32f0000 {
#pwm-cells = <2>;
};
spi@3300000 {
compatible = "nvidia,tegra194-qspi";
reg = <0x0 0x3300000 0x0 0x1000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA194_CLK_QSPI1>,
<&bpmp TEGRA194_CLK_QSPI1_PM>;
clock-names = "qspi", "qspi_out";
resets = <&bpmp TEGRA194_RESET_QSPI1>;
status = "disabled";
};
sdmmc1: mmc@3400000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x0 0x03400000 0x0 0x10000>;
@@ -1707,17 +1707,14 @@ pmc: pmc@c360000 {
#interrupt-cells = <2>;
interrupt-controller;
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
sdmmc1_1v8: sdmmc1-1v8 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3-hv";
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
@@ -1726,6 +1723,10 @@ sdmmc3_1v8: sdmmc3-1v8 {
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
};
aon-noc@c600000 {
@@ -2373,10 +2374,10 @@ sor3: sor@15bc0000 {
pcie@14100000 {
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x0 0x14100000 0x0 0x00020000>, /* appl registers (128K) */
<0x0 0x30000000 0x0 0x00040000>, /* configuration space (256K) */
<0x0 0x30040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x0 0x30080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg = <0x00 0x14100000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x30000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x30040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x30080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
@@ -2726,7 +2727,7 @@ pcie@141a0000 {
linux,pci-domain = <5>;
pinctrl-names = "default";
pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
pinctrl-0 = <&pex_rst_c5_out_state>, <&pex_clkreq_c5_bi_dir_state>;
clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>;
clock-names = "core";
@@ -2779,7 +2780,7 @@ pcie-ep@141a0000 {
num-ob-windows = <8>;
pinctrl-names = "default";
pinctrl-0 = <&clkreq_c5_bi_dir_state>;
pinctrl-0 = <&pex_clkreq_c5_bi_dir_state>;
clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>;
clock-names = "core";
@@ -3121,6 +3122,13 @@ psci {
method = "smc";
};
tcu: serial {
compatible = "nvidia,tegra194-tcu";
mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(0)>,
<&hsp_aon TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(1)>;
mbox-names = "rx", "tx";
};
sound {
status = "disabled";
@@ -3141,13 +3149,6 @@ sound {
assigned-clock-rates = <258000000>;
};
tcu: serial {
compatible = "nvidia,tegra194-tcu";
mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(0)>,
<&hsp_aon TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(1)>;
mbox-names = "rx", "tx";
};
thermal-zones {
cpu-thermal {
thermal-sensors = <&{/bpmp/thermal} TEGRA194_BPMP_THERMAL_ZONE_CPU>;

66
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
View File

@@ -31,6 +31,23 @@ serial@70006000 {
status = "okay";
};
i2c@7000c500 {
status = "okay";
/* module ID EEPROM */
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
label = "module";
vcc-supply = <&vdd_1v8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
@@ -50,6 +67,22 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,suspend-fps-time-period-us = <1280>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,suspend-fps-time-period-us = <1280>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
max77620_default: pinmux {
gpio0 {
pins = "gpio0";
@@ -84,22 +117,6 @@ gpio5_6_7 {
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,suspend-fps-time-period-us = <1280>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,suspend-fps-time-period-us = <1280>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
regulators {
in-ldo0-1-supply = <&vdd_pre>;
in-ldo7-8-supply = <&vdd_pre>;
@@ -265,23 +282,6 @@ avdd_1v05: ldo8 {
};
};
i2c@7000c500 {
status = "okay";
/* module ID EEPROM */
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
label = "module";
vcc-supply = <&vdd_1v8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
pmc@7000e400 {
nvidia,invert-interrupt;
nvidia,suspend-mode = <0>;

278
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
View File

@@ -63,17 +63,17 @@ backlight: backlight@2c {
pwms = <&pwm 0 29334>;
pwm-names = "lp8557";
/* 3 LED string */
rom_14h {
rom-addr = /bits/ 8 <0x14>;
rom-val = /bits/ 8 <0x87>;
};
/* boost frequency 1 MHz */
rom_13h {
rom-addr = /bits/ 8 <0x13>;
rom-val = /bits/ 8 <0x01>;
};
/* 3 LED string */
rom_14h {
rom-addr = /bits/ 8 <0x14>;
rom-val = /bits/ 8 <0x87>;
};
};
};
@@ -116,14 +116,6 @@ clock@70110000 {
aconnect@702c0000 {
status = "okay";
dma-controller@702e2000 {
status = "okay";
};
interrupt-controller@702f9000 {
status = "okay";
};
ahub@702d0800 {
status = "okay";
@@ -261,81 +253,6 @@ i2s5_dap_ep: endpoint {
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic3_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic3_ep>;
};
};
dmic3_port: port@1 {
reg = <1>;
dmic3_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
sfc@702d2000 {
status = "okay";
@@ -436,56 +353,6 @@ sfc4_cif_out_ep: endpoint {
};
};
mvc@702da000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc1_in_ep>;
};
};
mvc1_out_port: port@1 {
reg = <1>;
mvc1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc1_out_ep>;
};
};
};
};
mvc@702da200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc2_in_ep>;
};
};
mvc2_out_port: port@1 {
reg = <1>;
mvc2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc2_out_ep>;
};
};
};
};
amx@702d3000 {
status = "okay";
@@ -682,6 +549,81 @@ adx2_out4_ep: endpoint {
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic3_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic3_ep>;
};
};
dmic3_port: port@1 {
reg = <1>;
dmic3_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
processing-engine@702d8000 {
status = "okay";
@@ -732,6 +674,56 @@ ope2_cif_out_ep: endpoint {
};
};
mvc@702da000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc1_in_ep>;
};
};
mvc1_out_port: port@1 {
reg = <1>;
mvc1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc1_out_ep>;
};
};
};
};
mvc@702da200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc2_in_ep>;
};
};
mvc2_out_port: port@1 {
reg = <1>;
mvc2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc2_out_ep>;
};
};
};
};
amixer@702dbb00 {
status = "okay";
@@ -1335,6 +1327,14 @@ xbar_ope2_out_ep: endpoint {
};
};
};
dma-controller@702e2000 {
status = "okay";
};
interrupt-controller@702f9000 {
status = "okay";
};
};
sound {

3
arch/arm64/boot/dts/nvidia/tegra210-p2595.dtsi
View File

@@ -1,4 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
/ {
model = "NVIDIA Tegra210 P2595 I/O board";
compatible = "nvidia,p2595", "nvidia,tegra210";

3
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
View File

@@ -1,5 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
/ {
model = "NVIDIA Tegra210 P2597 I/O board";

86
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
View File

@@ -1342,7 +1342,35 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
max77620_default: pinmux@0 {
fps {
#address-cells = <1>;
#size-cells = <0>;
fps0 {
reg = <0>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
fps1 {
reg = <1>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
reg = <2>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
hog-0 {
gpio-hog;
output-high;
gpios = <2 GPIO_ACTIVE_HIGH>,
<7 GPIO_ACTIVE_HIGH>;
};
max77620_default: pinmux {
gpio0 {
pins = "gpio0";
function = "gpio";
@@ -1383,34 +1411,6 @@ gpio5_6_7 {
};
};
hog-0 {
gpio-hog;
output-high;
gpios = <2 GPIO_ACTIVE_HIGH>,
<7 GPIO_ACTIVE_HIGH>;
};
fps {
#address-cells = <1>;
#size-cells = <0>;
fps0 {
reg = <0>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
fps1 {
reg = <1>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
reg = <2>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
regulators {
in-ldo0-1-supply = <&max77620_sd2>;
in-ldo7-8-supply = <&max77620_sd2>;
@@ -1592,20 +1592,6 @@ clk32k_in: clock-32k {
#clock-cells = <0>;
};
gpio-keys {
compatible = "gpio-keys";
status = "okay";
key-power {
debounce-interval = <30>;
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
label = "Power";
linux,code = <KEY_POWER>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
};
cpus {
cpu@0 {
enable-method = "psci";
@@ -1630,6 +1616,20 @@ cpu-sleep {
};
};
gpio-keys {
compatible = "gpio-keys";
status = "okay";
key-power {
debounce-interval = <30>;
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
label = "Power";
linux,code = <KEY_POWER>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";

384
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
View File

@@ -186,6 +186,22 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,suspend-fps-time-period-us = <5120>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,suspend-fps-time-period-us = <5120>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
max77620_default: pinmux {
gpio0 {
pins = "gpio0";
@@ -231,22 +247,6 @@ gpio5_6_7 {
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,suspend-fps-time-period-us = <5120>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,suspend-fps-time-period-us = <5120>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
regulators {
in-ldo0-1-supply = <&vdd_pre>;
in-ldo2-supply = <&vdd_3v3_sys>;
@@ -611,14 +611,6 @@ clock@70110000 {
aconnect@702c0000 {
status = "okay";
dma-controller@702e2000 {
status = "okay";
};
interrupt-controller@702f9000 {
status = "okay";
};
ahub@702d0800 {
status = "okay";
@@ -678,56 +670,6 @@ i2s4_dap_ep: endpoint {
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
sfc@702d2000 {
status = "okay";
@@ -828,56 +770,6 @@ sfc4_cif_out_ep: endpoint {
};
};
mvc@702da000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc1_in_ep>;
};
};
mvc1_out_port: port@1 {
reg = <1>;
mvc1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc1_out_ep>;
};
};
};
};
mvc@702da200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc2_in_ep>;
};
};
mvc2_out_port: port@1 {
reg = <1>;
mvc2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc2_out_ep>;
};
};
};
};
amx@702d3000 {
status = "okay";
@@ -1074,6 +966,56 @@ adx2_out4_ep: endpoint {
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
processing-engine@702d8000 {
status = "okay";
@@ -1124,6 +1066,56 @@ ope2_cif_out_ep: endpoint {
};
};
mvc@702da000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc1_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc1_in_ep>;
};
};
mvc1_out_port: port@1 {
reg = <1>;
mvc1_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc1_out_ep>;
};
};
};
};
mvc@702da200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mvc2_cif_in_ep: endpoint {
remote-endpoint = <&xbar_mvc2_in_ep>;
};
};
mvc2_out_port: port@1 {
reg = <1>;
mvc2_cif_out_ep: endpoint {
remote-endpoint = <&xbar_mvc2_out_ep>;
};
};
};
};
amixer@702dbb00 {
status = "okay";
@@ -1695,6 +1687,14 @@ xbar_ope2_out_ep: endpoint {
};
};
};
dma-controller@702e2000 {
status = "okay";
};
interrupt-controller@702f9000 {
status = "okay";
};
};
spi@70410000 {
@@ -1739,69 +1739,17 @@ cpu-sleep {
};
};
fan: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm 3 45334>;
cooling-levels = <0 64 128 255>;
#cooling-cells = <2>;
};
thermal-zones {
cpu-thermal {
trips {
cpu_trip_critical: critical {
temperature = <96500>;
hysteresis = <0>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <70000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active: active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_passive: passive {
temperature = <30000>;
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
cpu-critical {
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_critical>;
};
cpu-hot {
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_hot>;
};
cpu-active {
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active>;
};
cpu-passive {
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_passive>;
};
};
};
};
gpio-keys {
compatible = "gpio-keys";
key-force-recovery {
label = "Force Recovery";
gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <BTN_1>;
debounce-interval = <30>;
};
key-power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
@@ -1811,14 +1759,6 @@ key-power {
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
key-force-recovery {
label = "Force Recovery";
gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <BTN_1>;
debounce-interval = <30>;
};
};
psci {
@@ -1826,6 +1766,14 @@ psci {
method = "smc";
};
fan: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm 3 45334>;
cooling-levels = <0 64 128 255>;
#cooling-cells = <2>;
};
vdd_5v0_sys: regulator-vdd-5v0-sys {
compatible = "regulator-fixed";
@@ -1986,4 +1934,56 @@ sound {
label = "NVIDIA Jetson Nano APE";
};
thermal-zones {
cpu-thermal {
trips {
cpu_trip_critical: critical {
temperature = <96500>;
hysteresis = <0>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <70000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active: active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_passive: passive {
temperature = <30000>;
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
cpu-critical {
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_critical>;
};
cpu-hot {
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_hot>;
};
cpu-active {
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active>;
};
cpu-passive {
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_passive>;
};
};
};
};
};

66
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
View File

@@ -1389,6 +1389,23 @@ pmic: pmic@3c {
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
fps {
fps0 {
maxim,shutdown-fps-time-period-us = <5120>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
fps1 {
maxim,shutdown-fps-time-period-us = <5120>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
max77620_default: pinmux {
gpio0_1_2_7 {
pins = "gpio0", "gpio1", "gpio2", "gpio7";
@@ -1409,32 +1426,15 @@ gpio3 {
maxim,active-fps-power-down-slot = <2>;
};
gpio5_6 {
pins = "gpio5", "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
gpio4 {
pins = "gpio4";
function = "32k-out1";
};
};
fps {
fps0 {
maxim,shutdown-fps-time-period-us = <5120>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
fps1 {
maxim,shutdown-fps-time-period-us = <5120>;
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
gpio5_6 {
pins = "gpio5", "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
};
@@ -1800,6 +1800,18 @@ key-power {
wakeup-source;
};
key-volume-down {
label = "Volume Down";
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
key-volume-up {
label = "Volume Up";
gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
switch-lid {
label = "Lid";
gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
@@ -1815,18 +1827,6 @@ switch-tablet-mode {
linux,code = <SW_TABLET_MODE>;
wakeup-source;
};
key-volume-down {
label = "Volume Down";
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
key-volume-up {
label = "Volume Up";
gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
max98357a {

358
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View File

@@ -555,14 +555,6 @@ pinmux: pinmux@700008d4 {
reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */
<0x0 0x70003000 0x0 0x294>; /* Mux registers */
sdmmc1_3v3_drv: pinmux-sdmmc1-3v3-drv {
sdmmc1 {
nvidia,pins = "drive_sdmmc1";
nvidia,pull-down-strength = <0x8>;
nvidia,pull-up-strength = <0x8>;
};
};
sdmmc1_1v8_drv: pinmux-sdmmc1-1v8-drv {
sdmmc1 {
nvidia,pins = "drive_sdmmc1";
@@ -571,6 +563,14 @@ sdmmc1 {
};
};
sdmmc1_3v3_drv: pinmux-sdmmc1-3v3-drv {
sdmmc1 {
nvidia,pins = "drive_sdmmc1";
nvidia,pull-down-strength = <0x8>;
nvidia,pull-up-strength = <0x8>;
};
};
sdmmc2_1v8_drv: pinmux-sdmmc2-1v8-drv {
sdmmc2 {
nvidia,pins = "drive_sdmmc2";
@@ -579,14 +579,6 @@ sdmmc2 {
};
};
sdmmc3_3v3_drv: pinmux-sdmmc3-3v3-drv {
sdmmc3 {
nvidia,pins = "drive_sdmmc3";
nvidia,pull-down-strength = <0x8>;
nvidia,pull-up-strength = <0x8>;
};
};
sdmmc3_1v8_drv: pinmux-sdmmc3-1v8-drv {
sdmmc3 {
nvidia,pins = "drive_sdmmc3";
@@ -595,6 +587,14 @@ sdmmc3 {
};
};
sdmmc3_3v3_drv: pinmux-sdmmc3-3v3-drv {
sdmmc3 {
nvidia,pins = "drive_sdmmc3";
nvidia,pull-down-strength = <0x8>;
nvidia,pull-up-strength = <0x8>;
};
};
sdmmc4_1v8_drv: pinmux-sdmmc4-1v8-drv {
sdmmc4 {
nvidia,pins = "drive_sdmmc4";
@@ -852,6 +852,38 @@ tegra_pmc: pmc@7000e400 {
#interrupt-cells = <2>;
interrupt-controller;
pinmux {
pex_dpd_disable: pex-dpd-disable {
pins = "pex-bias", "pex-clk1", "pex-clk2";
low-power-disable;
};
pex_dpd_enable: pex-dpd-enable {
pins = "pex-bias", "pex-clk1", "pex-clk2";
low-power-enable;
};
sdmmc1_1v8: sdmmc1-1v8 {
pins = "sdmmc1";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
sdmmc3_1v8: sdmmc3-1v8 {
pins = "sdmmc3";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
};
powergates {
pd_audio: aud {
clocks = <&tegra_car TEGRA210_CLK_APE>,
@@ -881,6 +913,23 @@ pd_sor: sor {
#power-domain-cells = <0>;
};
pd_venc: venc {
clocks = <&tegra_car TEGRA210_CLK_VI>,
<&tegra_car TEGRA210_CLK_CSI>;
resets = <&mc TEGRA210_MC_RESET_VI>,
<&tegra_car 20>,
<&tegra_car 52>;
#power-domain-cells = <0>;
};
pd_vic: vic {
clocks = <&tegra_car TEGRA210_CLK_VIC03>;
clock-names = "vic";
resets = <&tegra_car 178>;
reset-names = "vic";
#power-domain-cells = <0>;
};
pd_xusbss: xusba {
clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
@@ -898,55 +947,6 @@ pd_xusbhost: xusbc {
resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
#power-domain-cells = <0>;
};
pd_vic: vic {
clocks = <&tegra_car TEGRA210_CLK_VIC03>;
clock-names = "vic";
resets = <&tegra_car 178>;
reset-names = "vic";
#power-domain-cells = <0>;
};
pd_venc: venc {
clocks = <&tegra_car TEGRA210_CLK_VI>,
<&tegra_car TEGRA210_CLK_CSI>;
resets = <&mc TEGRA210_MC_RESET_VI>,
<&tegra_car 20>,
<&tegra_car 52>;
#power-domain-cells = <0>;
};
};
pinmux {
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
sdmmc1_1v8: sdmmc1-1v8 {
pins = "sdmmc1";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
sdmmc3_1v8: sdmmc3-1v8 {
pins = "sdmmc3";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
pex_dpd_disable: pex-dpd-disable {
pins = "pex-bias", "pex-clk1", "pex-clk2";
low-power-disable;
};
pex_dpd_enable: pex-dpd-enable {
pins = "pex-bias", "pex-clk1", "pex-clk2";
low-power-enable;
};
};
};
@@ -1388,50 +1388,6 @@ aconnect@702c0000 {
ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
status = "disabled";
adma: dma-controller@702e2000 {
compatible = "nvidia,tegra210-adma";
reg = <0x702e2000 0x2000>;
interrupt-parent = <&agic>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
clock-names = "d_audio";
status = "disabled";
};
agic: interrupt-controller@702f9000 {
compatible = "nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x702f9000 0x1000>,
<0x702fa000 0x2000>;
interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car TEGRA210_CLK_APE>;
clock-names = "clk";
status = "disabled";
};
tegra_ahub: ahub@702d0800 {
compatible = "nvidia,tegra210-ahub";
reg = <0x702d0800 0x800>;
@@ -1620,6 +1576,62 @@ tegra_i2s5: i2s@702d1400 {
status = "disabled";
};
tegra_sfc1: sfc@702d2000 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2000 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
tegra_sfc2: sfc@702d2200 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2200 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
tegra_sfc3: sfc@702d2400 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2400 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
tegra_sfc4: sfc@702d2600 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2600 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
tegra_amx1: amx@702d3000 {
compatible = "nvidia,tegra210-amx";
reg = <0x702d3000 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
tegra_amx2: amx@702d3100 {
compatible = "nvidia,tegra210-amx";
reg = <0x702d3100 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
tegra_adx1: adx@702d3800 {
compatible = "nvidia,tegra210-adx";
reg = <0x702d3800 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
tegra_adx2: adx@702d3900 {
compatible = "nvidia,tegra210-adx";
reg = <0x702d3900 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
tegra_dmic1: dmic@702d4000 {
compatible = "nvidia,tegra210-dmic";
reg = <0x702d4000 0x100>;
@@ -1656,76 +1668,6 @@ tegra_dmic3: dmic@702d4200 {
status = "disabled";
};
tegra_sfc1: sfc@702d2000 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2000 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
tegra_sfc2: sfc@702d2200 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2200 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
tegra_sfc3: sfc@702d2400 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2400 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
tegra_sfc4: sfc@702d2600 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2600 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
tegra_mvc1: mvc@702da000 {
compatible = "nvidia,tegra210-mvc";
reg = <0x702da000 0x200>;
sound-name-prefix = "MVC1";
status = "disabled";
};
tegra_mvc2: mvc@702da200 {
compatible = "nvidia,tegra210-mvc";
reg = <0x702da200 0x200>;
sound-name-prefix = "MVC2";
status = "disabled";
};
tegra_amx1: amx@702d3000 {
compatible = "nvidia,tegra210-amx";
reg = <0x702d3000 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
tegra_amx2: amx@702d3100 {
compatible = "nvidia,tegra210-amx";
reg = <0x702d3100 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
tegra_adx1: adx@702d3800 {
compatible = "nvidia,tegra210-adx";
reg = <0x702d3800 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
tegra_adx2: adx@702d3900 {
compatible = "nvidia,tegra210-adx";
reg = <0x702d3900 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
tegra_ope1: processing-engine@702d8000 {
compatible = "nvidia,tegra210-ope";
reg = <0x702d8000 0x100>;
@@ -1766,6 +1708,20 @@ dynamic-range-compressor@702d8600 {
};
};
tegra_mvc1: mvc@702da000 {
compatible = "nvidia,tegra210-mvc";
reg = <0x702da000 0x200>;
sound-name-prefix = "MVC1";
status = "disabled";
};
tegra_mvc2: mvc@702da200 {
compatible = "nvidia,tegra210-mvc";
reg = <0x702da200 0x200>;
sound-name-prefix = "MVC2";
status = "disabled";
};
tegra_amixer: amixer@702dbb00 {
compatible = "nvidia,tegra210-amixer";
reg = <0x702dbb00 0x800>;
@@ -1856,6 +1812,50 @@ xbar_admaif10_ep: endpoint {
};
};
};
adma: dma-controller@702e2000 {
compatible = "nvidia,tegra210-adma";
reg = <0x702e2000 0x2000>;
interrupt-parent = <&agic>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
clock-names = "d_audio";
status = "disabled";
};
agic: interrupt-controller@702f9000 {
compatible = "nvidia,tegra210-agic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x702f9000 0x1000>,
<0x702fa000 0x2000>;
interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car TEGRA210_CLK_APE>;
clock-names = "clk";
status = "disabled";
};
};
spi@70410000 {

70
arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
View File

@@ -6,41 +6,6 @@ / {
model = "NVIDIA Jetson AGX Orin";
compatible = "nvidia,p3701-0000", "nvidia,tegra234";
vdd_1v8_ls: regulator-vdd-1v8-ls {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_LS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_ao: regulator-vdd-1v8-ao {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_AO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_3v3_pcie: regulator-vdd-3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_PCIE";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA234_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
enable-active-high;
};
vdd_12v_pcie: regulator-vdd-12v-pcie {
compatible = "regulator-fixed";
regulator-name = "VDD_12V_PCIE";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
bus@0 {
spi@3270000 {
status = "okay";
@@ -75,4 +40,39 @@ pmc@c360000 {
nvidia,invert-interrupt;
};
};
vdd_1v8_ls: regulator-vdd-1v8-ls {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_LS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_ao: regulator-vdd-1v8-ao {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_AO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_3v3_pcie: regulator-vdd-3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_PCIE";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA234_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
enable-active-high;
};
vdd_12v_pcie: regulator-vdd-12v-pcie {
compatible = "regulator-fixed";
regulator-name = "VDD_12V_PCIE";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
};

1750
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
View File

File diff suppressed because it is too large Load Diff

390
arch/arm64/boot/dts/nvidia/tegra234.dtsi
View File

@@ -22,6 +22,94 @@ bus@0 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>;
misc@100000 {
compatible = "nvidia,tegra234-misc";
reg = <0x0 0x00100000 0x0 0xf000>,
<0x0 0x0010f000 0x0 0x1000>;
status = "okay";
};
timer@2080000 {
compatible = "nvidia,tegra234-timer";
reg = <0x0 0x02080000 0x0 0x00121000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};
gpio: gpio@2200000 {
compatible = "nvidia,tegra234-gpio";
reg-names = "security", "gpio";
reg = <0x0 0x02200000 0x0 0x10000>,
<0x0 0x02210000 0x0 0x10000>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
};
gpcdma: dma-controller@2600000 {
compatible = "nvidia,tegra234-gpcdma",
"nvidia,tegra186-gpcdma";
@@ -518,194 +606,6 @@ agic: interrupt-controller@2a40000 {
};
};
misc@100000 {
compatible = "nvidia,tegra234-misc";
reg = <0x0 0x00100000 0x0 0xf000>,
<0x0 0x0010f000 0x0 0x1000>;
status = "okay";
};
timer@2080000 {
compatible = "nvidia,tegra234-timer";
reg = <0x0 0x02080000 0x0 0x00121000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};
host1x@13e00000 {
compatible = "nvidia,tegra234-host1x";
reg = <0x0 0x13e00000 0x0 0x10000>,
<0x0 0x13e10000 0x0 0x10000>,
<0x0 0x13e40000 0x0 0x10000>;
reg-names = "common", "hypervisor", "vm";
interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4",
"syncpt5", "syncpt6", "syncpt7", "host1x";
clocks = <&bpmp TEGRA234_CLK_HOST1X>;
clock-names = "host1x";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x14800000 0x0 0x14800000 0x0 0x02000000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_HOST1XDMAR &emc>;
interconnect-names = "dma-mem";
iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
/* Context isolation domains */
iommu-map = <0 &smmu_niso0 TEGRA234_SID_HOST1X_CTX0 1>,
<1 &smmu_niso0 TEGRA234_SID_HOST1X_CTX1 1>,
<2 &smmu_niso0 TEGRA234_SID_HOST1X_CTX2 1>,
<3 &smmu_niso0 TEGRA234_SID_HOST1X_CTX3 1>,
<4 &smmu_niso0 TEGRA234_SID_HOST1X_CTX4 1>,
<5 &smmu_niso0 TEGRA234_SID_HOST1X_CTX5 1>,
<6 &smmu_niso0 TEGRA234_SID_HOST1X_CTX6 1>,
<7 &smmu_niso0 TEGRA234_SID_HOST1X_CTX7 1>,
<8 &smmu_niso1 TEGRA234_SID_HOST1X_CTX0 1>,
<9 &smmu_niso1 TEGRA234_SID_HOST1X_CTX1 1>,
<10 &smmu_niso1 TEGRA234_SID_HOST1X_CTX2 1>,
<11 &smmu_niso1 TEGRA234_SID_HOST1X_CTX3 1>,
<12 &smmu_niso1 TEGRA234_SID_HOST1X_CTX4 1>,
<13 &smmu_niso1 TEGRA234_SID_HOST1X_CTX5 1>,
<14 &smmu_niso1 TEGRA234_SID_HOST1X_CTX6 1>,
<15 &smmu_niso1 TEGRA234_SID_HOST1X_CTX7 1>;
vic@15340000 {
compatible = "nvidia,tegra234-vic";
reg = <0x0 0x15340000 0x0 0x00040000>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA234_CLK_VIC>;
clock-names = "vic";
resets = <&bpmp TEGRA234_RESET_VIC>;
reset-names = "vic";
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_VIC>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VICSRD &emc>,
<&mc TEGRA234_MEMORY_CLIENT_VICSWR &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso1 TEGRA234_SID_VIC>;
dma-coherent;
};
nvdec@15480000 {
compatible = "nvidia,tegra234-nvdec";
reg = <0x0 0x15480000 0x0 0x00040000>;
clocks = <&bpmp TEGRA234_CLK_NVDEC>,
<&bpmp TEGRA234_CLK_FUSE>,
<&bpmp TEGRA234_CLK_TSEC_PKA>;
clock-names = "nvdec", "fuse", "tsec_pka";
resets = <&bpmp TEGRA234_RESET_NVDEC>;
reset-names = "nvdec";
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>,
<&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>;
dma-coherent;
nvidia,memory-controller = <&mc>;
/*
* Placeholder values that firmware needs to update with the real
* offsets parsed from the microcode headers.
*/
nvidia,bl-manifest-offset = <0>;
nvidia,bl-data-offset = <0>;
nvidia,bl-code-offset = <0>;
nvidia,os-manifest-offset = <0>;
nvidia,os-data-offset = <0>;
nvidia,os-code-offset = <0>;
/*
* Firmware needs to set this to "okay" once the above values have
* been updated.
*/
status = "disabled";
};
};
gpio: gpio@2200000 {
compatible = "nvidia,tegra234-gpio";
reg-names = "security", "gpio";
reg = <0x0 0x02200000 0x0 0x10000>,
<0x0 0x02210000 0x0 0x10000>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
};
mc: memory-controller@2c00000 {
compatible = "nvidia,tegra234-mc";
reg = <0x0 0x02c00000 0x0 0x10000>, /* MC-SID */
@@ -1690,18 +1590,13 @@ pmc: pmc@c360000 {
#interrupt-cells = <2>;
interrupt-controller;
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
sdmmc1_1v8: sdmmc1-1v8 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3-hv";
sdmmc1_3v3: sdmmc1-3v3 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
@@ -1709,6 +1604,11 @@ sdmmc3_1v8: sdmmc3-1v8 {
pins = "sdmmc3-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
sdmmc3_3v3: sdmmc3-3v3 {
pins = "sdmmc3-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
};
aon-fabric@c600000 {
@@ -2040,6 +1940,106 @@ cbb-fabric@13a00000 {
status = "okay";
};
host1x@13e00000 {
compatible = "nvidia,tegra234-host1x";
reg = <0x0 0x13e00000 0x0 0x10000>,
<0x0 0x13e10000 0x0 0x10000>,
<0x0 0x13e40000 0x0 0x10000>;
reg-names = "common", "hypervisor", "vm";
interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4",
"syncpt5", "syncpt6", "syncpt7", "host1x";
clocks = <&bpmp TEGRA234_CLK_HOST1X>;
clock-names = "host1x";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x14800000 0x0 0x14800000 0x0 0x02000000>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_HOST1XDMAR &emc>;
interconnect-names = "dma-mem";
iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
/* Context isolation domains */
iommu-map = <0 &smmu_niso0 TEGRA234_SID_HOST1X_CTX0 1>,
<1 &smmu_niso0 TEGRA234_SID_HOST1X_CTX1 1>,
<2 &smmu_niso0 TEGRA234_SID_HOST1X_CTX2 1>,
<3 &smmu_niso0 TEGRA234_SID_HOST1X_CTX3 1>,
<4 &smmu_niso0 TEGRA234_SID_HOST1X_CTX4 1>,
<5 &smmu_niso0 TEGRA234_SID_HOST1X_CTX5 1>,
<6 &smmu_niso0 TEGRA234_SID_HOST1X_CTX6 1>,
<7 &smmu_niso0 TEGRA234_SID_HOST1X_CTX7 1>,
<8 &smmu_niso1 TEGRA234_SID_HOST1X_CTX0 1>,
<9 &smmu_niso1 TEGRA234_SID_HOST1X_CTX1 1>,
<10 &smmu_niso1 TEGRA234_SID_HOST1X_CTX2 1>,
<11 &smmu_niso1 TEGRA234_SID_HOST1X_CTX3 1>,
<12 &smmu_niso1 TEGRA234_SID_HOST1X_CTX4 1>,
<13 &smmu_niso1 TEGRA234_SID_HOST1X_CTX5 1>,
<14 &smmu_niso1 TEGRA234_SID_HOST1X_CTX6 1>,
<15 &smmu_niso1 TEGRA234_SID_HOST1X_CTX7 1>;
vic@15340000 {
compatible = "nvidia,tegra234-vic";
reg = <0x0 0x15340000 0x0 0x00040000>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA234_CLK_VIC>;
clock-names = "vic";
resets = <&bpmp TEGRA234_RESET_VIC>;
reset-names = "vic";
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_VIC>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VICSRD &emc>,
<&mc TEGRA234_MEMORY_CLIENT_VICSWR &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso1 TEGRA234_SID_VIC>;
dma-coherent;
};
nvdec@15480000 {
compatible = "nvidia,tegra234-nvdec";
reg = <0x0 0x15480000 0x0 0x00040000>;
clocks = <&bpmp TEGRA234_CLK_NVDEC>,
<&bpmp TEGRA234_CLK_FUSE>,
<&bpmp TEGRA234_CLK_TSEC_PKA>;
clock-names = "nvdec", "fuse", "tsec_pka";
resets = <&bpmp TEGRA234_RESET_NVDEC>;
reset-names = "nvdec";
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>,
<&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>;
dma-coherent;
nvidia,memory-controller = <&mc>;
/*
* Placeholder values that firmware needs to update with the real
* offsets parsed from the microcode headers.
*/
nvidia,bl-manifest-offset = <0>;
nvidia,bl-data-offset = <0>;
nvidia,bl-code-offset = <0>;
nvidia,os-manifest-offset = <0>;
nvidia,os-data-offset = <0>;
nvidia,os-code-offset = <0>;
/*
* Firmware needs to set this to "okay" once the above values have
* been updated.
*/
status = "disabled";
};
};
pcie@140a0000 {
compatible = "nvidia,tegra234-pcie";
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4CA>;