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rtw89: 8852c: add chip::dle_mem

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These tables are used to configure hardware buffer size according to
operating mode.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220307060457.56789-11-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih
2022-03-07 14:04:54 +08:00
committed by Kalle Valo
parent ab8a56716b
commit 79d099e022
5 changed files with 86 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/wireless/realtek/rtw89/core.h
View File

@@ -2188,6 +2188,7 @@ struct rtw89_ple_quota {
u16 bb_rpt;
u16 wd_rel;
u16 cpu_io;
u16 tx_rpt;
};
struct rtw89_dle_mem {

62
drivers/net/wireless/realtek/rtw89/mac.c
View File

@@ -1183,6 +1183,18 @@ const struct rtw89_dle_size rtw89_wde_size4 = {
};
EXPORT_SYMBOL(rtw89_wde_size4);
/* 8852C DLFW */
const struct rtw89_dle_size rtw89_wde_size18 = {
RTW89_WDE_PG_64, 0, 2048,
};
EXPORT_SYMBOL(rtw89_wde_size18);
/* 8852C PCIE SCC */
const struct rtw89_dle_size rtw89_wde_size19 = {
RTW89_WDE_PG_64, 3328, 0,
};
EXPORT_SYMBOL(rtw89_wde_size19);
/* PCIE */
const struct rtw89_dle_size rtw89_ple_size0 = {
RTW89_PLE_PG_128, 1520, 16,
@@ -1195,6 +1207,18 @@ const struct rtw89_dle_size rtw89_ple_size4 = {
};
EXPORT_SYMBOL(rtw89_ple_size4);
/* 8852C DLFW */
const struct rtw89_dle_size rtw89_ple_size18 = {
RTW89_PLE_PG_128, 2544, 16,
};
EXPORT_SYMBOL(rtw89_ple_size18);
/* 8852C PCIE SCC */
const struct rtw89_dle_size rtw89_ple_size19 = {
RTW89_PLE_PG_128, 1904, 16,
};
EXPORT_SYMBOL(rtw89_ple_size19);
/* PCIE 64 */
const struct rtw89_wde_quota rtw89_wde_qt0 = {
3792, 196, 0, 107,
@@ -1207,6 +1231,18 @@ const struct rtw89_wde_quota rtw89_wde_qt4 = {
};
EXPORT_SYMBOL(rtw89_wde_qt4);
/* 8852C DLFW */
const struct rtw89_wde_quota rtw89_wde_qt17 = {
0, 0, 0, 0,
};
EXPORT_SYMBOL(rtw89_wde_qt17);
/* 8852C PCIE SCC */
const struct rtw89_wde_quota rtw89_wde_qt18 = {
3228, 60, 0, 40,
};
EXPORT_SYMBOL(rtw89_wde_qt18);
/* PCIE SCC */
const struct rtw89_ple_quota rtw89_ple_qt4 = {
264, 0, 16, 20, 26, 13, 356, 0, 32, 40, 8,
@@ -1225,6 +1261,30 @@ const struct rtw89_ple_quota rtw89_ple_qt13 = {
};
EXPORT_SYMBOL(rtw89_ple_qt13);
/* DLFW 52C */
const struct rtw89_ple_quota rtw89_ple_qt44 = {
0, 0, 16, 256, 0, 0, 0, 0, 0, 0, 0, 0,
};
EXPORT_SYMBOL(rtw89_ple_qt44);
/* DLFW 52C */
const struct rtw89_ple_quota rtw89_ple_qt45 = {
0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 0, 0,
};
EXPORT_SYMBOL(rtw89_ple_qt45);
/* 8852C PCIE SCC */
const struct rtw89_ple_quota rtw89_ple_qt46 = {
525, 0, 16, 20, 13, 13, 178, 0, 32, 62, 8, 16,
};
EXPORT_SYMBOL(rtw89_ple_qt46);
/* 8852C PCIE SCC */
const struct rtw89_ple_quota rtw89_ple_qt47 = {
525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037,
};
EXPORT_SYMBOL(rtw89_ple_qt47);
static const struct rtw89_dle_mem *get_dle_mem_cfg(struct rtw89_dev *rtwdev,
enum rtw89_qta_mode mode)
{
@@ -1379,6 +1439,8 @@ static void ple_quota_cfg(struct rtw89_dev *rtwdev,
SET_QUOTA(bb_rpt, PLE, 8);
SET_QUOTA(wd_rel, PLE, 9);
SET_QUOTA(cpu_io, PLE, 10);
if (rtwdev->chip->chip_id == RTL8852C)
SET_QUOTA(tx_rpt, PLE, 11);
}
#undef SET_QUOTA

10
drivers/net/wireless/realtek/rtw89/mac.h
View File

@@ -675,13 +675,23 @@ enum mac_ax_err_info {
extern const struct rtw89_hfc_prec_cfg rtw89_hfc_preccfg_pcie;
extern const struct rtw89_dle_size rtw89_wde_size0;
extern const struct rtw89_dle_size rtw89_wde_size4;
extern const struct rtw89_dle_size rtw89_wde_size18;
extern const struct rtw89_dle_size rtw89_wde_size19;
extern const struct rtw89_dle_size rtw89_ple_size0;
extern const struct rtw89_dle_size rtw89_ple_size4;
extern const struct rtw89_dle_size rtw89_ple_size18;
extern const struct rtw89_dle_size rtw89_ple_size19;
extern const struct rtw89_wde_quota rtw89_wde_qt0;
extern const struct rtw89_wde_quota rtw89_wde_qt4;
extern const struct rtw89_wde_quota rtw89_wde_qt17;
extern const struct rtw89_wde_quota rtw89_wde_qt18;
extern const struct rtw89_ple_quota rtw89_ple_qt4;
extern const struct rtw89_ple_quota rtw89_ple_qt5;
extern const struct rtw89_ple_quota rtw89_ple_qt13;
extern const struct rtw89_ple_quota rtw89_ple_qt44;
extern const struct rtw89_ple_quota rtw89_ple_qt45;
extern const struct rtw89_ple_quota rtw89_ple_qt46;
extern const struct rtw89_ple_quota rtw89_ple_qt47;
static inline u32 rtw89_mac_reg_by_idx(u32 reg_base, u8 band)
{

1
drivers/net/wireless/realtek/rtw89/reg.h
View File

@@ -554,6 +554,7 @@
#define R_AX_PLE_QTA8_CFG 0x9060
#define R_AX_PLE_QTA9_CFG 0x9064
#define R_AX_PLE_QTA10_CFG 0x9068
#define R_AX_PLE_QTA11_CFG 0x906C
#define R_AX_PLE_INI_STATUS 0x9100
#define B_AX_PLE_Q_MGN_INI_RDY BIT(1)

12
drivers/net/wireless/realtek/rtw89/rtw8852c.c
View File

@@ -7,6 +7,17 @@
#include "reg.h"
#include "rtw8852c.h"
static const struct rtw89_dle_mem rtw8852c_dle_mem_pcie[] = {
[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_wde_size19, &rtw89_ple_size19,
&rtw89_wde_qt18, &rtw89_wde_qt18, &rtw89_ple_qt46,
&rtw89_ple_qt47},
[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_wde_size18,
&rtw89_ple_size18, &rtw89_wde_qt17, &rtw89_wde_qt17,
&rtw89_ple_qt44, &rtw89_ple_qt45},
[RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
NULL},
};
static const u32 rtw8852c_h2c_regs[RTW89_H2CREG_MAX] = {
R_AX_H2CREG_DATA0_V1, R_AX_H2CREG_DATA1_V1, R_AX_H2CREG_DATA2_V1,
R_AX_H2CREG_DATA3_V1
@@ -218,6 +229,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
.chip_id = RTL8852C,
.ops = &rtw8852c_chip_ops,
.fw_name = "rtw89/rtw8852c_fw.bin",
.dle_mem = rtw8852c_dle_mem_pcie,
.pwr_on_seq = NULL,
.pwr_off_seq = NULL,
.hci_func_en_addr = R_AX_HCI_FUNC_EN_V1,