Merge tag 'mfd-next-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Support & Features:
   - MediaTek MT6397: Add mt6323 AUXADC support
   - MediaTek MT6397: Add mt6323 EFUSE support
   - Spreadtrum SC27xx: Add SC2730 regulator cell

  Improvements & Fixes:
   - Apple SMC: Fix key count endianness annotation
   - Azoteq IQS62x: Reject zero-length firmware records
   - ChromeOS EC: Introduce cros_ec_read_features helper and read
     features during probe to catch transfer errors
   - Cirrus Logic CS42L43: Fix regmap defaults ordering
   - Cirrus Logic CS42L43: Remove redundant NULL checks on SoundWire
   - Congatec Board Controller: Fix teardown ordering in cgbc_remove()
   - HP iPAQ Micro: Fix out-of-bounds stack read in ipaq_micro_str
   - Marvell 88PM886: Initialize the battery page
   - QNAP MCU: Keep the reply buffer alive past a command timeout
   - RAVE SP: Validate received frame payload lengths
   - Silicon Labs Si476x: Drop duplicate NULL checks
   - Silicon Labs Si476x: Modernize GPIO handling
   - Silicon Motion SM501: Fix potential memory leaks during remove
   - UCB1x00: Convert Assabet gpio-keys to use software nodes and
     register software node for GPIO controller
   - Viperboard: Fix native fields type in structures as little-endian
   - Viperboard: Remove redundant NULL check before kfree()
   - X-Powers AXP20x: Preserve other control bits when powering off

  Cleanups & Refactoring:
   - Core: Drop unused assignment of spi_device_id driver data
   - Core: Initialize spi_device_id arrays using member names
   - Core: Unify style of spi_device_id arrays
   - Maintainers: Add Intel LPSS section to follow the changes
   - Maintainers: Add a mailing list entry to MFD
   - Cirrus Logic CS42L43: Format sdw_device_id table
   - Cirrus Logic CS42L43: Use new SoundWire enumeration helper
   - ROHM PMIC: Factor out power button registration and convert
     gpio-keys to use software nodes
   - ST-Ericsson DB8500: Fold dbx500 header into db8500

  Device Tree Binding Updates:
   - Core: Add techvision vendor prefix
   - Marvell 88PM886: Allow vbus regulator
   - MediaTek MT8195 SCP: Add support for MT8189 SoC
   - Qualcomm SPMI PMIC: Document PMG1110
   - Qualcomm SPMI PMIC: Document haptics device
   - Qualcomm TCSR: Add compatible for Hawi and Maili SoCs
   - Qualcomm TCSR: Add compatible for Shikra
   - Qualcomm TCSR: Document the IPQ9650 TCSR block
   - STMicroelectronics STMPE: Fix typo st,stmpe601 (should be
     st,stmpe610)
   - Syscon: Add ESWIN EIC7700 compatible
   - Syscon: Allow syscon compatible for Loongson-2K0300 chip id
   - Syscon: Disallow simple-bus with syscon
   - Syscon: Drop custom select for older dtschema
   - TI OMAP USBHS TLL: Convert to DT schema"

* tag 'mfd-next-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (45 commits)
  mfd: cs42l43: Fix regmap defaults ordering
  dt-bindings: mfd: syscon: Allow syscon compatible for Loongson-2K0300 chip id
  dt-bindings: mfd: syscon: Add ESWIN EIC7700 compatible
  mfd: qnap-mcu: keep the reply buffer alive past a command timeout
  dt-bindings: mfd: qcom,tcsr: Document the IPQ9650 TCSR block
  mfd: macsmc: Fix key count endianness annotation
  dt-bindings: mfd: qcom,spmi-pmic: Document haptics device
  mfd: iqs62x: Reject zero-length firmware records
  mfd: rave-sp: validate received frame payload lengths
  mfd: sm501: Fix potential memory leaks during remove
  mfd: viperboard: Fix native fields type in structures as little-endian
  mfd: si476x-i2c: Get rid of duplicate NULL checks
  dt-bindings: mfd: Convert OMAP USB TLL to DT schema
  mfd: cgbc: Fix teardown ordering in cgbc_remove()
  mfd: mt6397-core: Add mt6323 AUXADC support
  dt-bindings: mfd: qcom,tcsr: Add compatible for Hawi and Maili SoCs
  mfd: rohm: Factor out power button registration
  mfd: ucb1x00: Convert Assabet gpio-keys to use software nodes
  mfd: ucb1x00: Register software node for GPIO controller
  mfd: cs42l43: Tidy up formatting on sdw_device_id table
  ...
This commit is contained in:
Linus Torvalds
2026-08-27 10:45:08 -07:00
71 changed files with 887 additions and 1133 deletions

View File

@@ -6,7 +6,7 @@ DT_MK_SCHEMA ?= dt-mk-schema
DT_SCHEMA_LINT = $(shell which yamllint || \
echo "warning: python package 'yamllint' not installed, skipping" >&2)
DT_SCHEMA_MIN_VERSION = 2023.9
DT_SCHEMA_MIN_VERSION = 2024.4
PHONY += check_dtschema_version
check_dtschema_version:

View File

@@ -29,7 +29,7 @@ properties:
type: object
additionalProperties: false
patternProperties:
"^(ldo(1[0-6]|[1-9])|buck[1-5])$":
"^(ldo(1[0-6]|[1-9])|buck[1-5]|vbus)$":
type: object
$ref: /schemas/regulator/regulator.yaml#
description: LDO or buck regulator.

View File

@@ -26,6 +26,7 @@ properties:
- mediatek,mt8183-scpsys
- mediatek,mt8186-scpsys
- mediatek,mt8188-scpsys
- mediatek,mt8189-scpsys
- mediatek,mt8192-scpsys
- mediatek,mt8195-scpsys
- mediatek,mt8365-scpsys

View File

@@ -1,27 +0,0 @@
OMAP HS USB Host TLL (Transceiver-Less Interface)
Required properties:
- compatible : should be "ti,usbhs-tll"
- reg : should contain one register range i.e. start and length
- interrupts : should contain the TLL module's interrupt
- ti,hwmod : must contain "usb_tll_hs"
Optional properties:
- clocks: a list of phandles and clock-specifier pairs, one for each entry in
clock-names.
- clock-names: should include:
* "usb_tll_hs_usb_ch0_clk" - USB TLL channel 0 clock
* "usb_tll_hs_usb_ch1_clk" - USB TLL channel 1 clock
* "usb_tll_hs_usb_ch2_clk" - USB TLL channel 2 clock
Example:
usbhstll: usbhstll@4a062000 {
compatible = "ti,usbhs-tll";
reg = <0x4a062000 0x1000>;
interrupts = <78>;
ti,hwmods = "usb_tll_hs";
};

View File

@@ -80,6 +80,7 @@ properties:
- qcom,pmcx0102
- qcom,pmd8028
- qcom,pmd9635
- qcom,pmg1110
- qcom,pmh0101
- qcom,pmh0104
- qcom,pmh0110
@@ -165,6 +166,10 @@ patternProperties:
type: object
$ref: /schemas/pinctrl/qcom,pmic-gpio.yaml#
"^haptics@[0-9a-f]+$":
type: object
$ref: /schemas/input/qcom,spmi-haptics.yaml#
"^led-controller@[0-9a-f]+$":
type: object
$ref: /schemas/leds/qcom,spmi-flash-led.yaml#

View File

@@ -17,6 +17,8 @@ properties:
compatible:
items:
- enum:
- qcom,hawi-tcsr
- qcom,maili-tcsr
- qcom,msm8976-tcsr
- qcom,msm8998-tcsr
- qcom,nord-tcsr
@@ -34,6 +36,7 @@ properties:
- qcom,sdx55-tcsr
- qcom,sdx65-tcsr
- qcom,sdx75-tcsr
- qcom,shikra-tcsr
- qcom,sm4450-tcsr
- qcom,sm6115-tcsr
- qcom,sm8150-tcsr
@@ -50,6 +53,7 @@ properties:
- qcom,tcsr-ipq8064
- qcom,tcsr-ipq8074
- qcom,tcsr-ipq9574
- qcom,tcsr-ipq9650
- qcom,tcsr-mdm9615
- qcom,tcsr-msm8226
- qcom,tcsr-msm8660

View File

@@ -20,7 +20,7 @@ allOf:
properties:
compatible:
enum:
- st,stmpe601
- st,stmpe610
- st,stmpe801
- st,stmpe811
- st,stmpe1600

View File

@@ -32,6 +32,7 @@ properties:
compatible:
contains:
const: syscon
# Always require a specific compatible for syscon
minItems: 2
maxItems: 5 # Should be enough
@@ -52,11 +53,44 @@ allOf:
contains:
const: simple-mfd
then:
# Always require a specific compatible for syscon with simple-mfd
properties:
compatible:
minItems: 3
maxItems: 5
- if:
properties:
compatible:
contains:
const: simple-bus
then:
# simple-bus conflicts with syscon - if a device is a system controller
# with miscellaneous registers, then it has at least one dedicated
# function thus it is not a simple bus. Allow existing exceptions.
if:
properties:
compatible:
not:
contains:
# This list CANNOT grow
enum:
- cznic,turris1x-cpld
- img,pistachio-cr-periph
- ti,am3352-scm-conf
- ti,am4372-scm-conf
- ti,dm814-scm-conf
- ti,dm8168-scm-conf
- ti,dra7-scm-conf
- ti,omap2-scm-conf
- ti,omap3-scm-conf
- ti,omap4-sysc-padconf-global
- ti,omap5-scm-wkup-conf
- ti,omap5-sysc-padconf-global
then:
required:
- incorrect-usage-of-simple-bus-and-syscon
additionalProperties: true
examples:

View File

@@ -19,122 +19,6 @@ description: |
maintainers:
- Lee Jones <lee@kernel.org>
# Need a select with all compatibles listed for compatibility with older
# dtschema (<2024.02), so this will not be selected for other schemas having
# syscon fallback.
select:
properties:
compatible:
contains:
enum:
- airoha,en7581-pbus-csr
- al,alpine-sysfabric-service
- allwinner,sun8i-a83t-system-controller
- allwinner,sun8i-h3-system-controller
- allwinner,sun8i-v3s-system-controller
- allwinner,sun50i-a64-system-controller
- altr,l3regs
- altr,sdr-ctl
- amd,pensando-elba-syscon
- amlogic,meson-mx-assist
- amlogic,meson-mx-bootrom
- amlogic,meson8-analog-top
- amlogic,meson8b-analog-top
- amlogic,meson8-pmu
- amlogic,meson8b-pmu
- apm,merlin-poweroff-mailbox
- apm,mustang-poweroff-mailbox
- apm,xgene-csw
- apm,xgene-efuse
- apm,xgene-mcb
- apm,xgene-rb
- apm,xgene-scu
- atmel,sama5d2-sfrbu
- atmel,sama5d3-nfc-io
- atmel,sama5d3-sfrbu
- atmel,sama5d4-sfrbu
- axis,artpec6-syscon
- brcm,cru-clkset
- brcm,sr-cdru
- brcm,sr-mhb
- cirrus,ep7209-syscon1
- cirrus,ep7209-syscon2
- cirrus,ep7209-syscon3
- cnxt,cx92755-uc
- econet,en751221-chip-scu
- freecom,fsg-cs2-system-controller
- fsl,imx93-aonmix-ns-syscfg
- fsl,imx93-wakeupmix-syscfg
- fsl,ls1088a-reset
- fsl,vf610-anatop
- fsl,vf610-mscm-cpucfg
- hisilicon,dsa-subctrl
- hisilicon,hi6220-sramctrl
- hisilicon,hip04-ppe
- hisilicon,pcie-sas-subctrl
- hisilicon,peri-subctrl
- hpe,gxp-sysreg
- loongson,ls1b-syscon
- loongson,ls1c-syscon
- lsi,axxia-syscon
- marvell,armada-3700-cpu-misc
- marvell,armada-3700-nb-pm
- marvell,armada-3700-avs
- marvell,armada-3700-usb2-host-device-misc
- marvell,armada-3700-usb2-host-misc
- marvell,dove-global-config
- mediatek,mt2701-pctl-a-syscfg
- mediatek,mt2712-pctl-a-syscfg
- mediatek,mt6397-pctl-pmic-syscfg
- mediatek,mt7981-topmisc
- mediatek,mt7988-topmisc
- mediatek,mt8135-pctl-a-syscfg
- mediatek,mt8135-pctl-b-syscfg
- mediatek,mt8173-pctl-a-syscfg
- mediatek,mt8365-syscfg
- microchip,lan966x-cpu-syscon
- microchip,mpfs-control-scb
- microchip,mpfs-sysreg-scb
- microchip,sam9x60-sfr
- microchip,sama7d65-ddr3phy
- microchip,sama7d65-sfrbu
- microchip,sama7g5-ddr3phy
- mscc,ocelot-cpu-syscon
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
- nxp,s32g2-gpr
- nxp,s32g3-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos
- rockchip,rk3036-qos
- rockchip,rk3066-qos
- rockchip,rk3128-qos
- rockchip,rk3228-qos
- rockchip,rk3288-qos
- rockchip,rk3368-qos
- rockchip,rk3399-qos
- rockchip,rk3528-qos
- rockchip,rk3562-qos
- rockchip,rk3568-qos
- rockchip,rk3576-qos
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- st,spear1340-misc
- stericsson,nomadik-pmu
- starfive,jh7100-sysmain
- ti,am62-opp-efuse-table
- ti,am62-usb-phy-ctrl
- ti,am625-dss-oldi-io-ctrl
- ti,am62p-cpsw-mac-efuse
- ti,am654-dss-oldi-io-ctrl
- ti,j784s4-acspcie-proxy-ctrl
- ti,j784s4-pcie-ctrl
- ti,keystone-pllctrl
required:
- compatible
properties:
compatible:
oneOf:
@@ -175,6 +59,7 @@ properties:
- cirrus,ep7209-syscon3
- cnxt,cx92755-uc
- econet,en751221-chip-scu
- eswin,eic7700-syscfg
- freecom,fsg-cs2-system-controller
- fsl,imx93-aonmix-ns-syscfg
- fsl,imx93-wakeupmix-syscfg
@@ -189,6 +74,7 @@ properties:
- hpe,gxp-sysreg
- loongson,ls1b-syscon
- loongson,ls1c-syscon
- loongson,ls2k0300-chipid-syscon
- lsi,axxia-syscon
- marvell,armada-3700-cpu-misc
- marvell,armada-3700-nb-pm

View File

@@ -0,0 +1,53 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/ti,usbhs-tll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: OMAP HS USB Host TLL (Transceiver-Less Interface)
maintainers:
- Eduard Bostina <egbostina@gmail.com>
properties:
compatible:
const: ti,usbhs-tll
reg:
maxItems: 1
interrupts:
maxItems: 1
ti,hwmods:
description: Name of the hwmod associated with the USB TLL.
$ref: /schemas/types.yaml#/definitions/string
const: usb_tll_hs
clocks:
minItems: 1
maxItems: 3
description: A list of phandles and clock-specifier pairs.
clock-names:
minItems: 1
items:
- const: usb_tll_hs_usb_ch0_clk
- const: usb_tll_hs_usb_ch1_clk
- const: usb_tll_hs_usb_ch2_clk
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
usb-tll@4a062000 {
compatible = "ti,usbhs-tll";
reg = <0x4a062000 0x1000>;
interrupts = <78>;
ti,hwmods = "usb_tll_hs";
};

View File

@@ -1690,6 +1690,8 @@ patternProperties:
description: Technologic Systems
"^techstar,.*":
description: Shenzhen Techstar Electronics Co., Ltd.
"^techvision,.*":
description: Techvision Intelligent Technology Co., Ltd
"^techwell,.*":
description: Techwell, Inc.
"^teejet,.*":

View File

@@ -13310,6 +13310,17 @@ F: drivers/spi/spi-ljca.c
F: drivers/usb/misc/usb-ljca.c
F: include/linux/usb/ljca.h
INTEL LPSS (Low Power SubSystem) DRIVERS
R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
S: Supported
F: drivers/dma/idma64*
F: drivers/i2c/busses/i2c-designware-*
F: drivers/mfd/intel-lpss*
F: drivers/pwm/pwm-lpss*
F: drivers/tty/serial/8250/8250_dw.c
F: drivers/tty/serial/8250/8250_dwlib.*
F: drivers/spi/spi-pxa2xx*
INTEL MANAGEMENT ENGINE (mei)
M: Alexander Usyskin <alexander.usyskin@intel.com>
L: linux-kernel@vger.kernel.org
@@ -23808,6 +23819,8 @@ F: drivers/mfd/rohm-bd71828.c
F: drivers/mfd/rohm-bd718x7.c
F: drivers/mfd/rohm-bd9576.c
F: drivers/mfd/rohm-bd96801.c
F: drivers/mfd/rohm-pwrbutton.c
F: drivers/mfd/rohm-pwrbutton.h
F: drivers/regulator/bd71815-regulator.c
F: drivers/regulator/bd71828-regulator.c
F: drivers/regulator/bd718x7-regulator.c

View File

@@ -12,7 +12,7 @@
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/platform_data/arm-ux500-pm.h>
#include <linux/platform_device.h>
#include <linux/io.h>
@@ -81,7 +81,7 @@ static void __init ux500_init_irq(void)
struct resource r;
irqchip_init();
prcmu_early_init();
db8500_prcmu_early_init();
np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
of_address_to_resource(np, 0, &r);
of_node_put(np);
@@ -101,7 +101,7 @@ static void ux500_restart(enum reboot_mode mode, const char *cmd)
local_irq_disable();
local_fiq_disable();
prcmu_system_reset(0);
db8500_prcmu_system_reset(0);
}
static const struct of_device_id u8500_local_bus_nodes[] = {

View File

@@ -7,7 +7,7 @@
*/
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/err.h>
@@ -35,13 +35,13 @@ static int clk_prcmu_prepare(struct clk_hw *hw)
{
struct clk_prcmu *clk = to_clk_prcmu(hw);
return prcmu_request_clock(clk->cg_sel, true);
return db8500_prcmu_request_clock(clk->cg_sel, true);
}
static void clk_prcmu_unprepare(struct clk_hw *hw)
{
struct clk_prcmu *clk = to_clk_prcmu(hw);
if (prcmu_request_clock(clk->cg_sel, false))
if (db8500_prcmu_request_clock(clk->cg_sel, false))
pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
clk_hw_get_name(hw));
}
@@ -86,7 +86,7 @@ static int clk_prcmu_opp_prepare(struct clk_hw *hw)
clk->opp_requested = 1;
}
err = prcmu_request_clock(clk->cg_sel, true);
err = db8500_prcmu_request_clock(clk->cg_sel, true);
if (err) {
prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
(char *)clk_hw_get_name(hw));
@@ -101,7 +101,7 @@ static void clk_prcmu_opp_unprepare(struct clk_hw *hw)
{
struct clk_prcmu *clk = to_clk_prcmu(hw);
if (prcmu_request_clock(clk->cg_sel, false)) {
if (db8500_prcmu_request_clock(clk->cg_sel, false)) {
pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
clk_hw_get_name(hw));
return;
@@ -120,7 +120,7 @@ static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
struct clk_prcmu *clk = to_clk_prcmu(hw);
if (!clk->opp_requested) {
err = prcmu_request_ape_opp_100_voltage(true);
err = db8500_prcmu_request_ape_opp_100_voltage(true);
if (err) {
pr_err("clk_prcmu: %s fail req APE OPP VOLT for %s.\n",
__func__, clk_hw_get_name(hw));
@@ -129,9 +129,9 @@ static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
clk->opp_requested = 1;
}
err = prcmu_request_clock(clk->cg_sel, true);
err = db8500_prcmu_request_clock(clk->cg_sel, true);
if (err) {
prcmu_request_ape_opp_100_voltage(false);
db8500_prcmu_request_ape_opp_100_voltage(false);
clk->opp_requested = 0;
return err;
}
@@ -143,14 +143,14 @@ static void clk_prcmu_opp_volt_unprepare(struct clk_hw *hw)
{
struct clk_prcmu *clk = to_clk_prcmu(hw);
if (prcmu_request_clock(clk->cg_sel, false)) {
if (db8500_prcmu_request_clock(clk->cg_sel, false)) {
pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
clk_hw_get_name(hw));
return;
}
if (clk->opp_requested) {
prcmu_request_ape_opp_100_voltage(false);
db8500_prcmu_request_ape_opp_100_voltage(false);
clk->opp_requested = 0;
}
}

View File

@@ -9,7 +9,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include "clk.h"
#include "prcc.h"

View File

@@ -11,7 +11,7 @@
#include <linux/spinlock.h>
#include <linux/atomic.h>
#include <linux/smp.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/platform_data/arm-ux500-pm.h>
#include <linux/platform_device.h>
@@ -66,7 +66,7 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev,
/* Go to the retention state, the prcmu will wait for the
* cpu to go WFI and this is what happens after exiting this
* 'master' critical section */
if (prcmu_set_power_state(PRCMU_AP_IDLE, true, true))
if (db8500_prcmu_set_power_state(PRCMU_AP_IDLE, true, true))
goto out;
/* When we switch to retention, the prcmu is in charge
@@ -109,7 +109,7 @@ static struct cpuidle_driver ux500_idle_driver = {
static int dbx500_cpuidle_probe(struct platform_device *pdev)
{
/* Configure wake up reasons */
prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
db8500_prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
PRCMU_WAKEUP(ABB));
return cpuidle_register(&ux500_idle_driver, NULL);

View File

@@ -16,6 +16,12 @@ static const struct regmap_config pm886_regmap_config = {
.max_register = PM886_REG_RTC_SPARE6,
};
static const struct regmap_config pm886_regmap_battery_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = PM886_REG_CLS_CONFIG1,
};
static const struct regmap_irq pm886_regmap_irqs[] = {
REGMAP_IRQ_REG(PM886_IRQ_ONKEY, 0, PM886_INT_ENA1_ONKEY),
};
@@ -85,10 +91,11 @@ static int pm886_setup_irq(struct pm886_chip *chip,
static int pm886_probe(struct i2c_client *client)
{
struct regmap *regmap, *regmap_battery;
struct regmap_irq_chip_data *irq_data;
struct device *dev = &client->dev;
struct i2c_client *battery_page;
struct pm886_chip *chip;
struct regmap *regmap;
unsigned int chip_id;
int err;
@@ -112,6 +119,18 @@ static int pm886_probe(struct i2c_client *client)
if (chip->chip_id != chip_id)
return dev_err_probe(dev, -EINVAL, "Unsupported chip: 0x%x\n", chip_id);
battery_page = devm_i2c_new_dummy_device(dev, client->adapter,
client->addr + PM886_PAGE_OFFSET_BATTERY);
if (IS_ERR(battery_page))
return dev_err_probe(dev, PTR_ERR(battery_page),
"Failed to initialize battery page\n");
regmap_battery = devm_regmap_init_i2c(battery_page, &pm886_regmap_battery_config);
if (IS_ERR(regmap_battery))
return dev_err_probe(dev, PTR_ERR(regmap_battery),
"Failed to initialize battery regmap\n");
chip->regmap_battery = regmap_battery;
err = pm886_setup_irq(chip, &irq_data);
if (err)
return err;

View File

@@ -1461,7 +1461,6 @@ config MFD_SEC_I2C
config MFD_SI476X_CORE
tristate "Silicon Laboratories 4761/64/68 AM/FM radio."
depends on I2C
depends on GPIOLIB_LEGACY
select MFD_CORE
select REGMAP_I2C
help
@@ -2208,6 +2207,10 @@ config MFD_STW481X
in various ST Microelectronics and ST-Ericsson embedded
Nomadik series.
config MFD_ROHM_PWRBUTTON
tristate
select MFD_CORE
config MFD_ROHM_BD718XX
tristate "ROHM BD71837 Power Management IC"
depends on I2C=y
@@ -2215,6 +2218,7 @@ config MFD_ROHM_BD718XX
select REGMAP_I2C
select REGMAP_IRQ
select MFD_CORE
select MFD_ROHM_PWRBUTTON
help
Select this option to get support for the ROHM BD71837
Power Management ICs. BD71837 is designed to power processors like
@@ -2228,6 +2232,7 @@ config MFD_ROHM_BD71828
select REGMAP_I2C
select REGMAP_IRQ
select MFD_CORE
select MFD_ROHM_PWRBUTTON
help
Select this option to get support for the ROHM BD71815, BD71828,
BD71879, BD72720 and BD73900 Power Management ICs (PMICs). These are

View File

@@ -273,6 +273,7 @@ obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o
obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
obj-$(CONFIG_MFD_ROHM_PWRBUTTON) += rohm-pwrbutton.o
obj-$(CONFIG_MFD_ROHM_BD71828) += rohm-bd71828.o
obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
obj-$(CONFIG_MFD_ROHM_BD957XMUF) += rohm-bd9576.o

View File

@@ -19,7 +19,7 @@
#include <linux/mfd/core.h>
#include <linux/mfd/abx500.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/of.h>
/*

View File

@@ -155,7 +155,7 @@ MODULE_DEVICE_TABLE(of, altr_a10sr_spi_of_match);
static const struct spi_device_id altr_a10sr_spi_ids[] = {
{ .name = "a10sr" },
{ },
{ }
};
MODULE_DEVICE_TABLE(spi, altr_a10sr_spi_ids);

View File

@@ -255,12 +255,12 @@ static void arizona_spi_remove(struct spi_device *spi)
}
static const struct spi_device_id arizona_spi_ids[] = {
{ "wm5102", WM5102 },
{ "wm5110", WM5110 },
{ "wm8280", WM8280 },
{ "wm1831", WM1831 },
{ "cs47l24", CS47L24 },
{ },
{ .name = "wm5102", .driver_data = WM5102 },
{ .name = "wm5110", .driver_data = WM5110 },
{ .name = "wm8280", .driver_data = WM8280 },
{ .name = "wm1831", .driver_data = WM1831 },
{ .name = "cs47l24", .driver_data = CS47L24 },
{ }
};
MODULE_DEVICE_TABLE(spi, arizona_spi_ids);

View File

@@ -1253,7 +1253,7 @@ static int axp20x_power_off(struct sys_off_data *data)
break;
}
regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
regmap_set_bits(axp20x->regmap, shutdown_reg, AXP20X_OFF);
/* Give capacitors etc. time to drain to avoid kernel panic msg. */
mdelay(500);

View File

@@ -364,9 +364,9 @@ static void cgbc_remove(struct platform_device *pdev)
{
struct cgbc_device_data *cgbc = platform_get_drvdata(pdev);
cgbc_session_release(cgbc);
mfd_remove_devices(&pdev->dev);
cgbc_session_release(cgbc);
}
static struct platform_driver cgbc_driver = {

View File

@@ -197,6 +197,17 @@ static int ec_device_probe(struct platform_device *pdev)
ec->features.flags[1] = -1U; /* Not cached yet */
device_initialize(&ec->class_dev);
/*
* Add the class device
*/
ec->class_dev.class = &cros_class;
ec->class_dev.parent = dev;
ec->class_dev.release = cros_ec_class_release;
retval = cros_ec_read_features(ec);
if (retval < 0)
goto failed;
for (i = 0; i < ARRAY_SIZE(cros_mcu_devices); i++) {
/*
* Check whether this is actually a dedicated MCU rather
@@ -214,13 +225,6 @@ static int ec_device_probe(struct platform_device *pdev)
}
}
/*
* Add the class device
*/
ec->class_dev.class = &cros_class;
ec->class_dev.parent = dev;
ec->class_dev.release = cros_ec_class_release;
retval = dev_set_name(&ec->class_dev, "%s", ec_platform->ec_name);
if (retval) {
dev_err(dev, "dev_set_name failed => %d\n", retval);

View File

@@ -40,8 +40,8 @@ static void cs40l50_spi_remove(struct spi_device *spi)
}
static const struct spi_device_id cs40l50_id_spi[] = {
{ "cs40l50" },
{}
{ .name = "cs40l50" },
{ }
};
MODULE_DEVICE_TABLE(spi, cs40l50_id_spi);

View File

@@ -44,8 +44,6 @@ static int cs42l43_i2c_probe(struct i2c_client *i2c)
cs42l43->dev = &i2c->dev;
cs42l43->irq = i2c->irq;
/* A device on an I2C is always attached by definition. */
cs42l43->attached = true;
cs42l43->variant_id = (long)device_get_match_data(cs42l43->dev);
cs42l43->regmap = devm_regmap_init_i2c(i2c, &cs42l43_i2c_regmap);

View File

@@ -99,17 +99,10 @@ static int cs42l43_sdw_update_status(struct sdw_slave *sdw, enum sdw_slave_statu
sdw_write_no_pm(sdw, CS42L43_GEN_INT_MASK_1,
CS42L43_INT_STAT_GEN1_MASK);
cs42l43->attached = true;
complete(&cs42l43->device_attach);
break;
case SDW_SLAVE_UNATTACHED:
dev_dbg(cs42l43->dev, "Device detach\n");
cs42l43->attached = false;
reinit_completion(&cs42l43->device_attach);
complete(&cs42l43->device_detach);
break;
default:
@@ -188,9 +181,9 @@ static int cs42l43_sdw_probe(struct sdw_slave *sdw, const struct sdw_device_id *
}
static const struct sdw_device_id cs42l43_sdw_id[] = {
SDW_SLAVE_ENTRY(0x01FA, 0x4243, (void *) CS42L43_DEVID_VAL),
SDW_SLAVE_ENTRY(0x01FA, 0x2A3B, (void *) CS42L43B_DEVID_VAL),
{}
SDW_SLAVE_ENTRY(0x01FA, 0x4243, (void *)CS42L43_DEVID_VAL),
SDW_SLAVE_ENTRY(0x01FA, 0x2A3B, (void *)CS42L43B_DEVID_VAL),
{ }
};
MODULE_DEVICE_TABLE(sdw, cs42l43_sdw_id);

View File

@@ -115,14 +115,14 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
{ CS42L43_DECIM_HPF_WNF_CTRL2, 0x00000001 },
{ CS42L43_DECIM_HPF_WNF_CTRL3, 0x00000001 },
{ CS42L43_DECIM_HPF_WNF_CTRL4, 0x00000001 },
{ CS42L43B_DECIM_HPF_WNF_CTRL5, 0x00000001 },
{ CS42L43B_DECIM_HPF_WNF_CTRL6, 0x00000001 },
{ CS42L43_DMIC_PDM_CTRL, 0x00000000 },
{ CS42L43_DECIM_VOL_CTRL_CH1_CH2, 0x20122012 },
{ CS42L43_DECIM_VOL_CTRL_CH3_CH4, 0x20122012 },
{ CS42L43B_DECIM_VOL_CTRL_CH1_CH2, 0x20122012 },
{ CS42L43B_DECIM_VOL_CTRL_CH3_CH4, 0x20122012 },
{ CS42L43B_DECIM_VOL_CTRL_CH5_CH6, 0x20122012 },
{ CS42L43B_DECIM_HPF_WNF_CTRL5, 0x00000001 },
{ CS42L43B_DECIM_HPF_WNF_CTRL6, 0x00000001 },
{ CS42L43_INTP_VOLUME_CTRL1, 0x00000180 },
{ CS42L43_INTP_VOLUME_CTRL2, 0x00000180 },
{ CS42L43_AMP1_2_VOL_RAMP, 0x00000022 },
@@ -160,10 +160,10 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
{ CS42L43_SWIRE_DP2_CH2_INPUT, 0x00000000 },
{ CS42L43_SWIRE_DP3_CH1_INPUT, 0x00000000 },
{ CS42L43_SWIRE_DP3_CH2_INPUT, 0x00000000 },
{ CS42L43B_SWIRE_DP3_CH3_INPUT, 0x00000000 },
{ CS42L43B_SWIRE_DP3_CH4_INPUT, 0x00000000 },
{ CS42L43_SWIRE_DP4_CH1_INPUT, 0x00000000 },
{ CS42L43_SWIRE_DP4_CH2_INPUT, 0x00000000 },
{ CS42L43B_SWIRE_DP3_CH3_INPUT, 0x00000000 },
{ CS42L43B_SWIRE_DP3_CH4_INPUT, 0x00000000 },
{ CS42L43B_SWIRE_DP4_CH3_INPUT, 0x00000000 },
{ CS42L43B_SWIRE_DP4_CH4_INPUT, 0x00000000 },
{ CS42L43_ASRC_INT1_INPUT1, 0x00000000 },
@@ -178,14 +178,10 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
{ CS42L43_ISRC1INT2_INPUT1, 0x00000000 },
{ CS42L43_ISRC1DEC1_INPUT1, 0x00000000 },
{ CS42L43_ISRC1DEC2_INPUT1, 0x00000000 },
{ CS42L43B_ISRC1DEC3_INPUT1, 0x00000000 },
{ CS42L43B_ISRC1DEC4_INPUT1, 0x00000000 },
{ CS42L43_ISRC2INT1_INPUT1, 0x00000000 },
{ CS42L43_ISRC2INT2_INPUT1, 0x00000000 },
{ CS42L43_ISRC2DEC1_INPUT1, 0x00000000 },
{ CS42L43_ISRC2DEC2_INPUT1, 0x00000000 },
{ CS42L43B_ISRC2DEC3_INPUT1, 0x00000000 },
{ CS42L43B_ISRC2DEC4_INPUT1, 0x00000000 },
{ CS42L43_EQ1MIX_INPUT1, 0x00800000 },
{ CS42L43_EQ1MIX_INPUT2, 0x00800000 },
{ CS42L43_EQ1MIX_INPUT3, 0x00800000 },
@@ -212,6 +208,10 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {
{ CS42L43_AMP4MIX_INPUT2, 0x00800000 },
{ CS42L43_AMP4MIX_INPUT3, 0x00800000 },
{ CS42L43_AMP4MIX_INPUT4, 0x00800000 },
{ CS42L43B_ISRC1DEC3_INPUT1, 0x00000000 },
{ CS42L43B_ISRC1DEC4_INPUT1, 0x00000000 },
{ CS42L43B_ISRC2DEC3_INPUT1, 0x00000000 },
{ CS42L43B_ISRC2DEC4_INPUT1, 0x00000000 },
{ CS42L43_ASRC_INT_ENABLES, 0x00000100 },
{ CS42L43_ASRC_DEC_ENABLES, 0x00000100 },
{ CS42L43_PDNCNTL, 0x00000000 },
@@ -586,16 +586,11 @@ static int cs42l43_soft_reset(struct cs42l43 *cs42l43)
*/
static int cs42l43_wait_for_attach(struct cs42l43 *cs42l43)
{
if (!cs42l43->attached) {
unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_ATTACH_TIMEOUT_MS);
unsigned long time;
int ret;
time = wait_for_completion_timeout(&cs42l43->device_attach, timeout);
if (!time) {
dev_err(cs42l43->dev, "Timed out waiting for device re-attach\n");
return -ETIMEDOUT;
}
}
ret = sdw_slave_wait_for_init(cs42l43->sdw, CS42L43_SDW_ATTACH_TIMEOUT_MS);
if (ret)
return ret;
regcache_cache_only(cs42l43->regmap, false);
@@ -1120,7 +1115,6 @@ int cs42l43_dev_probe(struct cs42l43 *cs42l43)
dev_set_drvdata(cs42l43->dev, cs42l43);
mutex_init(&cs42l43->pll_lock);
init_completion(&cs42l43->device_attach);
init_completion(&cs42l43->device_detach);
init_completion(&cs42l43->firmware_download);
INIT_WORK(&cs42l43->boot_work, cs42l43_boot_work);

View File

@@ -63,12 +63,12 @@ static void da9052_spi_remove(struct spi_device *spi)
}
static const struct spi_device_id da9052_spi_id[] = {
{"da9052", DA9052},
{"da9053-aa", DA9053_AA},
{"da9053-ba", DA9053_BA},
{"da9053-bb", DA9053_BB},
{"da9053-bc", DA9053_BC},
{}
{ .name = "da9052", .driver_data = DA9052 },
{ .name = "da9053-aa", .driver_data = DA9053_AA },
{ .name = "da9053-ba", .driver_data = DA9053_BA },
{ .name = "da9053-bb", .driver_data = DA9053_BB },
{ .name = "da9053-bc", .driver_data = DA9053_BC },
{ }
};
static struct spi_driver da9052_spi_driver = {

View File

@@ -32,7 +32,7 @@
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/mfd/core.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/regulator/db8500-prcmu.h>
#include <linux/regulator/machine.h>
@@ -2285,7 +2285,7 @@ void db8500_prcmu_system_reset(u16 reset_code)
/**
* db8500_prcmu_get_reset_code - Retrieve SW reset reason code
*
* Retrieves the reset reason code stored by prcmu_system_reset() before
* Retrieves the reset reason code stored by db8500_prcmu_system_reset() before
* last restart.
*/
u16 db8500_prcmu_get_reset_code(void)
@@ -3041,7 +3041,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
db8500_irq_init(np);
prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);
db8500_prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);
err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs,
ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain);

View File

@@ -160,9 +160,9 @@ static const struct intel_m10bmc_platform_info m10bmc_spi_n5010 = {
};
static const struct spi_device_id m10bmc_spi_id[] = {
{ "m10-n3000", (kernel_ulong_t)&m10bmc_spi_n3000 },
{ "m10-d5005", (kernel_ulong_t)&m10bmc_spi_d5005 },
{ "m10-n5010", (kernel_ulong_t)&m10bmc_spi_n5010 },
{ .name = "m10-n3000", .driver_data = (kernel_ulong_t)&m10bmc_spi_n3000 },
{ .name = "m10-d5005", .driver_data = (kernel_ulong_t)&m10bmc_spi_d5005 },
{ .name = "m10-n5010", .driver_data = (kernel_ulong_t)&m10bmc_spi_n5010 },
{ }
};
MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);

View File

@@ -221,7 +221,7 @@ static void ipaq_micro_eeprom_read(struct ipaq_micro *micro,
static char *ipaq_micro_str(u8 *wchar, u8 len)
{
char retstr[256];
char retstr[256] = { 0 };
u8 i;
for (i = 0; i < len / 2; i++)

View File

@@ -237,7 +237,7 @@ static int iqs62x_firmware_parse(struct iqs62x_core *iqs62x,
fw_rec = (struct iqs62x_fw_rec *)(fw->data + pos);
pos += sizeof(*fw_rec);
if (pos + fw_rec->len - 1 > fw->size) {
if (!fw_rec->len || fw_rec->len - 1 > fw->size - pos) {
ret = -EINVAL;
break;
}

View File

@@ -410,7 +410,7 @@ static int apple_smc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct apple_smc *smc;
u32 count;
__be32 count;
int ret;
smc = devm_kzalloc(dev, sizeof(*smc), GFP_KERNEL);
@@ -461,8 +461,10 @@ static int apple_smc_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, smc);
BLOCKING_INIT_NOTIFIER_HEAD(&smc->event_handlers);
ret = apple_smc_read_u32(smc, SMC_KEY(#KEY), &count);
if (ret)
ret = apple_smc_read(smc, SMC_KEY(#KEY), &count, sizeof(count));
if (ret >= 0 && ret != sizeof(count))
ret = -EINVAL;
if (ret < 0)
return dev_err_probe(smc->dev, ret, "Failed to get key count");
smc->key_count = be32_to_cpu(count);

View File

@@ -112,15 +112,15 @@ static void madera_spi_remove(struct spi_device *spi)
}
static const struct spi_device_id madera_spi_ids[] = {
{ "cs47l15", CS47L15 },
{ "cs47l35", CS47L35 },
{ "cs47l85", CS47L85 },
{ "cs47l90", CS47L90 },
{ "cs47l91", CS47L91 },
{ "cs42l92", CS42L92 },
{ "cs47l92", CS47L92 },
{ "cs47l93", CS47L93 },
{ "wm1840", WM1840 },
{ .name = "cs47l15", .driver_data = CS47L15 },
{ .name = "cs47l35", .driver_data = CS47L35 },
{ .name = "cs47l85", .driver_data = CS47L85 },
{ .name = "cs47l90", .driver_data = CS47L90 },
{ .name = "cs47l91", .driver_data = CS47L91 },
{ .name = "cs42l92", .driver_data = CS42L92 },
{ .name = "cs47l92", .driver_data = CS47L92 },
{ .name = "cs47l93", .driver_data = CS47L93 },
{ .name = "wm1840", .driver_data = WM1840 },
{ }
};
MODULE_DEVICE_TABLE(spi, madera_spi_ids);

View File

@@ -202,9 +202,9 @@ static const struct of_device_id cpcap_of_match[] = {
MODULE_DEVICE_TABLE(of, cpcap_of_match);
static const struct spi_device_id cpcap_spi_ids[] = {
{ .name = "cpcap", },
{ .name = "6556002", },
{},
{ .name = "cpcap" },
{ .name = "6556002" },
{ }
};
MODULE_DEVICE_TABLE(spi, cpcap_spi_ids);

View File

@@ -125,6 +125,12 @@ static const struct resource mt6323_pwrc_resources[] = {
static const struct mfd_cell mt6323_devs[] = {
{
.name = "mt6323-auxadc",
.of_compatible = "mediatek,mt6323-auxadc",
}, {
.name = "mt6323-efuse",
.of_compatible = "mediatek,mt6323-efuse",
}, {
.name = "mt6323-rtc",
.num_resources = ARRAY_SIZE(mt6323_rtc_resources),
.resources = mt6323_rtc_resources,

View File

@@ -270,7 +270,7 @@ static int ocelot_spi_probe(struct spi_device *spi)
}
static const struct spi_device_id ocelot_spi_ids[] = {
{ "vsc7512", 0 },
{ .name = "vsc7512" },
{ }
};
MODULE_DEVICE_TABLE(spi, ocelot_spi_ids);

View File

@@ -56,6 +56,7 @@ struct qnap_mcu_reply {
* @reply: Reply data structure
* @variant: Device variant specific information
* @version: MCU firmware version
* @rx: Receive buffer the reply is assembled in
*/
struct qnap_mcu {
struct serdev_device *serdev;
@@ -63,6 +64,7 @@ struct qnap_mcu {
struct qnap_mcu_reply reply;
const struct qnap_mcu_variant *variant;
u8 version[QNAP_MCU_VERSION_LEN];
u8 rx[QNAP_MCU_RX_BUFFER_SIZE];
};
/*
@@ -214,19 +216,18 @@ int qnap_mcu_exec(struct qnap_mcu *mcu,
const u8 *cmd_data, size_t cmd_data_size,
u8 *reply_data, size_t reply_data_size)
{
unsigned char rx[QNAP_MCU_RX_BUFFER_SIZE];
size_t length = reply_data_size + QNAP_MCU_CHECKSUM_SIZE;
struct qnap_mcu_reply *reply = &mcu->reply;
int ret = 0;
if (length > sizeof(rx)) {
if (length > sizeof(mcu->rx)) {
dev_err(&mcu->serdev->dev, "expected data too big for receive buffer");
return -EINVAL;
}
guard(mutex)(&mcu->bus_lock);
reply->data = rx;
reply->data = mcu->rx;
reply->length = length;
reply->received = 0;
reinit_completion(&reply->done);
@@ -242,15 +243,15 @@ int qnap_mcu_exec(struct qnap_mcu *mcu,
return -ETIMEDOUT;
}
if (!qnap_mcu_verify_checksum(rx, reply->received)) {
if (!qnap_mcu_verify_checksum(mcu->rx, reply->received)) {
dev_err(&mcu->serdev->dev, "Invalid Checksum received from controller\n");
return -EPROTO;
}
if (qnap_mcu_reply_is_any_error(mcu, rx, reply->received))
if (qnap_mcu_reply_is_any_error(mcu, mcu->rx, reply->received))
return -EPROTO;
memcpy(reply_data, rx, reply_data_size);
memcpy(reply_data, mcu->rx, reply_data_size);
return 0;
}

View File

@@ -63,6 +63,12 @@
#define RAVE_SP_TX_BUFFER_SIZE \
(RAVE_SP_STX_ETX_SIZE + 2 * RAVE_SP_RX_BUFFER_SIZE)
enum rave_sp_frame_offset {
RAVE_SP_FRAME_CODE_OFFSET,
RAVE_SP_FRAME_ACK_ID_OFFSET,
RAVE_SP_FRAME_DATA_OFFSET,
};
/**
* enum rave_sp_deframer_state - Possible state for de-framer
*
@@ -352,7 +358,7 @@ int rave_sp_exec(struct rave_sp *sp,
int command, ret = 0;
u8 ackid;
command = sp->variant->cmd.translate(data[0]);
command = sp->variant->cmd.translate(data[RAVE_SP_FRAME_CODE_OFFSET]);
if (command < 0)
return command;
@@ -366,8 +372,8 @@ int rave_sp_exec(struct rave_sp *sp,
sp->reply = &reply;
mutex_unlock(&sp->reply_lock);
data[0] = command;
data[1] = ackid;
data[RAVE_SP_FRAME_CODE_OFFSET] = command;
data[RAVE_SP_FRAME_ACK_ID_OFFSET] = ackid;
rave_sp_write(sp, data, data_size);
@@ -388,16 +394,23 @@ EXPORT_SYMBOL_GPL(rave_sp_exec);
static void rave_sp_receive_event(struct rave_sp *sp,
const unsigned char *data, size_t length)
{
u8 cmd[] = {
[0] = rave_sp_reply_code(data[0]),
[1] = data[1],
};
unsigned long action;
u8 cmd[RAVE_SP_FRAME_DATA_OFFSET];
if (length < RAVE_SP_FRAME_DATA_OFFSET + 1) {
dev_warn(&sp->serdev->dev, "Dropping short event frame\n");
return;
}
cmd[RAVE_SP_FRAME_CODE_OFFSET] =
rave_sp_reply_code(data[RAVE_SP_FRAME_CODE_OFFSET]);
cmd[RAVE_SP_FRAME_ACK_ID_OFFSET] = data[RAVE_SP_FRAME_ACK_ID_OFFSET];
rave_sp_write(sp, cmd, sizeof(cmd));
blocking_notifier_call_chain(&sp->event_notifier_list,
rave_sp_action_pack(data[0], data[2]),
NULL);
action = rave_sp_action_pack(data[RAVE_SP_FRAME_CODE_OFFSET],
data[RAVE_SP_FRAME_DATA_OFFSET]);
blocking_notifier_call_chain(&sp->event_notifier_list, action, NULL);
}
static void rave_sp_receive_reply(struct rave_sp *sp,
@@ -405,27 +418,35 @@ static void rave_sp_receive_reply(struct rave_sp *sp,
{
struct device *dev = &sp->serdev->dev;
struct rave_sp_reply *reply;
const size_t payload_length = length - 2;
size_t payload_length;
if (length < RAVE_SP_FRAME_DATA_OFFSET) {
dev_warn(dev, "Dropping short reply frame\n");
return;
}
payload_length = length - RAVE_SP_FRAME_DATA_OFFSET;
mutex_lock(&sp->reply_lock);
reply = sp->reply;
if (reply) {
if (reply->code == data[0] && reply->ackid == data[1] &&
if (reply->code == data[RAVE_SP_FRAME_CODE_OFFSET] &&
reply->ackid == data[RAVE_SP_FRAME_ACK_ID_OFFSET] &&
payload_length >= reply->length) {
/*
* We are relying on memcpy(dst, src, 0) to be a no-op
* when handling commands that have a no-payload reply
*/
memcpy(reply->data, &data[2], reply->length);
memcpy(reply->data, &data[RAVE_SP_FRAME_DATA_OFFSET],
reply->length);
complete(&reply->received);
sp->reply = NULL;
} else {
dev_err(dev, "Ignoring incorrect reply\n");
dev_dbg(dev, "Code: expected = 0x%08x received = 0x%08x\n",
reply->code, data[0]);
reply->code, data[RAVE_SP_FRAME_CODE_OFFSET]);
dev_dbg(dev, "ACK ID: expected = 0x%08x received = 0x%08x\n",
reply->ackid, data[1]);
reply->ackid, data[RAVE_SP_FRAME_ACK_ID_OFFSET]);
dev_dbg(dev, "Length: expected = %zu received = %zu\n",
reply->length, payload_length);
}
@@ -439,10 +460,10 @@ static void rave_sp_receive_frame(struct rave_sp *sp,
size_t length)
{
const size_t checksum_length = sp->variant->checksum->length;
const size_t payload_length = length - checksum_length;
const u8 *crc_reported = &data[payload_length];
struct device *dev = &sp->serdev->dev;
u8 crc_calculated[RAVE_SP_CHECKSUM_SIZE];
const u8 *crc_reported;
size_t payload_length;
if (unlikely(checksum_length > sizeof(crc_calculated))) {
dev_warn(dev, "Checksum too long, dropping\n");
@@ -457,6 +478,9 @@ static void rave_sp_receive_frame(struct rave_sp *sp,
return;
}
payload_length = length - checksum_length;
crc_reported = &data[payload_length];
sp->variant->checksum->subroutine(data, payload_length,
crc_calculated);
@@ -465,10 +489,10 @@ static void rave_sp_receive_frame(struct rave_sp *sp,
return;
}
if (rave_sp_id_is_event(data[0]))
rave_sp_receive_event(sp, data, length);
if (rave_sp_id_is_event(data[RAVE_SP_FRAME_CODE_OFFSET]))
rave_sp_receive_event(sp, data, payload_length);
else
rave_sp_receive_reply(sp, data, length);
rave_sp_receive_reply(sp, data, payload_length);
}
static size_t rave_sp_receive_buf(struct serdev_device *serdev,

View File

@@ -104,7 +104,7 @@ static const struct of_device_id rk8xx_spi_of_match[] = {
MODULE_DEVICE_TABLE(of, rk8xx_spi_of_match);
static const struct spi_device_id rk8xx_spi_id_table[] = {
{ "rk806", 0 },
{ .name = "rk806" },
{ }
};
MODULE_DEVICE_TABLE(spi, rk8xx_spi_id_table);

View File

@@ -5,8 +5,6 @@
* ROHM BD718[15/28/79] and BD72720 PMIC driver
*/
#include <linux/device/devres.h>
#include <linux/gfp_types.h>
#include <linux/i2c.h>
#include <linux/input.h>
#include <linux/interrupt.h>
@@ -19,10 +17,11 @@
#include <linux/mfd/rohm-generic.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include "rohm-pwrbutton.h"
#define BD72720_TYPED_IRQ_REG(_irq, _stat_offset, _mask, _type_offset) \
[_irq] = { \
.reg_offset = (_stat_offset), \
@@ -859,83 +858,7 @@ static int set_clk_mode(struct device *dev, struct regmap *regmap,
OUT32K_MODE_CMOS);
}
static const struct property_entry bd71828_powerkey_parent_props[] = {
PROPERTY_ENTRY_STRING("label", "bd71828-pwrkey"),
{ }
};
static const struct property_entry bd71828_powerkey_props[] = {
PROPERTY_ENTRY_U32("linux,code", KEY_POWER),
PROPERTY_ENTRY_BOOL("wakeup-source"),
{ }
};
#define GPIO_KEYS 0 /* Node corresponding to gpio-keys device itself */
#define PWRON_KEY 1 /* Node describing power button in gpio-keys */
static int bd71828_i2c_register_swnodes(const struct software_node *nodes)
{
const struct software_node * const node_group[] = {
&nodes[GPIO_KEYS], &nodes[PWRON_KEY], NULL
};
return software_node_register_node_group(node_group);
}
static void bd71828_i2c_unregister_swnodes(void *data)
{
const struct software_node *nodes = data;
const struct software_node * const node_group[] = {
&nodes[GPIO_KEYS], &nodes[PWRON_KEY], NULL
};
software_node_unregister_node_group(node_group);
}
static int bd71828_i2c_register_pwrbutton(struct device *dev, int button_irq,
struct irq_domain *irq_domain)
{
const struct resource res[] = {
DEFINE_RES_IRQ_NAMED(button_irq, "bd71828-pwrkey"),
};
struct mfd_cell gpio_keys_cell = {
.name = "gpio-keys",
.resources = res,
.num_resources = ARRAY_SIZE(res),
};
struct software_node *nodes;
int ret;
nodes = devm_kcalloc(dev, 2, sizeof(*nodes), GFP_KERNEL);
if (!nodes)
return -ENOMEM;
nodes[GPIO_KEYS].name = devm_kasprintf(dev, GFP_KERNEL, "%s-power-key", dev_name(dev));
if (!nodes[GPIO_KEYS].name)
return -ENOMEM;
nodes[GPIO_KEYS].properties = bd71828_powerkey_parent_props;
nodes[PWRON_KEY].parent = &nodes[GPIO_KEYS];
nodes[PWRON_KEY].properties = bd71828_powerkey_props;
ret = bd71828_i2c_register_swnodes(nodes);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, bd71828_i2c_unregister_swnodes, nodes);
if (ret)
return ret;
gpio_keys_cell.swnode = &nodes[GPIO_KEYS];
ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, &gpio_keys_cell, 1,
NULL, 0, irq_domain);
if (ret)
return dev_err_probe(dev, ret, "Failed to register power-button");
return 0;
}
static struct i2c_client *bd71828_dev;
static void bd71828_power_off(void)
@@ -1096,7 +1019,8 @@ static int bd71828_i2c_probe(struct i2c_client *i2c)
return dev_err_probe(&i2c->dev, ret, "Failed to create subdevices\n");
if (button_irq) {
ret = bd71828_i2c_register_pwrbutton(&i2c->dev, button_irq, irq_domain);
ret = rohm_register_pwrbutton(&i2c->dev, button_irq,
"bd71828-pwrkey", true, irq_domain);
if (ret)
return ret;
}

View File

@@ -7,8 +7,6 @@
// Datasheet for BD71837MWV available from
// https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
#include <linux/device/devres.h>
#include <linux/gfp_types.h>
#include <linux/i2c.h>
#include <linux/input.h>
#include <linux/interrupt.h>
@@ -16,10 +14,11 @@
#include <linux/mfd/core.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include "rohm-pwrbutton.h"
static struct mfd_cell bd71837_mfd_cells[] = {
{ .name = "bd71837-clk", },
{ .name = "bd71837-pmic", },
@@ -105,83 +104,7 @@ static int bd718xx_init_press_duration(struct regmap *regmap,
return 0;
}
static const struct property_entry bd718xx_powerkey_parent_props[] = {
PROPERTY_ENTRY_STRING("label", "bd718xx-pwrkey"),
{ }
};
static const struct property_entry bd718xx_powerkey_props[] = {
PROPERTY_ENTRY_U32("linux,code", KEY_POWER),
{ }
};
static const struct resource bd718xx_powerkey_resources[] = {
DEFINE_RES_IRQ_NAMED(BD718XX_INT_PWRBTN_S, "bd718xx-pwrkey"),
};
#define GPIO_KEYS 0 /* Node corresponding to gpio-keys device itself */
#define PWRON_KEY 1 /* Node describing power button in gpio-keys */
static int bd718xx_i2c_register_swnodes(const struct software_node *nodes)
{
const struct software_node * const node_group[] = {
&nodes[GPIO_KEYS], &nodes[PWRON_KEY], NULL
};
return software_node_register_node_group(node_group);
}
static void bd718xx_i2c_unregister_swnodes(void *data)
{
const struct software_node *nodes = data;
const struct software_node * const node_group[] = {
&nodes[GPIO_KEYS], &nodes[PWRON_KEY], NULL
};
software_node_unregister_node_group(node_group);
}
static int bd718xx_i2c_register_pwrbutton(struct device *dev,
struct irq_domain *irq_domain)
{
struct mfd_cell gpio_keys_cell = {
.name = "gpio-keys",
.resources = bd718xx_powerkey_resources,
.num_resources = ARRAY_SIZE(bd718xx_powerkey_resources),
};
struct software_node *nodes;
int ret;
nodes = devm_kcalloc(dev, 2, sizeof(*nodes), GFP_KERNEL);
if (!nodes)
return -ENOMEM;
nodes[GPIO_KEYS].name = devm_kasprintf(dev, GFP_KERNEL, "%s-power-key", dev_name(dev));
if (!nodes[GPIO_KEYS].name)
return -ENOMEM;
nodes[GPIO_KEYS].properties = bd718xx_powerkey_parent_props;
nodes[PWRON_KEY].parent = &nodes[GPIO_KEYS];
nodes[PWRON_KEY].properties = bd718xx_powerkey_props;
ret = bd718xx_i2c_register_swnodes(nodes);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, bd718xx_i2c_unregister_swnodes, nodes);
if (ret)
return ret;
gpio_keys_cell.swnode = &nodes[GPIO_KEYS];
ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, &gpio_keys_cell, 1,
NULL, 0, irq_domain);
if (ret)
return dev_err_probe(dev, ret, "Failed to register power-button");
return 0;
}
static int bd718xx_i2c_probe(struct i2c_client *i2c)
{
@@ -235,7 +158,8 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c)
if (ret)
return dev_err_probe(&i2c->dev, ret, "Failed to create subdevices\n");
ret = bd718xx_i2c_register_pwrbutton(&i2c->dev, irq_domain);
ret = rohm_register_pwrbutton(&i2c->dev, BD718XX_INT_PWRBTN_S,
"bd718xx-pwrkey", false, irq_domain);
if (ret)
return ret;

View File

@@ -0,0 +1,112 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Shared helper for ROHM PMIC power button registration
*
* Copyright 2018, 2019 ROHM Semiconductors
* Copyright 2026 Google LLC
*/
#include <linux/device/devres.h>
#include <linux/gfp_types.h>
#include <linux/input.h>
#include <linux/mfd/core.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/slab.h>
#include "rohm-pwrbutton.h"
#define GPIO_KEYS 0 /* Node corresponding to gpio-keys device itself */
#define PWRON_KEY 1 /* Node describing power button in gpio-keys */
static int rohm_pwrbutton_register_swnodes(const struct software_node *nodes)
{
const struct software_node * const node_group[] = {
&nodes[GPIO_KEYS], &nodes[PWRON_KEY], NULL
};
return software_node_register_node_group(node_group);
}
static void rohm_pwrbutton_unregister_swnodes(void *data)
{
const struct software_node *nodes = data;
const struct software_node * const node_group[] = {
&nodes[GPIO_KEYS], &nodes[PWRON_KEY], NULL
};
software_node_unregister_node_group(node_group);
}
int rohm_register_pwrbutton(struct device *dev, int irq, const char *name,
bool wakeup, struct irq_domain *irq_domain)
{
const struct resource res[] = {
DEFINE_RES_IRQ_NAMED(irq, name),
};
struct mfd_cell gpio_keys_cell = {
.name = "gpio-keys",
.resources = res,
.num_resources = ARRAY_SIZE(res),
};
struct property_entry *parent_props;
struct property_entry *child_props;
struct software_node *nodes;
int n_props;
int ret;
if (irq <= 0)
return -EINVAL;
nodes = devm_kcalloc(dev, 2, sizeof(*nodes), GFP_KERNEL);
if (!nodes)
return -ENOMEM;
nodes[GPIO_KEYS].name = devm_kasprintf(dev, GFP_KERNEL, "%s-power-key", dev_name(dev));
if (!nodes[GPIO_KEYS].name)
return -ENOMEM;
parent_props = devm_kcalloc(dev, 2, sizeof(*parent_props), GFP_KERNEL);
if (!parent_props)
return -ENOMEM;
parent_props[0] = PROPERTY_ENTRY_STRING("label", name);
nodes[GPIO_KEYS].properties = parent_props;
n_props = 2; /* linux,code and terminator */
if (wakeup)
n_props++;
child_props = devm_kcalloc(dev, n_props, sizeof(*child_props), GFP_KERNEL);
if (!child_props)
return -ENOMEM;
child_props[0] = PROPERTY_ENTRY_U32("linux,code", KEY_POWER);
if (wakeup)
child_props[1] = PROPERTY_ENTRY_BOOL("wakeup-source");
nodes[PWRON_KEY].parent = &nodes[GPIO_KEYS];
nodes[PWRON_KEY].properties = child_props;
ret = rohm_pwrbutton_register_swnodes(nodes);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, rohm_pwrbutton_unregister_swnodes, nodes);
if (ret)
return ret;
gpio_keys_cell.swnode = &nodes[GPIO_KEYS];
ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, &gpio_keys_cell, 1,
NULL, 0, irq_domain);
if (ret)
return dev_err_probe(dev, ret, "Failed to register power-button");
return 0;
}
EXPORT_SYMBOL_GPL(rohm_register_pwrbutton);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Dmitry Torokhov <dmitry.torokhov@gmail.com>");
MODULE_DESCRIPTION("Shared helper for ROHM PMIC power button registration");

View File

@@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef __LINUX_MFD_ROHM_PWRBUTTON_H__
#define __LINUX_MFD_ROHM_PWRBUTTON_H__
struct device;
struct irq_domain;
int rohm_register_pwrbutton(struct device *dev, int irq, const char *name,
bool wakeup, struct irq_domain *irq_domain);
#endif /* __LINUX_MFD_ROHM_PWRBUTTON_H__ */

View File

@@ -239,12 +239,12 @@ static void rsmu_spi_remove(struct spi_device *client)
}
static const struct spi_device_id rsmu_spi_id[] = {
{ "8a34000", RSMU_CM },
{ "8a34001", RSMU_CM },
{ "8a34002", RSMU_CM },
{ "82p33810", RSMU_SABRE },
{ "82p33811", RSMU_SABRE },
{}
{ .name = "8a34000", .driver_data = RSMU_CM },
{ .name = "8a34001", .driver_data = RSMU_CM },
{ .name = "8a34002", .driver_data = RSMU_CM },
{ .name = "82p33810", .driver_data = RSMU_SABRE },
{ .name = "82p33811", .driver_data = RSMU_SABRE },
{ }
};
MODULE_DEVICE_TABLE(spi, rsmu_spi_id);

View File

@@ -15,7 +15,6 @@
#include <linux/atomic.h>
#include <linux/i2c.h>
#include <linux/device.h>
#include <linux/gpio.h>
#include <linux/videodev2.h>
#include <linux/mfd/si476x-core.h>

View File

@@ -13,7 +13,7 @@
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include <linux/i2c.h>
#include <linux/err.h>
@@ -130,8 +130,7 @@ int si476x_core_start(struct si476x_core *core, bool soft)
int err;
if (!soft) {
if (gpio_is_valid(core->gpio_reset))
gpio_set_value_cansleep(core->gpio_reset, 1);
gpiod_set_value_cansleep(core->reset, 0);
if (client->irq)
enable_irq(client->irq);
@@ -197,8 +196,7 @@ int si476x_core_start(struct si476x_core *core, bool soft)
else
cancel_delayed_work_sync(&core->status_monitor);
if (gpio_is_valid(core->gpio_reset))
gpio_set_value_cansleep(core->gpio_reset, 0);
gpiod_set_value_cansleep(core->reset, 1);
return err;
}
@@ -242,10 +240,9 @@ int si476x_core_stop(struct si476x_core *core, bool soft)
else
cancel_delayed_work_sync(&core->status_monitor);
if (!soft) {
if (gpio_is_valid(core->gpio_reset))
gpio_set_value_cansleep(core->gpio_reset, 0);
}
if (!soft)
gpiod_set_value_cansleep(core->reset, 1);
return err;
}
EXPORT_SYMBOL_GPL(si476x_core_stop);
@@ -712,24 +709,18 @@ static int si476x_core_probe(struct i2c_client *client)
atomic_set(&core->is_alive, 0);
core->power_state = SI476X_POWER_DOWN;
core->reset = devm_gpiod_get_optional(&client->dev, "reset",
GPIOD_OUT_HIGH);
if (IS_ERR(core->reset))
return dev_err_probe(&client->dev, PTR_ERR(core->reset),
"error getting reset GPIO\n");
gpiod_set_consumer_name(core->reset, "si476x reset");
pdata = dev_get_platdata(&client->dev);
if (pdata) {
memcpy(&core->power_up_parameters,
&pdata->power_up_parameters,
sizeof(core->power_up_parameters));
core->gpio_reset = -1;
if (gpio_is_valid(pdata->gpio_reset)) {
rval = gpio_request(pdata->gpio_reset, "si476x reset");
if (rval) {
dev_err(&client->dev,
"Failed to request gpio: %d\n", rval);
return rval;
}
core->gpio_reset = pdata->gpio_reset;
gpio_direction_output(core->gpio_reset, 0);
}
core->diversity_mode = pdata->diversity_mode;
memcpy(&core->pinmux, &pdata->pinmux,
sizeof(struct si476x_pinmux));
@@ -748,7 +739,7 @@ static int si476x_core_probe(struct i2c_client *client)
core->supplies);
if (rval) {
dev_err(&client->dev, "Failed to get all of the regulators\n");
goto free_gpio;
return rval;
}
mutex_init(&core->cmd_lock);
@@ -761,7 +752,7 @@ static int si476x_core_probe(struct i2c_client *client)
GFP_KERNEL);
if (rval) {
dev_err(&client->dev, "Could not allocate the FIFO\n");
goto free_gpio;
return rval;
}
mutex_init(&core->rds_drainer_status_lock);
init_waitqueue_head(&core->rds_read_queue);
@@ -827,11 +818,6 @@ static int si476x_core_probe(struct i2c_client *client)
free_kfifo:
kfifo_free(&core->rds_fifo);
free_gpio:
if (gpio_is_valid(core->gpio_reset))
gpio_free(core->gpio_reset);
return rval;
}
@@ -848,9 +834,6 @@ static void si476x_core_remove(struct i2c_client *client)
cancel_delayed_work_sync(&core->status_monitor);
kfifo_free(&core->rds_fifo);
if (gpio_is_valid(core->gpio_reset))
gpio_free(core->gpio_reset);
}

View File

@@ -1627,6 +1627,7 @@ static void sm501_pci_remove(struct pci_dev *dev)
release_mem_region(sm->io_res->start, 0x100);
pci_disable_device(dev);
kfree(sm);
}
static void sm501_plat_remove(struct platform_device *dev)
@@ -1637,6 +1638,7 @@ static void sm501_plat_remove(struct platform_device *dev)
iounmap(sm->regs);
release_mem_region(sm->io_res->start, 0x100);
kfree(sm);
}
static const struct pci_device_id sm501_pci_tbl[] = {

View File

@@ -61,6 +61,7 @@ static const struct mfd_cell sc2730_devices[] = {
MFD_CELL_OF("sc2730-efuse", NULL, NULL, 0, 0, "sprd,sc2730-efuse"),
MFD_CELL_OF("sc2730-eic", NULL, NULL, 0, 0, "sprd,sc2730-eic"),
MFD_CELL_OF("sc2730-fgu", NULL, NULL, 0, 0, "sprd,sc2730-fgu"),
MFD_CELL_NAME("sc2730-regulator"),
MFD_CELL_OF("sc2730-rtc", NULL, NULL, 0, 0, "sprd,sc2730-rtc"),
MFD_CELL_OF("sc2730-vibrator", NULL, NULL, 0, 0, "sprd,sc2730-vibrator"),
};
@@ -294,7 +295,7 @@ MODULE_DEVICE_TABLE(of, sprd_pmic_match);
static const struct spi_device_id sprd_pmic_spi_ids[] = {
{ .name = "sc2730", .driver_data = PMIC_TYPE_SC2730 },
{ .name = "sc2731", .driver_data = PMIC_TYPE_SC2731 },
{},
{ }
};
MODULE_DEVICE_TABLE(spi, sprd_pmic_spi_ids);

View File

@@ -121,12 +121,12 @@ static const struct of_device_id stmpe_spi_of_match[] = {
MODULE_DEVICE_TABLE(of, stmpe_spi_of_match);
static const struct spi_device_id stmpe_spi_id[] = {
{ "stmpe610", STMPE610 },
{ "stmpe801", STMPE801 },
{ "stmpe811", STMPE811 },
{ "stmpe1601", STMPE1601 },
{ "stmpe2401", STMPE2401 },
{ "stmpe2403", STMPE2403 },
{ .name = "stmpe610", .driver_data = STMPE610 },
{ .name = "stmpe801", .driver_data = STMPE801 },
{ .name = "stmpe811", .driver_data = STMPE811 },
{ .name = "stmpe1601", .driver_data = STMPE1601 },
{ .name = "stmpe2401", .driver_data = STMPE2401 },
{ .name = "stmpe2403", .driver_data = STMPE2403 },
{ }
};
MODULE_DEVICE_TABLE(spi, stmpe_spi_id);

View File

@@ -43,7 +43,7 @@ static int tps65912_spi_probe(struct spi_device *spi)
}
static const struct spi_device_id tps65912_spi_id_table[] = {
{ "tps65912", 0 },
{ .name = "tps65912" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(spi, tps65912_spi_id_table);

View File

@@ -6,15 +6,18 @@
*
* We handle the machine-specific bits of the UCB1x00 driver here.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/fs.h>
#include <linux/gpio_keys.h>
#include <linux/gpio/machine.h>
#include <linux/gpio/property.h>
#include <linux/init.h>
#include <linux/input.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/proc_fs.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/mfd/ucb1x00.h>
#define UCB1X00_ATTR(name,input)\
@@ -34,50 +37,119 @@ UCB1X00_ATTR(vbatt, UCB_ADC_INP_AD1);
UCB1X00_ATTR(vcharger, UCB_ADC_INP_AD0);
UCB1X00_ATTR(batt_temp, UCB_ADC_INP_AD2);
static const struct property_entry ucb1x00_gpio_keys_props[] = {
PROPERTY_ENTRY_STRING("label", "ucb1x00"),
PROPERTY_ENTRY_U32("poll-interval", 50),
{ }
};
#define UCB1X00_BTN_PROPS(_idx) \
struct property_entry ucb1x00_btn##_idx##_props[] = { \
PROPERTY_ENTRY_U32("linux,code", BTN_0 + (_idx)), \
PROPERTY_ENTRY_GPIO("gpios", &ucb1x00_gpiochip_node, \
_idx, GPIO_ACTIVE_HIGH), \
PROPERTY_ENTRY_STRING("label", "btn" #_idx), \
PROPERTY_ENTRY_BOOL("linux,can-disable"), \
{ } \
}
static const UCB1X00_BTN_PROPS(0);
static const UCB1X00_BTN_PROPS(1);
static const UCB1X00_BTN_PROPS(2);
static const UCB1X00_BTN_PROPS(3);
static const UCB1X00_BTN_PROPS(4);
static const UCB1X00_BTN_PROPS(5);
static const struct property_entry * const ucb1x00_btn_props[] = {
ucb1x00_btn0_props,
ucb1x00_btn1_props,
ucb1x00_btn2_props,
ucb1x00_btn3_props,
ucb1x00_btn4_props,
ucb1x00_btn5_props,
};
struct ucb1x00_assabet_priv {
struct platform_device *pdev;
struct fwnode_handle *keys_node;
struct fwnode_handle *button_nodes[ARRAY_SIZE(ucb1x00_btn_props)];
};
static void ucb1x00_assabet_remove_nodes(struct ucb1x00_assabet_priv *priv, int n)
{
while (--n >= 0)
fwnode_remove_software_node(priv->button_nodes[n]);
fwnode_remove_software_node(priv->keys_node);
}
static int ucb1x00_assabet_add(struct ucb1x00_dev *dev)
{
struct ucb1x00 *ucb = dev->ucb;
struct platform_device *pdev;
struct gpio_keys_platform_data keys;
static struct gpio_keys_button buttons[6];
unsigned i;
struct platform_device_info pdevinfo = {
.name = "gpio-keys",
.id = PLATFORM_DEVID_NONE,
.parent = &ucb->dev,
};
int ret;
int i;
memset(buttons, 0, sizeof(buttons));
memset(&keys, 0, sizeof(keys));
struct ucb1x00_assabet_priv *priv;
for (i = 0; i < ARRAY_SIZE(buttons); i++) {
buttons[i].code = BTN_0 + i;
buttons[i].gpio = ucb->gpio.base + i;
buttons[i].type = EV_KEY;
buttons[i].can_disable = true;
priv = kzalloc_obj(*priv, GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->keys_node = fwnode_create_software_node(ucb1x00_gpio_keys_props, NULL);
if (IS_ERR(priv->keys_node)) {
ret = PTR_ERR(priv->keys_node);
goto err_free_priv;
}
keys.buttons = buttons;
keys.nbuttons = ARRAY_SIZE(buttons);
keys.poll_interval = 50;
keys.name = "ucb1x00";
for (i = 0; i < ARRAY_SIZE(ucb1x00_btn_props); i++) {
priv->button_nodes[i] = fwnode_create_software_node(ucb1x00_btn_props[i],
priv->keys_node);
if (IS_ERR(priv->button_nodes[i])) {
ret = PTR_ERR(priv->button_nodes[i]);
goto err_free_buttons;
}
}
pdev = platform_device_register_data(&ucb->dev, "gpio-keys", -1,
&keys, sizeof(keys));
pdevinfo.fwnode = priv->keys_node;
priv->pdev = platform_device_register_full(&pdevinfo);
ret = PTR_ERR_OR_ZERO(priv->pdev);
if (ret)
goto err_free_buttons;
device_create_file(&ucb->dev, &dev_attr_vbatt);
device_create_file(&ucb->dev, &dev_attr_vcharger);
device_create_file(&ucb->dev, &dev_attr_batt_temp);
dev->priv = pdev;
dev->priv = priv;
return 0;
err_free_buttons:
ucb1x00_assabet_remove_nodes(priv, i);
err_free_priv:
kfree(priv);
return ret;
}
static void ucb1x00_assabet_remove(struct ucb1x00_dev *dev)
{
struct platform_device *pdev = dev->priv;
struct ucb1x00_assabet_priv *priv = dev->priv;
if (!IS_ERR(pdev))
platform_device_unregister(pdev);
if (!IS_ERR(priv->pdev))
platform_device_unregister(priv->pdev);
ucb1x00_assabet_remove_nodes(priv, ARRAY_SIZE(priv->button_nodes));
device_remove_file(&dev->ucb->dev, &dev_attr_batt_temp);
device_remove_file(&dev->ucb->dev, &dev_attr_vcharger);
device_remove_file(&dev->ucb->dev, &dev_attr_vbatt);
kfree(priv);
}
static struct ucb1x00_driver ucb1x00_assabet_driver = {

View File

@@ -25,6 +25,7 @@
#include <linux/mutex.h>
#include <linux/mfd/ucb1x00.h>
#include <linux/pm.h>
#include <linux/property.h>
#include <linux/gpio/driver.h>
static DEFINE_MUTEX(ucb1x00_mutex);
@@ -492,6 +493,11 @@ static struct class ucb1x00_class = {
.dev_release = ucb1x00_release,
};
const struct software_node ucb1x00_gpiochip_node = {
.name = "ucb1x00-gpio",
};
EXPORT_SYMBOL_GPL(ucb1x00_gpiochip_node);
static int ucb1x00_probe(struct mcp *mcp)
{
struct ucb1x00_plat_data *pdata = mcp->attached_device.platform_data;
@@ -530,6 +536,10 @@ static int ucb1x00_probe(struct mcp *mcp)
ucb->id = id;
ucb->mcp = mcp;
ret = device_add_software_node(&ucb->dev, &ucb1x00_gpiochip_node);
if (ret)
goto err_swnode_add;
ret = device_add(&ucb->dev);
if (ret)
goto err_dev_add;
@@ -604,6 +614,8 @@ static int ucb1x00_probe(struct mcp *mcp)
err_no_irq:
device_del(&ucb->dev);
err_dev_add:
device_remove_software_node(&ucb->dev);
err_swnode_add:
put_device(&ucb->dev);
out:
if (pdata && pdata->reset)
@@ -630,7 +642,9 @@ static void ucb1x00_remove(struct mcp *mcp)
irq_set_chained_handler(ucb->irq, NULL);
irq_free_descs(ucb->irq_base, 16);
device_unregister(&ucb->dev);
device_del(&ucb->dev);
device_remove_software_node(&ucb->dev);
put_device(&ucb->dev);
if (pdata && pdata->reset)
pdata->reset(UCB_RST_REMOVE);

View File

@@ -96,8 +96,7 @@ static int vprbrd_probe(struct usb_interface *interface,
return 0;
error:
if (vb)
kfree(vb);
kfree(vb);
return ret;
}

View File

@@ -77,14 +77,14 @@ static const struct dev_pm_ops wm831x_spi_pm = {
};
static const struct spi_device_id wm831x_spi_ids[] = {
{ "wm8310", WM8310 },
{ "wm8311", WM8311 },
{ "wm8312", WM8312 },
{ "wm8320", WM8320 },
{ "wm8321", WM8321 },
{ "wm8325", WM8325 },
{ "wm8326", WM8326 },
{ },
{ .name = "wm8310", .driver_data = WM8310 },
{ .name = "wm8311", .driver_data = WM8311 },
{ .name = "wm8312", .driver_data = WM8312 },
{ .name = "wm8320", .driver_data = WM8320 },
{ .name = "wm8321", .driver_data = WM8321 },
{ .name = "wm8325", .driver_data = WM8325 },
{ .name = "wm8326", .driver_data = WM8326 },
{ }
};
static struct spi_driver wm831x_spi_driver = {

View File

@@ -946,6 +946,27 @@ u32 cros_ec_get_host_event(struct cros_ec_device *ec_dev)
}
EXPORT_SYMBOL(cros_ec_get_host_event);
/**
* cros_ec_read_features() - Read EC features
*
* @ec: EC device.
*
* Return: >= 0 on success, negative error number on failure.
*/
int cros_ec_read_features(struct cros_ec_dev *ec)
{
int ret = cros_ec_cmd(ec->ec_dev, 0, EC_CMD_GET_FEATURES + ec->cmd_offset,
NULL, 0, &ec->features, sizeof(ec->features));
if (ret < 0) {
dev_warn(ec->dev, "cannot get EC features: %d\n", ret);
memset(&ec->features, 0, sizeof(ec->features));
}
return ret;
}
EXPORT_SYMBOL_GPL(cros_ec_read_features);
/**
* cros_ec_check_features() - Test for the presence of EC features
*
@@ -960,17 +981,10 @@ EXPORT_SYMBOL(cros_ec_get_host_event);
bool cros_ec_check_features(struct cros_ec_dev *ec, int feature)
{
struct ec_response_get_features *features = &ec->features;
int ret;
if (features->flags[0] == -1U && features->flags[1] == -1U) {
/* features bitmap not read yet */
ret = cros_ec_cmd(ec->ec_dev, 0, EC_CMD_GET_FEATURES + ec->cmd_offset,
NULL, 0, features, sizeof(*features));
if (ret < 0) {
dev_warn(ec->dev, "cannot get EC features: %d\n", ret);
memset(features, 0, sizeof(*features));
}
cros_ec_read_features(ec);
dev_dbg(ec->dev, "EC features %08x %08x\n",
features->flags[0], features->flags[1]);
}

View File

@@ -13,7 +13,7 @@
#include <linux/err.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/db8500-prcmu.h>
@@ -93,13 +93,13 @@ static int enable_epod(u16 epod_id, bool ramret)
if (ramret) {
if (!epod_on[epod_id]) {
ret = prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
if (ret < 0)
return ret;
}
epod_ramret[epod_id] = true;
} else {
ret = prcmu_set_epod(epod_id, EPOD_STATE_ON);
ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_ON);
if (ret < 0)
return ret;
epod_on[epod_id] = true;
@@ -114,18 +114,18 @@ static int disable_epod(u16 epod_id, bool ramret)
if (ramret) {
if (!epod_on[epod_id]) {
ret = prcmu_set_epod(epod_id, EPOD_STATE_OFF);
ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_OFF);
if (ret < 0)
return ret;
}
epod_ramret[epod_id] = false;
} else {
if (epod_ramret[epod_id]) {
ret = prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
if (ret < 0)
return ret;
} else {
ret = prcmu_set_epod(epod_id, EPOD_STATE_OFF);
ret = db8500_prcmu_set_epod(epod_id, EPOD_STATE_OFF);
if (ret < 0)
return ret;
}

View File

@@ -10,7 +10,7 @@
#include <linux/cpu_cooling.h>
#include <linux/interrupt.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
@@ -82,7 +82,7 @@ static void db8500_thermal_update_config(struct db8500_thermal_zone *th,
unsigned long next_low,
unsigned long next_high)
{
prcmu_stop_temp_sense();
db8500_prcmu_stop_temp_sense();
th->cur_index = idx;
th->interpolated_temp = (next_low + next_high)/2;
@@ -91,8 +91,8 @@ static void db8500_thermal_update_config(struct db8500_thermal_zone *th,
* The PRCMU accept absolute temperatures in celsius so divide
* down the millicelsius with 1000
*/
prcmu_config_hotmon((u8)(next_low/1000), (u8)(next_high/1000));
prcmu_start_temp_sense(PRCMU_DEFAULT_MEASURE_TIME);
db8500_prcmu_config_hotmon((u8)(next_low / 1000), (u8)(next_high / 1000));
db8500_prcmu_start_temp_sense(PRCMU_DEFAULT_MEASURE_TIME);
}
static irqreturn_t prcmu_low_irq_handler(int irq, void *irq_data)
@@ -200,7 +200,7 @@ static int db8500_thermal_probe(struct platform_device *pdev)
static int db8500_thermal_suspend(struct platform_device *pdev,
pm_message_t state)
{
prcmu_stop_temp_sense();
db8500_prcmu_stop_temp_sense();
return 0;
}

View File

@@ -16,7 +16,7 @@
#include <linux/watchdog.h>
#include <linux/platform_device.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#define WATCHDOG_TIMEOUT 600 /* 10 minutes */
@@ -37,24 +37,24 @@ MODULE_PARM_DESC(nowayout,
static int db8500_wdt_start(struct watchdog_device *wdd)
{
return prcmu_enable_a9wdog(PRCMU_WDOG_ALL);
return db8500_prcmu_enable_a9wdog(PRCMU_WDOG_ALL);
}
static int db8500_wdt_stop(struct watchdog_device *wdd)
{
return prcmu_disable_a9wdog(PRCMU_WDOG_ALL);
return db8500_prcmu_disable_a9wdog(PRCMU_WDOG_ALL);
}
static int db8500_wdt_keepalive(struct watchdog_device *wdd)
{
return prcmu_kick_a9wdog(PRCMU_WDOG_ALL);
return db8500_prcmu_kick_a9wdog(PRCMU_WDOG_ALL);
}
static int db8500_wdt_set_timeout(struct watchdog_device *wdd,
unsigned int timeout)
{
db8500_wdt_stop(wdd);
prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_wdt_start(wdd);
return 0;
@@ -91,10 +91,10 @@ static int db8500_wdt_probe(struct platform_device *pdev)
watchdog_set_nowayout(&db8500_wdt, nowayout);
/* disable auto off on sleep */
prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
db8500_prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
/* set HW initial value */
prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
ret = devm_watchdog_register_device(dev, &db8500_wdt);
if (ret)
@@ -110,9 +110,9 @@ static int db8500_wdt_suspend(struct platform_device *pdev,
{
if (watchdog_active(&db8500_wdt)) {
db8500_wdt_stop(&db8500_wdt);
prcmu_config_a9wdog(PRCMU_WDOG_CPU1, true);
db8500_prcmu_config_a9wdog(PRCMU_WDOG_CPU1, true);
prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_wdt_start(&db8500_wdt);
}
return 0;
@@ -122,9 +122,9 @@ static int db8500_wdt_resume(struct platform_device *pdev)
{
if (watchdog_active(&db8500_wdt)) {
db8500_wdt_stop(&db8500_wdt);
prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
db8500_prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
db8500_wdt_start(&db8500_wdt);
}
return 0;

View File

@@ -11,6 +11,7 @@
#define PM886_PAGE_OFFSET_REGULATORS 1
#define PM886_PAGE_OFFSET_GPADC 2
#define PM886_PAGE_OFFSET_BATTERY 3
#define PM886_REG_ID 0x00
@@ -128,9 +129,13 @@
#define PM886_GPADC_BIAS_LEVELS 16
#define PM886_GPADC_INDEX_TO_BIAS_uA(i) (1 + (i) * 5)
/* Battery block register definitions */
#define PM886_REG_CLS_CONFIG1 0x71
struct pm886_chip {
struct i2c_client *client;
unsigned int chip_id;
struct regmap *regmap;
struct regmap *regmap_battery;
};
#endif /* __MFD_88PM886_H */

View File

@@ -86,7 +86,6 @@ struct cs42l43 {
struct regmap_irq_chip_data *irq_data;
struct work_struct boot_work;
struct completion device_attach;
struct completion device_detach;
struct completion firmware_download;
int firmware_error;
@@ -96,7 +95,6 @@ struct cs42l43 {
struct mutex pll_lock;
bool sdw_pll_active;
bool attached;
bool hw_lock;
long variant_id;
};

View File

@@ -12,6 +12,9 @@
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/err.h>
#include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
/*
* Registers
@@ -24,6 +27,38 @@
#define DB8500_PRCM_DSI_SW_RESET_DSI1_SW_RESETN BIT(1)
#define DB8500_PRCM_DSI_SW_RESET_DSI2_SW_RESETN BIT(2)
/* Offset for the firmware version within the TCPM */
#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
#define DB8500_PRCMU_LEGACY_OFFSET 0xDD4
/*
* CLKOUT sources
*/
#define PRCMU_CLKSRC_CLK38M 0x00
#define PRCMU_CLKSRC_ACLK 0x01
#define PRCMU_CLKSRC_SYSCLK 0x02
#define PRCMU_CLKSRC_LCDCLK 0x03
#define PRCMU_CLKSRC_SDMMCCLK 0x04
#define PRCMU_CLKSRC_TVCLK 0x05
#define PRCMU_CLKSRC_TIMCLK 0x06
#define PRCMU_CLKSRC_CLK009 0x07
/* These are only valid for CLKOUT1: */
#define PRCMU_CLKSRC_SIAMMDSPCLK 0x40
#define PRCMU_CLKSRC_I2CCLK 0x41
#define PRCMU_CLKSRC_MSP02CLK 0x42
#define PRCMU_CLKSRC_ARMPLL_OBSCLK 0x43
#define PRCMU_CLKSRC_HSIRXCLK 0x44
#define PRCMU_CLKSRC_HSITXCLK 0x45
#define PRCMU_CLKSRC_ARMCLKFIX 0x46
#define PRCMU_CLKSRC_HDMICLK 0x47
/*
* Definitions for controlling ESRAM0 in deep sleep.
*/
#define ESRAM0_DEEP_SLEEP_STATE_OFF 1
#define ESRAM0_DEEP_SLEEP_STATE_RET 2
/* This portion previously known as <mach/prcmu-fw-defs_v1.h> */
/**
@@ -451,10 +486,173 @@ enum prcmu_power_status {
PRCMU_ARMPENDINGIT_ER = 0x93,
};
/* PRCMU Wakeup defines */
enum prcmu_wakeup_index {
PRCMU_WAKEUP_INDEX_RTC,
PRCMU_WAKEUP_INDEX_RTT0,
PRCMU_WAKEUP_INDEX_RTT1,
PRCMU_WAKEUP_INDEX_HSI0,
PRCMU_WAKEUP_INDEX_HSI1,
PRCMU_WAKEUP_INDEX_USB,
PRCMU_WAKEUP_INDEX_ABB,
PRCMU_WAKEUP_INDEX_ABB_FIFO,
PRCMU_WAKEUP_INDEX_ARM,
PRCMU_WAKEUP_INDEX_CD_IRQ,
NUM_PRCMU_WAKEUP_INDICES
};
#define PRCMU_WAKEUP(_name) (BIT(PRCMU_WAKEUP_INDEX_##_name))
/**
* enum prcmu_wdog_id - PRCMU watchdog IDs
* @PRCMU_WDOG_ALL: use all timers
* @PRCMU_WDOG_CPU1: use first CPU timer only
* @PRCMU_WDOG_CPU2: use second CPU timer conly
*/
enum prcmu_wdog_id {
PRCMU_WDOG_ALL = 0x00,
PRCMU_WDOG_CPU1 = 0x01,
PRCMU_WDOG_CPU2 = 0x02,
};
/**
* enum ape_opp - APE OPP states definition
* @APE_OPP_INIT:
* @APE_NO_CHANGE: The APE operating point is unchanged
* @APE_100_OPP: The new APE operating point is ape100opp
* @APE_50_OPP: 50%
* @APE_50_PARTLY_25_OPP: 50%, except some clocks at 25%.
*/
enum ape_opp {
APE_OPP_INIT = 0x00,
APE_NO_CHANGE = 0x01,
APE_100_OPP = 0x02,
APE_50_OPP = 0x03,
APE_50_PARTLY_25_OPP = 0xFF,
};
/**
* enum arm_opp - ARM OPP states definition
* @ARM_OPP_INIT:
* @ARM_NO_CHANGE: The ARM operating point is unchanged
* @ARM_100_OPP: The new ARM operating point is arm100opp
* @ARM_50_OPP: The new ARM operating point is arm50opp
* @ARM_MAX_OPP: Operating point is "max" (more than 100)
* @ARM_MAX_FREQ100OPP: Set max opp if available, else 100
* @ARM_EXTCLK: The new ARM operating point is armExtClk
*/
enum arm_opp {
ARM_OPP_INIT = 0x00,
ARM_NO_CHANGE = 0x01,
ARM_100_OPP = 0x02,
ARM_50_OPP = 0x03,
ARM_MAX_OPP = 0x04,
ARM_MAX_FREQ100OPP = 0x05,
ARM_EXTCLK = 0x07
};
/**
* enum ddr_opp - DDR OPP states definition
* @DDR_100_OPP: The new DDR operating point is ddr100opp
* @DDR_50_OPP: The new DDR operating point is ddr50opp
* @DDR_25_OPP: The new DDR operating point is ddr25opp
*/
enum ddr_opp {
DDR_100_OPP = 0x00,
DDR_50_OPP = 0x01,
DDR_25_OPP = 0x02,
};
/**
* enum ddr_pwrst - DDR power states definition
* @DDR_PWR_STATE_UNCHANGED: SDRAM and DDR controller state is unchanged
* @DDR_PWR_STATE_ON:
* @DDR_PWR_STATE_OFFLOWLAT:
* @DDR_PWR_STATE_OFFHIGHLAT:
*/
enum ddr_pwrst {
DDR_PWR_STATE_UNCHANGED = 0x00,
DDR_PWR_STATE_ON = 0x01,
DDR_PWR_STATE_OFFLOWLAT = 0x02,
DDR_PWR_STATE_OFFHIGHLAT = 0x03
};
/*
* Definitions for autonomous power management configuration.
*/
/* EPOD (power domain) IDs */
/*
* DB8500 EPODs
* - EPOD_ID_SVAMMDSP: power domain for SVA MMDSP
* - EPOD_ID_SVAPIPE: power domain for SVA pipe
* - EPOD_ID_SIAMMDSP: power domain for SIA MMDSP
* - EPOD_ID_SIAPIPE: power domain for SIA pipe
* - EPOD_ID_SGA: power domain for SGA
* - EPOD_ID_B2R2_MCDE: power domain for B2R2 and MCDE
* - EPOD_ID_ESRAM12: power domain for ESRAM 1 and 2
* - EPOD_ID_ESRAM34: power domain for ESRAM 3 and 4
* - NUM_EPOD_ID: number of power domains
*
* TODO: These should be prefixed.
*/
#define EPOD_ID_SVAMMDSP 0
#define EPOD_ID_SVAPIPE 1
#define EPOD_ID_SIAMMDSP 2
#define EPOD_ID_SIAPIPE 3
#define EPOD_ID_SGA 4
#define EPOD_ID_B2R2_MCDE 5
#define EPOD_ID_ESRAM12 6
#define EPOD_ID_ESRAM34 7
#define NUM_EPOD_ID 8
/*
* state definition for EPOD (power domain)
* - EPOD_STATE_NO_CHANGE: The EPOD should remain unchanged
* - EPOD_STATE_OFF: The EPOD is switched off
* - EPOD_STATE_RAMRET: The EPOD is switched off with its internal RAM in
* retention
* - EPOD_STATE_ON_CLK_OFF: The EPOD is switched on, clock is still off
* - EPOD_STATE_ON: Same as above, but with clock enabled
*/
#define EPOD_STATE_NO_CHANGE 0x00
#define EPOD_STATE_OFF 0x01
#define EPOD_STATE_RAMRET 0x02
#define EPOD_STATE_ON_CLK_OFF 0x03
#define EPOD_STATE_ON 0x04
#define PRCMU_FW_PROJECT_U8500 2
#define PRCMU_FW_PROJECT_U8400 3
#define PRCMU_FW_PROJECT_U9500 4 /* Customer specific */
#define PRCMU_FW_PROJECT_U8500_MBB 5
#define PRCMU_FW_PROJECT_U8500_C1 6
#define PRCMU_FW_PROJECT_U8500_C2 7
#define PRCMU_FW_PROJECT_U8500_C3 8
#define PRCMU_FW_PROJECT_U8500_C4 9
#define PRCMU_FW_PROJECT_U9500_MBL 10
#define PRCMU_FW_PROJECT_U8500_SSG1 11 /* Samsung specific */
#define PRCMU_FW_PROJECT_U8500_MBL2 12 /* Customer specific */
#define PRCMU_FW_PROJECT_U8520 13
#define PRCMU_FW_PROJECT_U8420 14
#define PRCMU_FW_PROJECT_U8500_SSG2 15 /* Samsung specific */
#define PRCMU_FW_PROJECT_U8420_SYSCLK 17
#define PRCMU_FW_PROJECT_A9420 20
/* [32..63] 9540 and derivatives */
#define PRCMU_FW_PROJECT_U9540 32
/* [64..95] 8540 and derivatives */
#define PRCMU_FW_PROJECT_L8540 64
/* [96..126] 8580 and derivatives */
#define PRCMU_FW_PROJECT_L8580 96
#define PRCMU_FW_PROJECT_NAME_LEN 20
/* PRCMU QoS APE OPP class */
#define PRCMU_QOS_APE_OPP 1
#define PRCMU_QOS_DDR_OPP 2
#define PRCMU_QOS_ARM_OPP 3
#define PRCMU_QOS_DEFAULT_VALUE -1
#define PRCMU_AUTO_PM_OFF 0
#define PRCMU_AUTO_PM_ON 1
@@ -469,6 +667,14 @@ enum prcmu_auto_pm_policy {
PRCMU_AUTO_PM_POLICY_DSP_CLK_OFF_HWP_CLK_OFF,
};
struct prcmu_fw_version {
u32 project; /* Notice, project shifted with 8 on ux540 */
u8 api_version;
u8 func_version;
u8 errata;
char project_name[PRCMU_FW_PROJECT_NAME_LEN];
};
/**
* struct prcmu_auto_pm_config - Autonomous power management configuration.
* @sia_auto_pm_enable: SIA autonomous pm enable. (PRCMU_AUTO_PM_{OFF,ON})
@@ -501,6 +707,9 @@ void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep,
bool prcmu_is_auto_pm_enabled(void);
int prcmu_config_clkout(u8 clkout, u8 source, u8 div);
unsigned long prcmu_clock_rate(u8 clock);
long prcmu_round_clock_rate(u8 clock, unsigned long rate);
int prcmu_set_clock_rate(u8 clock, unsigned long rate);
int prcmu_set_clock_divider(u8 clock, u8 divider);
int db8500_prcmu_config_hotdog(u8 threshold);
int db8500_prcmu_config_hotmon(u8 low, u8 high);
@@ -508,6 +717,8 @@ int db8500_prcmu_start_temp_sense(u16 cycles32k);
int db8500_prcmu_stop_temp_sense(void);
int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size);
int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size);
int prcmu_abb_write_masked(u8 slave, u8 reg, u8 *value,
u8 *mask, u8 size);
int prcmu_ac_wake_req(void);
void prcmu_ac_sleep_req(void);
@@ -610,6 +821,21 @@ static inline int prcmu_config_clkout(u8 clkout, u8 source, u8 div)
return 0;
}
static inline unsigned long prcmu_clock_rate(u8 clock)
{
return 0;
}
static inline long prcmu_round_clock_rate(u8 clock, unsigned long rate)
{
return 0;
}
static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate)
{
return 0;
}
static inline int prcmu_set_clock_divider(u8 clock, u8 divider)
{
return 0;
@@ -637,12 +863,18 @@ static inline int db8500_prcmu_stop_temp_sense(void)
static inline int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size)
{
return -ENOSYS;
return -EINVAL;
}
static inline int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size)
{
return -ENOSYS;
return -EINVAL;
}
static inline int prcmu_abb_write_masked(u8 slave, u8 reg,
u8 *value, u8 *mask, u8 size)
{
return -EINVAL;
}
static inline int prcmu_ac_wake_req(void)
@@ -745,4 +977,20 @@ static inline void db8500_prcmu_write_masked(unsigned int reg, u32 mask,
#endif /* !CONFIG_MFD_DB8500_PRCMU */
static inline int prcmu_qos_add_requirement(int prcmu_qos_class,
char *name, s32 value)
{
return 0;
}
static inline int prcmu_qos_update_requirement(int prcmu_qos_class,
char *name, s32 new_value)
{
return 0;
}
static inline void prcmu_qos_remove_requirement(int prcmu_qos_class, char *name)
{
}
#endif /* __MFD_DB8500_PRCMU_H */

View File

@@ -1,575 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) ST Ericsson SA 2011
*
* STE Ux500 PRCMU API
*/
#ifndef __MACH_PRCMU_H
#define __MACH_PRCMU_H
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/err.h>
#include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
/* Offset for the firmware version within the TCPM */
#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
/* PRCMU Wakeup defines */
enum prcmu_wakeup_index {
PRCMU_WAKEUP_INDEX_RTC,
PRCMU_WAKEUP_INDEX_RTT0,
PRCMU_WAKEUP_INDEX_RTT1,
PRCMU_WAKEUP_INDEX_HSI0,
PRCMU_WAKEUP_INDEX_HSI1,
PRCMU_WAKEUP_INDEX_USB,
PRCMU_WAKEUP_INDEX_ABB,
PRCMU_WAKEUP_INDEX_ABB_FIFO,
PRCMU_WAKEUP_INDEX_ARM,
PRCMU_WAKEUP_INDEX_CD_IRQ,
NUM_PRCMU_WAKEUP_INDICES
};
#define PRCMU_WAKEUP(_name) (BIT(PRCMU_WAKEUP_INDEX_##_name))
/* EPOD (power domain) IDs */
/*
* DB8500 EPODs
* - EPOD_ID_SVAMMDSP: power domain for SVA MMDSP
* - EPOD_ID_SVAPIPE: power domain for SVA pipe
* - EPOD_ID_SIAMMDSP: power domain for SIA MMDSP
* - EPOD_ID_SIAPIPE: power domain for SIA pipe
* - EPOD_ID_SGA: power domain for SGA
* - EPOD_ID_B2R2_MCDE: power domain for B2R2 and MCDE
* - EPOD_ID_ESRAM12: power domain for ESRAM 1 and 2
* - EPOD_ID_ESRAM34: power domain for ESRAM 3 and 4
* - NUM_EPOD_ID: number of power domains
*
* TODO: These should be prefixed.
*/
#define EPOD_ID_SVAMMDSP 0
#define EPOD_ID_SVAPIPE 1
#define EPOD_ID_SIAMMDSP 2
#define EPOD_ID_SIAPIPE 3
#define EPOD_ID_SGA 4
#define EPOD_ID_B2R2_MCDE 5
#define EPOD_ID_ESRAM12 6
#define EPOD_ID_ESRAM34 7
#define NUM_EPOD_ID 8
/*
* state definition for EPOD (power domain)
* - EPOD_STATE_NO_CHANGE: The EPOD should remain unchanged
* - EPOD_STATE_OFF: The EPOD is switched off
* - EPOD_STATE_RAMRET: The EPOD is switched off with its internal RAM in
* retention
* - EPOD_STATE_ON_CLK_OFF: The EPOD is switched on, clock is still off
* - EPOD_STATE_ON: Same as above, but with clock enabled
*/
#define EPOD_STATE_NO_CHANGE 0x00
#define EPOD_STATE_OFF 0x01
#define EPOD_STATE_RAMRET 0x02
#define EPOD_STATE_ON_CLK_OFF 0x03
#define EPOD_STATE_ON 0x04
/*
* CLKOUT sources
*/
#define PRCMU_CLKSRC_CLK38M 0x00
#define PRCMU_CLKSRC_ACLK 0x01
#define PRCMU_CLKSRC_SYSCLK 0x02
#define PRCMU_CLKSRC_LCDCLK 0x03
#define PRCMU_CLKSRC_SDMMCCLK 0x04
#define PRCMU_CLKSRC_TVCLK 0x05
#define PRCMU_CLKSRC_TIMCLK 0x06
#define PRCMU_CLKSRC_CLK009 0x07
/* These are only valid for CLKOUT1: */
#define PRCMU_CLKSRC_SIAMMDSPCLK 0x40
#define PRCMU_CLKSRC_I2CCLK 0x41
#define PRCMU_CLKSRC_MSP02CLK 0x42
#define PRCMU_CLKSRC_ARMPLL_OBSCLK 0x43
#define PRCMU_CLKSRC_HSIRXCLK 0x44
#define PRCMU_CLKSRC_HSITXCLK 0x45
#define PRCMU_CLKSRC_ARMCLKFIX 0x46
#define PRCMU_CLKSRC_HDMICLK 0x47
/**
* enum prcmu_wdog_id - PRCMU watchdog IDs
* @PRCMU_WDOG_ALL: use all timers
* @PRCMU_WDOG_CPU1: use first CPU timer only
* @PRCMU_WDOG_CPU2: use second CPU timer conly
*/
enum prcmu_wdog_id {
PRCMU_WDOG_ALL = 0x00,
PRCMU_WDOG_CPU1 = 0x01,
PRCMU_WDOG_CPU2 = 0x02,
};
/**
* enum ape_opp - APE OPP states definition
* @APE_OPP_INIT:
* @APE_NO_CHANGE: The APE operating point is unchanged
* @APE_100_OPP: The new APE operating point is ape100opp
* @APE_50_OPP: 50%
* @APE_50_PARTLY_25_OPP: 50%, except some clocks at 25%.
*/
enum ape_opp {
APE_OPP_INIT = 0x00,
APE_NO_CHANGE = 0x01,
APE_100_OPP = 0x02,
APE_50_OPP = 0x03,
APE_50_PARTLY_25_OPP = 0xFF,
};
/**
* enum arm_opp - ARM OPP states definition
* @ARM_OPP_INIT:
* @ARM_NO_CHANGE: The ARM operating point is unchanged
* @ARM_100_OPP: The new ARM operating point is arm100opp
* @ARM_50_OPP: The new ARM operating point is arm50opp
* @ARM_MAX_OPP: Operating point is "max" (more than 100)
* @ARM_MAX_FREQ100OPP: Set max opp if available, else 100
* @ARM_EXTCLK: The new ARM operating point is armExtClk
*/
enum arm_opp {
ARM_OPP_INIT = 0x00,
ARM_NO_CHANGE = 0x01,
ARM_100_OPP = 0x02,
ARM_50_OPP = 0x03,
ARM_MAX_OPP = 0x04,
ARM_MAX_FREQ100OPP = 0x05,
ARM_EXTCLK = 0x07
};
/**
* enum ddr_opp - DDR OPP states definition
* @DDR_100_OPP: The new DDR operating point is ddr100opp
* @DDR_50_OPP: The new DDR operating point is ddr50opp
* @DDR_25_OPP: The new DDR operating point is ddr25opp
*/
enum ddr_opp {
DDR_100_OPP = 0x00,
DDR_50_OPP = 0x01,
DDR_25_OPP = 0x02,
};
/*
* Definitions for controlling ESRAM0 in deep sleep.
*/
#define ESRAM0_DEEP_SLEEP_STATE_OFF 1
#define ESRAM0_DEEP_SLEEP_STATE_RET 2
/**
* enum ddr_pwrst - DDR power states definition
* @DDR_PWR_STATE_UNCHANGED: SDRAM and DDR controller state is unchanged
* @DDR_PWR_STATE_ON:
* @DDR_PWR_STATE_OFFLOWLAT:
* @DDR_PWR_STATE_OFFHIGHLAT:
*/
enum ddr_pwrst {
DDR_PWR_STATE_UNCHANGED = 0x00,
DDR_PWR_STATE_ON = 0x01,
DDR_PWR_STATE_OFFLOWLAT = 0x02,
DDR_PWR_STATE_OFFHIGHLAT = 0x03
};
#define DB8500_PRCMU_LEGACY_OFFSET 0xDD4
#define PRCMU_FW_PROJECT_U8500 2
#define PRCMU_FW_PROJECT_U8400 3
#define PRCMU_FW_PROJECT_U9500 4 /* Customer specific */
#define PRCMU_FW_PROJECT_U8500_MBB 5
#define PRCMU_FW_PROJECT_U8500_C1 6
#define PRCMU_FW_PROJECT_U8500_C2 7
#define PRCMU_FW_PROJECT_U8500_C3 8
#define PRCMU_FW_PROJECT_U8500_C4 9
#define PRCMU_FW_PROJECT_U9500_MBL 10
#define PRCMU_FW_PROJECT_U8500_SSG1 11 /* Samsung specific */
#define PRCMU_FW_PROJECT_U8500_MBL2 12 /* Customer specific */
#define PRCMU_FW_PROJECT_U8520 13
#define PRCMU_FW_PROJECT_U8420 14
#define PRCMU_FW_PROJECT_U8500_SSG2 15 /* Samsung specific */
#define PRCMU_FW_PROJECT_U8420_SYSCLK 17
#define PRCMU_FW_PROJECT_A9420 20
/* [32..63] 9540 and derivatives */
#define PRCMU_FW_PROJECT_U9540 32
/* [64..95] 8540 and derivatives */
#define PRCMU_FW_PROJECT_L8540 64
/* [96..126] 8580 and derivatives */
#define PRCMU_FW_PROJECT_L8580 96
#define PRCMU_FW_PROJECT_NAME_LEN 20
struct prcmu_fw_version {
u32 project; /* Notice, project shifted with 8 on ux540 */
u8 api_version;
u8 func_version;
u8 errata;
char project_name[PRCMU_FW_PROJECT_NAME_LEN];
};
#include <linux/mfd/db8500-prcmu.h>
#if defined(CONFIG_UX500_SOC_DB8500)
static inline void __init prcmu_early_init(void)
{
db8500_prcmu_early_init();
}
static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk,
bool keep_ap_pll)
{
return db8500_prcmu_set_power_state(state, keep_ulp_clk,
keep_ap_pll);
}
static inline u8 prcmu_get_power_state_result(void)
{
return db8500_prcmu_get_power_state_result();
}
static inline int prcmu_set_epod(u16 epod_id, u8 epod_state)
{
return db8500_prcmu_set_epod(epod_id, epod_state);
}
static inline void prcmu_enable_wakeups(u32 wakeups)
{
db8500_prcmu_enable_wakeups(wakeups);
}
static inline void prcmu_disable_wakeups(void)
{
prcmu_enable_wakeups(0);
}
static inline void prcmu_config_abb_event_readout(u32 abb_events)
{
db8500_prcmu_config_abb_event_readout(abb_events);
}
static inline void prcmu_get_abb_event_buffer(void __iomem **buf)
{
db8500_prcmu_get_abb_event_buffer(buf);
}
int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size);
int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size);
int prcmu_abb_write_masked(u8 slave, u8 reg, u8 *value, u8 *mask, u8 size);
int prcmu_config_clkout(u8 clkout, u8 source, u8 div);
static inline int prcmu_request_clock(u8 clock, bool enable)
{
return db8500_prcmu_request_clock(clock, enable);
}
unsigned long prcmu_clock_rate(u8 clock);
long prcmu_round_clock_rate(u8 clock, unsigned long rate);
int prcmu_set_clock_rate(u8 clock, unsigned long rate);
static inline int prcmu_get_ddr_opp(void)
{
return db8500_prcmu_get_ddr_opp();
}
static inline int prcmu_set_arm_opp(u8 opp)
{
return db8500_prcmu_set_arm_opp(opp);
}
static inline int prcmu_get_arm_opp(void)
{
return db8500_prcmu_get_arm_opp();
}
static inline int prcmu_set_ape_opp(u8 opp)
{
return db8500_prcmu_set_ape_opp(opp);
}
static inline int prcmu_get_ape_opp(void)
{
return db8500_prcmu_get_ape_opp();
}
static inline int prcmu_request_ape_opp_100_voltage(bool enable)
{
return db8500_prcmu_request_ape_opp_100_voltage(enable);
}
static inline void prcmu_system_reset(u16 reset_code)
{
db8500_prcmu_system_reset(reset_code);
}
static inline u16 prcmu_get_reset_code(void)
{
return db8500_prcmu_get_reset_code();
}
int prcmu_ac_wake_req(void);
void prcmu_ac_sleep_req(void);
static inline void prcmu_modem_reset(void)
{
db8500_prcmu_modem_reset();
}
static inline bool prcmu_is_ac_wake_requested(void)
{
return db8500_prcmu_is_ac_wake_requested();
}
static inline int prcmu_config_esram0_deep_sleep(u8 state)
{
return db8500_prcmu_config_esram0_deep_sleep(state);
}
static inline int prcmu_config_hotdog(u8 threshold)
{
return db8500_prcmu_config_hotdog(threshold);
}
static inline int prcmu_config_hotmon(u8 low, u8 high)
{
return db8500_prcmu_config_hotmon(low, high);
}
static inline int prcmu_start_temp_sense(u16 cycles32k)
{
return db8500_prcmu_start_temp_sense(cycles32k);
}
static inline int prcmu_stop_temp_sense(void)
{
return db8500_prcmu_stop_temp_sense();
}
static inline u32 prcmu_read(unsigned int reg)
{
return db8500_prcmu_read(reg);
}
static inline void prcmu_write(unsigned int reg, u32 value)
{
db8500_prcmu_write(reg, value);
}
static inline void prcmu_write_masked(unsigned int reg, u32 mask, u32 value)
{
db8500_prcmu_write_masked(reg, mask, value);
}
static inline int prcmu_enable_a9wdog(u8 id)
{
return db8500_prcmu_enable_a9wdog(id);
}
static inline int prcmu_disable_a9wdog(u8 id)
{
return db8500_prcmu_disable_a9wdog(id);
}
static inline int prcmu_kick_a9wdog(u8 id)
{
return db8500_prcmu_kick_a9wdog(id);
}
static inline int prcmu_load_a9wdog(u8 id, u32 timeout)
{
return db8500_prcmu_load_a9wdog(id, timeout);
}
static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off)
{
return db8500_prcmu_config_a9wdog(num, sleep_auto_off);
}
#else
static inline void prcmu_early_init(void) {}
static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk,
bool keep_ap_pll)
{
return 0;
}
static inline int prcmu_set_epod(u16 epod_id, u8 epod_state)
{
return 0;
}
static inline void prcmu_enable_wakeups(u32 wakeups) {}
static inline void prcmu_disable_wakeups(void) {}
static inline int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size)
{
return -ENOSYS;
}
static inline int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size)
{
return -ENOSYS;
}
static inline int prcmu_abb_write_masked(u8 slave, u8 reg, u8 *value, u8 *mask,
u8 size)
{
return -ENOSYS;
}
static inline int prcmu_config_clkout(u8 clkout, u8 source, u8 div)
{
return 0;
}
static inline int prcmu_request_clock(u8 clock, bool enable)
{
return 0;
}
static inline long prcmu_round_clock_rate(u8 clock, unsigned long rate)
{
return 0;
}
static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate)
{
return 0;
}
static inline unsigned long prcmu_clock_rate(u8 clock)
{
return 0;
}
static inline int prcmu_set_ape_opp(u8 opp)
{
return 0;
}
static inline int prcmu_get_ape_opp(void)
{
return APE_100_OPP;
}
static inline int prcmu_request_ape_opp_100_voltage(bool enable)
{
return 0;
}
static inline int prcmu_set_arm_opp(u8 opp)
{
return 0;
}
static inline int prcmu_get_arm_opp(void)
{
return ARM_100_OPP;
}
static inline int prcmu_get_ddr_opp(void)
{
return DDR_100_OPP;
}
static inline void prcmu_system_reset(u16 reset_code) {}
static inline u16 prcmu_get_reset_code(void)
{
return 0;
}
static inline int prcmu_ac_wake_req(void)
{
return 0;
}
static inline void prcmu_ac_sleep_req(void) {}
static inline void prcmu_modem_reset(void) {}
static inline bool prcmu_is_ac_wake_requested(void)
{
return false;
}
static inline int prcmu_config_esram0_deep_sleep(u8 state)
{
return 0;
}
static inline void prcmu_config_abb_event_readout(u32 abb_events) {}
static inline void prcmu_get_abb_event_buffer(void __iomem **buf)
{
*buf = NULL;
}
static inline int prcmu_config_hotdog(u8 threshold)
{
return 0;
}
static inline int prcmu_config_hotmon(u8 low, u8 high)
{
return 0;
}
static inline int prcmu_start_temp_sense(u16 cycles32k)
{
return 0;
}
static inline int prcmu_stop_temp_sense(void)
{
return 0;
}
static inline u32 prcmu_read(unsigned int reg)
{
return 0;
}
static inline void prcmu_write(unsigned int reg, u32 value) {}
static inline void prcmu_write_masked(unsigned int reg, u32 mask, u32 value) {}
#endif
static inline void prcmu_set(unsigned int reg, u32 bits)
{
prcmu_write_masked(reg, bits, bits);
}
static inline void prcmu_clear(unsigned int reg, u32 bits)
{
prcmu_write_masked(reg, bits, 0);
}
/* PRCMU QoS APE OPP class */
#define PRCMU_QOS_APE_OPP 1
#define PRCMU_QOS_DDR_OPP 2
#define PRCMU_QOS_ARM_OPP 3
#define PRCMU_QOS_DEFAULT_VALUE -1
static inline int prcmu_qos_add_requirement(int prcmu_qos_class,
char *name, s32 value)
{
return 0;
}
static inline int prcmu_qos_update_requirement(int prcmu_qos_class,
char *name, s32 new_value)
{
return 0;
}
static inline void prcmu_qos_remove_requirement(int prcmu_qos_class, char *name)
{
}
#endif /* __MACH_PRCMU_H */

View File

@@ -14,6 +14,7 @@
#include <linux/kfifo.h>
#include <linux/atomic.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/mutex.h>
@@ -104,7 +105,7 @@ enum si476x_power_state {
* @power_state: Current power state of the device.
* @supplies: Structure containing handles to all power supplies used
* by the device (NULL ones are ignored).
* @gpio_reset: GPIO pin connectet to the RSTB pin of the chip.
* @reset: GPIO connected to the RSTB pin of the chip.
* @pinmux: Chip's configurable pins configuration.
* @diversity_mode: Chips role when functioning in diversity mode.
* @is_alive: Chip is initialized and active.
@@ -142,7 +143,7 @@ struct si476x_core {
struct regulator_bulk_data supplies[4];
int gpio_reset;
struct gpio_desc *reset;
struct si476x_pinmux pinmux;
enum si476x_phase_diversity_mode diversity_mode;

View File

@@ -246,8 +246,6 @@ enum si476x_phase_diversity_mode {
* Platform dependent definition
*/
struct si476x_platform_data {
int gpio_reset; /* < 0 if not used */
struct si476x_power_up_args power_up_parameters;
enum si476x_phase_diversity_mode diversity_mode;

View File

@@ -103,6 +103,9 @@
#define UCB_MODE_DYN_VFLAG_ENA (1 << 12)
#define UCB_MODE_AUD_OFF_CAN (1 << 13)
struct software_node;
extern const struct software_node ucb1x00_gpiochip_node;
enum ucb1x00_reset {
UCB_RST_PROBE,
UCB_RST_RESUME,

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@@ -47,7 +47,7 @@
struct vprbrd_i2c_write_hdr {
u8 cmd;
u16 addr;
__le16 addr;
u8 len1;
u8 len2;
u8 last;
@@ -57,15 +57,15 @@ struct vprbrd_i2c_write_hdr {
struct vprbrd_i2c_read_hdr {
u8 cmd;
u16 addr;
__le16 addr;
u8 len0;
u8 len1;
u8 len2;
u8 len3;
u8 len4;
u8 len5;
u16 tf1; /* transfer 1 length */
u16 tf2; /* transfer 2 length */
__le16 tf1; /* transfer 1 length */
__le16 tf2; /* transfer 2 length */
} __packed;
struct vprbrd_i2c_status {
@@ -89,7 +89,7 @@ struct vprbrd_i2c_addr_msg {
u8 cmd;
u8 addr;
u8 unknown1;
u16 len;
__le16 len;
u8 unknown2;
u8 unknown3;
} __packed;

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@@ -271,6 +271,8 @@ int cros_ec_get_next_event(struct cros_ec_device *ec_dev,
u32 cros_ec_get_host_event(struct cros_ec_device *ec_dev);
int cros_ec_read_features(struct cros_ec_dev *ec);
bool cros_ec_check_features(struct cros_ec_dev *ec, int feature);
int cros_ec_get_sensor_count(struct cros_ec_dev *ec);

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@@ -14,7 +14,7 @@
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/regulator/consumer.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/db8500-prcmu.h>
#include <sound/soc.h>
#include <sound/soc-dai.h>