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drm/i915: Enable GGTT updates with binder in MTL

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MTL can hang because of a HW bug while parallel reading/writing
from/to LMEM/GTTMMADR BAR so try to reduce GGTT update
related pci transactions with blitter command as recommended
for Wa_13010847436 and Wa_14019519902.

Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Oak Zeng <oak.zeng@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230926083742.14740-8-nirmoy.das@intel.com
This commit is contained in:
Nirmoy Das
2023-09-26 10:37:42 +02:00
parent a2ae296292
commit 799d794f75
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/i915/gt/intel_gtt.c
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@@ -23,7 +23,8 @@
bool i915_ggtt_require_binder(struct drm_i915_private *i915)
{
return false;
/* Wa_13010847436 & Wa_14019519902 */
return MEDIA_VER_FULL(i915) == IP_VER(13, 0);
}
static bool intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *i915)