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drm/amdgpu: Adjust TMR address alignment as per HW requirement

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According to HW engineer, they prefer the TMR address be "naturally aligned", e.g. the start address
must be an integer divide of TME size.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
shaoyunl
2019-03-25 16:07:23 -04:00
committed by Alex Deucher
parent af67772d0a
commit 795c1b8d07
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
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@@ -187,13 +187,13 @@ static int psp_tmr_init(struct psp_context *psp)
int ret;
/*
* Allocate 3M memory aligned to 1M from Frame Buffer (local
* physical).
* According to HW engineer, they prefer the TMR address be "naturally
* aligned" , e.g. the start address be an integer divide of TMR size.
*
* Note: this memory need be reserved till the driver
* uninitializes.
*/
ret = amdgpu_bo_create_kernel(psp->adev, PSP_TMR_SIZE, 0x100000,
ret = amdgpu_bo_create_kernel(psp->adev, PSP_TMR_SIZE, PSP_TMR_SIZE,
AMDGPU_GEM_DOMAIN_VRAM,
&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);