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arm64: dts: freescale: imx8mp-phyboard-pollux: Add and enable TPM
Add support for TPM for phyBOARD Pollux. Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@@ -103,6 +103,22 @@ reg_vcc_3v3_sw: regulator-vcc-3v3-sw {
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};
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};
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/* TPM */
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&ecspi1 {
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#address-cells = <1>;
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#size-cells = <0>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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tpm: tpm@0 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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reg = <0>;
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spi-max-frequency = <38000000>;
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};
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};
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&eqos {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos>;
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@@ -301,6 +317,15 @@ &gpio4 {
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};
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&iomuxc {
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x80
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MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x80
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MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x80
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MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x00
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>;
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};
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pinctrl_eqos: eqosgrp {
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fsl,pins = <
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MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
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