Merge branch 'xilinx-clock-support'

Vineeth Karumanchi says:

====================
net: xilinx_gmii2rgmii: Add clock support

Add input clock support to gmii_to_rgmii IP.
Add "clocks" bindings for the input clock.

Changes in v3:
- Added items constraints.

Changes in v2:
- removed "clkin" clock name property.
v2 link : https://lore.kernel.org/netdev/20240517054745.4111922-1-vineeth.karumanchi@amd.com/

v1 link : https://lore.kernel.org/netdev/20240515094645.3691877-1-vineeth.karumanchi@amd.com/
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
2024-05-29 13:10:57 +01:00
2 changed files with 12 additions and 0 deletions

View File

@@ -31,6 +31,10 @@ properties:
phy-handle:
$ref: ethernet-controller.yaml#/properties/phy-handle
clocks:
items:
- description: 200/375 MHz free-running clock is used as input clock.
required:
- compatible
- reg
@@ -51,5 +55,6 @@ examples:
compatible = "xlnx,gmii-to-rgmii-1.0";
reg = <8>;
phy-handle = <&phy>;
clocks = <&dummy>;
};
};

View File

@@ -15,6 +15,7 @@
#include <linux/mii.h>
#include <linux/mdio.h>
#include <linux/phy.h>
#include <linux/clk.h>
#include <linux/of_mdio.h>
#define XILINX_GMII2RGMII_REG 0x10
@@ -85,11 +86,17 @@ static int xgmiitorgmii_probe(struct mdio_device *mdiodev)
struct device *dev = &mdiodev->dev;
struct device_node *np = dev->of_node, *phy_node;
struct gmii2rgmii *priv;
struct clk *clkin;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
clkin = devm_clk_get_optional_enabled(dev, NULL);
if (IS_ERR(clkin))
return dev_err_probe(dev, PTR_ERR(clkin),
"Failed to get and enable clock from Device Tree\n");
phy_node = of_parse_phandle(np, "phy-handle", 0);
if (!phy_node) {
dev_err(dev, "Couldn't parse phy-handle\n");