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arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings

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Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2023-12-05 06:25:46 +03:00
committed by Bjorn Andersson
parent 963ff488af
commit 760baba5e7
1 changed files with 5 additions and 14 deletions
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19
arch/arm64/boot/dts/qcom/sdm845.dtsi
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@@ -2565,7 +2565,7 @@ ufs_mem_hc: ufshc@1d84000 {
<0 0x01d90000 0 0x8000>;
reg-names = "std", "ice";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufs_mem_phy_lanes>;
phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
power-domains = <&gcc UFS_PHY_GDSC>;
@@ -2637,10 +2637,8 @@ opp-200000000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sdm845-qmp-ufs-phy";
reg = <0 0x01d87000 0 0x18c>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
reg = <0 0x01d87000 0 0x1000>;
clock-names = "ref",
"ref_aux";
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
@@ -2648,16 +2646,9 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
status = "disabled";
ufs_mem_phy_lanes: phy@1d87400 {
reg = <0 0x01d87400 0 0x108>,
<0 0x01d87600 0 0x1e0>,
<0 0x01d87c00 0 0x1dc>,
<0 0x01d87800 0 0x108>,
<0 0x01d87a00 0 0x1e0>;
#phy-cells = <0>;
};
#phy-cells = <0>;
status = "disabled";
};
cryptobam: dma-controller@1dc4000 {