arm64: dts: rockchip: add Coresight debug range for RK3399

Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt.

This IP block can be used for sampling the PC of any given CPU, which is
useful in certain panic scenarios where you can't get the CPU to stop
cleanly (e.g., hard lockup).

Reviewed-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20210908111337.v2.3.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Brian Norris
2021-09-08 11:13:40 -07:00
committed by Heiko Stuebner
parent 4b90e34d9a
commit 75dccea503

View File

@@ -361,6 +361,54 @@ usb_host1_ohci: usb@fe3e0000 {
status = "disabled";
};
debug@fe430000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0 0xfe430000 0 0x1000>;
clocks = <&cru PCLK_COREDBG_L>;
clock-names = "apb_pclk";
cpu = <&cpu_l0>;
};
debug@fe432000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0 0xfe432000 0 0x1000>;
clocks = <&cru PCLK_COREDBG_L>;
clock-names = "apb_pclk";
cpu = <&cpu_l1>;
};
debug@fe434000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0 0xfe434000 0 0x1000>;
clocks = <&cru PCLK_COREDBG_L>;
clock-names = "apb_pclk";
cpu = <&cpu_l2>;
};
debug@fe436000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0 0xfe436000 0 0x1000>;
clocks = <&cru PCLK_COREDBG_L>;
clock-names = "apb_pclk";
cpu = <&cpu_l3>;
};
debug@fe610000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0 0xfe610000 0 0x1000>;
clocks = <&cru PCLK_COREDBG_B>;
clock-names = "apb_pclk";
cpu = <&cpu_b0>;
};
debug@fe710000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0 0xfe710000 0 0x1000>;
clocks = <&cru PCLK_COREDBG_B>;
clock-names = "apb_pclk";
cpu = <&cpu_b1>;
};
usbdrd3_0: usb@fe800000 {
compatible = "rockchip,rk3399-dwc3";
#address-cells = <2>;