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riscv: dts: thead: set dma-noncoherent to soc bus

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riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
dma coherent, so set dma-noncoherent to reflect this fact.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Tested-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Jisheng Zhang
2023-09-12 15:22:32 +08:00
committed by Arnd Bergmann
parent e4078ebbdd
commit 759426c758
1 changed files with 1 additions and 0 deletions
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arch/riscv/boot/dts/thead/th1520.dtsi
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@@ -139,6 +139,7 @@ soc {
interrupt-parent = <&plic>;
#address-cells = <2>;
#size-cells = <2>;
dma-noncoherent;
ranges;
plic: interrupt-controller@ffd8000000 {