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arm64: dts: renesas: rzg3s-smarc: Enable PCIe

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The RZ Smarc Carrier-II board has PCIe headers mounted on it. Enable PCIe
support.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251119143523.977085-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Claudiu Beznea
2025-11-19 16:35:22 +02:00
committed by Geert Uytterhoeven
parent 1a66160fb2
commit 73b73af99a
1 changed files with 11 additions and 0 deletions
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11
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
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@@ -155,6 +155,12 @@ &ohci1 {
status = "okay";
};
&pcie {
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
status = "okay";
};
&phyrst {
status = "okay";
};
@@ -186,6 +192,11 @@ key-3-gpio-hog {
line-name = "key-3-gpio-irq";
};
pcie_pins: pcie {
pinmux = <RZG2L_PORT_PINMUX(13, 2, 2)>, /* PCIE_RST_OUT_B */
<RZG2L_PORT_PINMUX(13, 3, 2)>; /* PCIE_CLKREQ_B */
};
scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */
<RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */