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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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arm64: dts: Add support for Kontron i.MX8MP SMARC module and eval carrier
This adds support for the Kontron Electronics i.MX8MP SMARC module (which uses the OSM-S i.MX8MP SoM) on the Kontron SMARC eval carrier. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frieder Schrempf
committed by
Shawn Guo
Shawn Guo
parent
946ab10e3f
commit
6fe1ced5cc
@@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-bl-osm-s.dtb
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imx8mp-kontron-dl-dtbs += imx8mp-kontron-bl-osm-s.dtb imx8mp-kontron-dl.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
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@@ -0,0 +1,254 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright (C) 2024 Kontron Electronics GmbH
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*/
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/dts-v1/;
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mp-kontron-smarc.dtsi"
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/ {
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model = "Kontron SMARC Eval Carrier with i.MX8MP";
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compatible = "kontron,imx8mp-smarc-eval-carrier", "kontron,imx8mp-smarc",
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"kontron,imx8mp-osm-s", "fsl,imx8mp";
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 50000 0>;
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brightness-levels = <0 100>;
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num-interpolated-steps = <100>;
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default-brightness-level = <100>;
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enable-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
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};
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extcon_usbc: usbc {
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compatible = "linux,extcon-usb-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb1_id>;
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id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,bitclock-master = <&codec_dai>;
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&codec_dai>;
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "imx8mp-wm8904";
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simple-audio-card,routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"IN2L", "Line In Jack",
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"IN2R", "Line In Jack",
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"Headphone Jack", "MICBIAS",
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"IN1L", "Headphone Jack";
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simple-audio-card,widgets =
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"Microphone", "Headphone Jack",
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"Headphone", "Headphone Jack",
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"Line", "Line In Jack";
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codec_dai: simple-audio-card,codec {
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
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sound-dai = <&wm8904>;
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};
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simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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};
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regulator_can0: can0-regulator {
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compatible = "regulator-fixed";
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regulator-name = "can0_en";
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gpio = <&expander_pm_out 6 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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regulator_can1: can1-regulator {
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compatible = "regulator-fixed";
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regulator-name = "can1_en";
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gpio = <&expander_pm_out 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&ecspi1 {
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status = "okay";
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};
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&ecspi2 {
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status = "okay";
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};
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&eqos {
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status = "okay";
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};
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&fec {
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status = "okay";
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};
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&flexcan1 {
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xceiver-supply = <®ulator_can0>;
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status = "okay";
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};
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&flexcan2 {
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xceiver-supply = <®ulator_can1>;
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status = "okay";
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};
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&hdmi_pvi {
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status = "okay";
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};
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&hdmi_tx {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi>;
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ddc-i2c-bus = <&i2c3>;
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status = "okay";
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};
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&hdmi_tx_phy {
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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expander_pm_out: io-expander@22 {
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compatible = "nxp,pca9554";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "EN_5V0_S0", "EN_3V3_S0", "EN_1V8_S0",
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"EN_1V5_S0", "EN_12V0_PCIE", "EN_3V3_S5",
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"CAN0_EN", "CAN1_EN";
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};
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expander_pm_in: io-expander@24 {
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compatible = "nxp,pca9554";
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reg = <0x24>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "PG_5V0_3V3_S0", "PG_5V0_3V3_S5", "PG_1V8_S0",
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"PG_1V5_S0", "PG_BKLT_5V", "PG_BKLT_12V";
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};
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};
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&i2c2 {
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status = "okay";
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wm8904: audio-codec@1a {
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compatible = "wlf,wm8904";
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reg = <0x1a>;
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#sound-dai-cells = <0>;
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
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clock-names = "mclk";
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AVDD-supply = <®_vdd_1v8>;
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CPVDD-supply = <®_vdd_1v8>;
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DBVDD-supply = <®_vdd_1v8>;
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DCVDD-supply = <®_vdd_1v8>;
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MICVDD-supply = <®_vdd_3v3>;
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};
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expander_audio: io-expander@20 {
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compatible = "nxp,pca9554";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "I2C_SEL_CODEC_LOOPBACK", "FPAH_PRESENCE",
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"CODEC_OPTION_SW_I2S_HDA", "LINE_IN_JD",
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"LINE_OUT_JD", "HEADPHONES_JD", "MIC_JD";
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};
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};
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&i2c3 {
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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};
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&lcdif3 {
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status = "okay";
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};
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&pcie_phy {
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
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fsl,clkreq-unsupported;
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clocks = <&hsio_blk_ctrl>;
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clock-names = "ref";
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status = "okay";
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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};
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&sai3 {
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assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&uart1 {
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uart-has-rtscts;
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&uart4 {
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uart-has-rtscts;
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status = "okay";
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};
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&usb_dwc3_0 {
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adp-disable;
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hnp-disable;
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srp-disable;
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dr_mode = "otg";
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extcon = <&extcon_usbc>;
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usb-role-switch;
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status = "okay";
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};
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&usb_dwc3_1 {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&usb3_phy0 {
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vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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&usb3_phy1 {
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status = "okay";
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};
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&usdhc2 {
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vmmc-supply = <®_vdd_3v3>;
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status = "okay";
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};
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280
arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi
Normal file
280
arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi
Normal file
@@ -0,0 +1,280 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright (C) 2024 Kontron Electronics GmbH
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include "imx8mp-kontron-osm-s.dtsi"
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/ {
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model = "Kontron SMARC i.MX8MP";
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compatible = "kontron,imx8mp-smarc", "kontron,imx8mp-osm-s", "fsl,imx8mp";
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "led1";
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gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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&ecspi1 {
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status = "okay";
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tpm@0 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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reg = <0>;
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spi-max-frequency = <18500000>;
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};
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};
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&eqos { /* Second ethernet (OSM-S ETH_B) */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos_rgmii>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy1>;
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-id4f51.e91b";
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reg = <1>;
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pinctrl-0 = <&pinctrl_ethphy1>;
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pinctrl-names = "default";
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reset-assert-us = <10000>;
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reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&fec { /* First ethernet (OSM-S ETH_A) */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_rgmii>;
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phy-connection-type = "rgmii-id";
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phy-handle = <ðphy0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@1 {
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compatible = "ethernet-phy-id4f51.e91b";
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reg = <1>;
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pinctrl-0 = <&pinctrl_ethphy0>;
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pinctrl-names = "default";
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reset-assert-us = <10000>;
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reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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};
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};
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};
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/*
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* Rename SoM signals according to SMARC module usage:
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* GPIO_A_2 -> GPIO0
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* GPIO_A_3 -> GPIO1
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* GPIO_A_4 -> GPIO2
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* GPIO_A_5 -> GPIO3
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* USB_B_EN -> n.a.
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* USB_B_ID -> n.a.
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* USB_B_OC -> n.a.
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*/
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&gpio1 {
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gpio-line-names = "GPIO_A_0", "GPIO_A_1", "", "",
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"", "GPIO0", "GPIO1", "GPIO2",
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"GPIO3", "", "USB_A_ID", "",
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"USB_A_EN", "USB_A_OC","CAM_MCK", "",
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"ETH_B_MDC", "ETH_B_MDIO", "ETH_B_TXD3", "ETH_B_TXD2",
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"ETH_B_TXD1", "ETH_B_TXD0", "ETH_B_TX_EN", "ETH_B_TX_CLK",
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"ETH_B_RX_DV", "ETH_B_RX_CLK", "ETH_B_RXD0", "ETH_B_RXD1",
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"ETH_B_RXD2", "ETH_B_RXD3";
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};
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/*
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* Rename SoM signals according to SMARC module usage:
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* SDIO_A_CD -> SDIO_CD
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* SDIO_A_CLK -> SDIO_CK
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* SDIO_A_CMD -> SDIO_CMD
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* SDIO_A_D0 -> SDIO_D0
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* SDIO_A_D1 -> SDIO_D1
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* SDIO_A_D2 -> SDIO_D2
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* SDIO_A_D3 -> SDIO_D3
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* SDIO_A_PWR_EN -> SDIO_PWR_EN
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* SDIO_A_WP -> SDIO_WP
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*/
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&gpio2 {
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gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "",
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"SDIO_CD", "SDIO_CK", "SDIO_CMD", "SDIO_D0",
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"SDIO_D1", "SDIO_D2", "SDIO_D3", "SDIO_PWR_EN",
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"SDIO_WP";
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};
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/*
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* Rename SoM signals according to SMARC module usage:
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* PCIE_CLKREQ -> PCIE_A_CKREQ
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* PCIE_A_PERST -> PCIE_A_RST
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* SDIO_B_D5 -> n.a.
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* SDIO_B_D6 -> n.a.
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* SDIO_B_D7 -> n.a.
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* SPI_A_WP -> n.a.
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* SPI_A_HOLD -> n.a.
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* UART_B_RTS -> SER2_RTS
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* UART_B_CTS -> SER2_CTS
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* SDIO_B_D0 -> GPIO8
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* SDIO_B_D1 -> GPIO9
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* SDIO_B_D2 -> GPIO10
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* SDIO_B_D3 -> GPIO11
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* SDIO_B_WP -> n.a.
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* SDIO_B_D4 -> n.a.
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* PCIE_SM_ALERT -> SMB_ALERT
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* SDIO_B_CLK -> GPIO6
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* SDIO_B_CMD -> GPIO7
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* GPIO_B_0 -> LCD0_BKLT_EN
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* GPIO_B_1 -> LCD1_BKLT_EN
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* BOOT_SEL0 -> BOOT_SEL2
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* SDIO_B_CD -> n.a.
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* SDIO_B_PWR_EN -> n.a.
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* HDMI_CEC -> n.a.
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* SDIO_B_PWR_EN -> n.a.
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*/
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&gpio3 {
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pinctrl-0 = <&pinctrl_gpio3>, <&pinctrl_gpio3_smarc>;
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gpio-line-names = "PCIE_WAKE", "PCIE_A_CKREQ", "PCIE_A_RST", "",
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"", "", "", "",
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"SER2_RTS", "SER2_CTS", "GPIO8", "GPIO9",
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"GPIO10", "GPIO11", "", "",
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"SMB_ALERT", "GPIO6", "GPIO7", "LCD0_BKLT_EN",
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"LCD1_BKLT_EN", "", "BOOT_SEL2", "BOOT_SEL1",
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"", "", "", "",
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"", "HDMI_HPD";
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};
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/*
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* Rename SoM signals according to SMARC module usage:
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* GPIO_B_5 -> n.a.
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* GPIO_B_6 -> n.a.
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* GPIO_B_7 -> n.a.
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* GPIO_C_0 -> LED
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* GPIO_B_3 -> ETH2_INT
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* GPIO_B_4 -> USB_HUB_RST
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* GPIO_B_2 -> ETH1_INT
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* GPIO_A_6 -> GPIO4
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* CAN_A_TX -> CAN0_TX
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* UART_A_CTS -> SER0_CTS
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* UART_A_RTS -> SER0_RTS
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* CAN_A_RX -> CAN0_RX
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* CAN_B_TX -> CAN1_TX
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* CAN_B_RX -> CAN1_RX
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* GPIO_A_7 -> TEST
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* I2S_A_DATA_IN -> I2S0_SDIN
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* I2S_LRCLK -> I2S0_LRCK
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*/
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&gpio4 {
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gpio-line-names = "", "", "", "LED",
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"ETH_A_MDC", "ETH_A_MDIO", "ETH_A_RXD0", "ETH_A_RXD1",
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"ETH_A_RXD2", "ETH_A_RXD3", "ETH_A_RX_DV", "ETH_A_RX_CLK",
|
||||
"ETH_A_TXD0", "ETH_A_TXD1", "ETH_A_TXD2", "ETH_A_TXD3",
|
||||
"ETH_A_TX_EN", "ETH_A_TX_CLK", "ETH2_INT", "USB_HUB_RST",
|
||||
"ETH1_INT", "GPIO4", "CAN0_TX", "SER0_CTS",
|
||||
"SER0_RTS", "CAN0_RX", "CAN1_TX", "CAN1_RX",
|
||||
"TEST", "CARRIER_PWR_EN", "I2S0_SDIN", "I2S0_LRCK";
|
||||
};
|
||||
|
||||
/*
|
||||
* Rename SoM signals according to SMARC module usage:
|
||||
* I2S_BITCLK -> I2S0_CK
|
||||
* I2S_A_DATA_OUT -> I2S0_SDOUT
|
||||
* I2S_MCLK -> AUDIO_MCK
|
||||
* PWM_2 -> GPIO5
|
||||
* PWM_1 -> LCD1_BKLT_PWM
|
||||
* PWM_0 -> LCD0_BKLT_PWM
|
||||
* SPI_A_SCK -> SPI0_CK
|
||||
* SPI_A_SDO -> SPI0_DO
|
||||
* SPI_A_SDI -> SPI0_DIN
|
||||
* SPI_A_CS0 -> SPI0_CS0
|
||||
* SPI_B_SCK -> ESPI_CK
|
||||
* SPI_B_SDO -> ESPI_IO_0
|
||||
* SPI_B_SDI -> ESPI_IO_1
|
||||
* SPI_B_CS0 -> ESPI_CS0
|
||||
* I2C_A_SCL -> I2C_PM_CK
|
||||
* I2C_A_SDA -> I2C_PM_DAT
|
||||
* I2C_B_SCL -> I2C_GP_CK
|
||||
* I2C_B_SDA -> I2C_GP_DAT
|
||||
* PCIE_SMCLK -> HDMI_CTRL_CK
|
||||
* PCIE_SMDAT -> HDMI_CTRL_DAT
|
||||
* I2C_CAM_SCL -> I2C_CAM1_CK
|
||||
* I2C_CAM_SDA -> I2C_CAM1_DAT
|
||||
* UART_A_RX -> SER0_RX
|
||||
* UART_A_TX -> SER0_TX
|
||||
* UART_C_RX -> SER3_RX
|
||||
* UART_C_TX -> SER3_TX
|
||||
* UART_CON_RX -> SER1_RX
|
||||
* UART_CON_TX -> SER1_TX
|
||||
* UART_B_RX -> SER2_RX
|
||||
* UART_B_TX -> SER2_TX
|
||||
*/
|
||||
&gpio5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio5_smarc>;
|
||||
gpio-line-names = "I2S0_CK", "I2S0_SDOUT", "AUDIO_MCK", "GPIO5",
|
||||
"LCD1_BKLT_PWM", "LCD0_BKLT_PWM", "SPI0_CK", "SPI0_DO",
|
||||
"SPI0_DIN", "SPI0_CS0", "ESPI_CK", "ESPI_IO_0",
|
||||
"ESPI_IO_1", "ESPI_CS0", "I2C_PM_CK", "I2C_PM_DAT",
|
||||
"I2C_GP_CK", "I2C_GP_DAT", "HDMI_CTRL_CK", "HDMI_CTRL_DAT",
|
||||
"I2C_CAM1_CK", "I2C_CAM1_DAT", "SER0_RX", "SER0_TX",
|
||||
"SER3_RX", "SER3_TX", "SER1_RX", "SER1_TX",
|
||||
"SER2_RX", "SER2_TX";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb-hub@1 {
|
||||
compatible = "usb424,2514";
|
||||
reg = <1>;
|
||||
reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb3_1 {
|
||||
fsl,disable-port-power-control;
|
||||
fsl,permanently-attached;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_ethphy0: ethphy0grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x46
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ethphy1: ethphy1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x46
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio3_smarc: gpio3smarcgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_DATA04__GPIO3_IO10 0x1d0 /* SMARC GPIO8 */
|
||||
MX8MP_IOMUXC_NAND_DATA05__GPIO3_IO11 0x1d0 /* SMARC GPIO9 */
|
||||
MX8MP_IOMUXC_NAND_DATA06__GPIO3_IO12 0x1d0 /* SMARC GPIO10 */
|
||||
MX8MP_IOMUXC_NAND_DATA07__GPIO3_IO13 0x1d0 /* SMARC GPIO11 */
|
||||
MX8MP_IOMUXC_NAND_WE_B__GPIO3_IO17 0x190 /* SMARC GPIO6 */
|
||||
MX8MP_IOMUXC_NAND_WP_B__GPIO3_IO18 0x1d0 /* SMARC GPIO7 */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio5_smarc: gpio5smarcgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x1d0 /* SMARC GPIO5 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user